Philips (Now NXP) TDA1591, TDA1591T Schematic [ru]

INTEGRATED CIRCUITS

DATA SH EET

TDA1591

PLL stereo decoder and noise
blanker

Product specification
Supersedes data of March 1992
File under Integrated Circuits, IC01

1996 Sep 02

Philips Semiconductors Product specification

PLL stereo decoder and noise blanker TDA1591

FEATURES

• Adjustment-free voltage controlled PLL oscillator for
ceramic resonator (f = 456 kHz)

• Pilot signal dependent mono/stereo switching

• Analog control of mono/stereo change over

[stereo blend, Stereo Noise Controller (SNC)]

GENERAL DESCRIPTION

The TDA1591 is a monolithic bipolar integrated circuit
providing the stereo decoder function and noise blanking
for FM car radio applications.

The device operates in a power supply range of

7.5 to 12 V.

• Adjacent channel noise suppression (114 kHz)

• Pilot canceller

• Analog control of de-emphasis; High Cut Control (HCC)

• Applicable as source selector for AM/FM/cassette

switching

• Separate interference noise detector

• Integrated input low-pass filter for delayed noise

blanking

• Noise blanking at MPX-demodulator outputs

• Internal voltage stabilization.

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

P

I

P

V

o(rms)

supply voltage (pin 5) 7.5 10 12 V
supply current − 12 − mA

audio output signal (RMS value) − 900 − mV
THD total harmonic distortion − 0.1 0.3 %
S/N signal-to-noise ratio − 76 − dB

α

cs

V

trigg

channel separation − 40 − dB

interference voltage trigger level − 10 − mV

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA1591 DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
TDA1591T SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1996 Sep 02 2

Philips Semiconductors Product specification

PLL stereo decoder and noise blanker TDA1591

BLOCK DIAGRAM

iAUX

V

0.22 µF

HCC

100 kΩ 100 kΩ

SNC

from IF level detector

27 kΩ

IDENT

stereo

indication

= 1 to 5 V

ref

V

from pin 5

12 kΩ

mono

forced

oR

V

0.22 µF

111213141516

R2

47 kΩ

47 kΩ

10 kΩ

R1

FB-R

6.8 nF

6.8 nF

27 kΩ

PILOT

µF

0.1

470 kΩ

20 19 18 17

(1)

75 kΩ

comp

C

+


kΩ

6.5

BLEND

STEREO

SWITCH

PILOT

DETECTOR

+

7.4 kΩ

AND

HCC

GATE

FILTER

2-POLE

(30 kHz)

PILOT

CANCEL

FILTER

4-POLE

(80 kHz)

TDA1591

7.4 kΩ

38 kHz

19 kHz

6.5 kΩ

PULSE

FORMER



DETECTOR

INTERFERENCE

LOGIC

PHASE

DETECTOR

+

NOISE

DETECTOR

+



CURRENT

REFERENCE

VOLTAGE

STABILIZER

VCO

oL

V

47 kΩ

FB-L

47

nF

pF

470

12 3 4567 8 9 10

27 kΩ

2.2

R3

470

0.22 µF

0.1

47 kΩ

kΩ

pF

µF

100 kΩ

22

0.22

iAUX

V

0.22 µF

1.2

10 Ω

(Murata)

CSB456F11

nF

µF

MEH027

mute on

VCO off

nF

100

µF

handbook, full pagewidth

Fig.1 Block diagram with external components, also used as test circuit.

interference signal (TDA1596, pin 3)

68 pF

68 kΩ 82 kΩ

0.1 µF

i MPX

V

1996 Sep 02 3

= 10 V

P

V

INFI

(1) Simulates the roll-off of the FM demodulator.

Philips Semiconductors Product specification

PLL stereo decoder and noise blanker TDA1591

PINNING

SYMBOL PIN DESCRIPTION

PLL 1 phase locked loop filter
OSC 2 oscillator input/output pin for

ceramic resonator
GND 3 ground (0 V)
I

ref

V

P

INFI 6 interference signal input
PUFO 7 pulse former time constant;

NDET 8 noise detector time constant;

FB-L 9 AF feedback input for left audio

V

oL

V

oR

FB-R 12 AF feedback input for right audio

C

DEEL

C

DEER

HCC 15 HCC input for de-emphasis control
SNC 16 stereo blend input
V

ref

IDENT 18 identification output (HIGH = pilot

PILOT 19 pilot detector level (forced mono

V

i MPX

4 reference current
5 supply voltage (+10 V)

VCO off

mute on

signal

10 AF output signal left
11 AF output signal right

signal

13 de-emphasis capacitor for left

channel

14 de-emphasis capacitor for right

channel

17 externally applied reference

voltage of 1 to 5 V

existing; stereo)

input)

20 MPX input signal from IF

demodulator

handbook, halfpage

1

PLL

OSC

2

GND

3

I

4

ref

V

5

P

6
7
8
9

10

TDA1591

MHA363

INFI
PUFO
NDET

FB-L

V

oL

Fig.2 Pin configuration.

20
19
18
17
16
15
14
13
12
11

V

i MPX
PILOT
IDENT

V

ref
SNC
HCC
C

DEER
C

DEEL
FB-R
V

oR

1996 Sep 02 4

Philips Semiconductors Product specification

PLL stereo decoder and noise blanker TDA1591

FUNCTIONAL DESCRIPTION

Adapting the MPX input to the level of the FM demodulator
output is realized by the value of input resistor R1
(see Fig.3). The total gain of the stereo decoder is
applicable by varying the feedback resistors R2 and R3
(see Figs 1 and 4).

In mute position and the VCO switched off (pin 7), the
output amplifiers can be used for cassette playback,
AM stereo purpose or other signal sources.

For High Cut Control (HCC), the de-emphasis time
constant can be changed to higher values
(see Figs 7 and 8). This function is controlled by an analog
input signal.

The noise blanking facility is achieved by gating the stereo
decoder output signal.

The interference detector generates a gating pulse
preferable forced by the level detector voltage of the IF
part.

The Stereo Noise Controller (SNC) provides a smooth
mono to stereo take-over (see Fig.5).

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

P

P

tot

T

stg

T

amb

V

es

supply voltage (pin 5) 0 13.2 V
total power dissipation 0 0.25 W
storage temperature −55 +150 °C
operating ambient temperature −40 +85 °C
electrostatic handling; note 1

pins 1 and 16 −400 +400 V
pin 5 −300 +300 V
all other pins −600 +600 V

Note

1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.

1996 Sep 02 5

Philips Semiconductors Product specification

PLL stereo decoder and noise blanker TDA1591

CHARACTERISTICS

VP= 10 V; T
and series resistor at input R1 = 150 kΩ; measurements taken in Fig.1; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

P

I

P

Stereo decoder

V

i MPX(p-p)

∆V

i MPX(p-p)

V

o(rms)

∆V

o

V

10-11/Vo

V

o 10,11

R

o 10,11

α

cs

THD total harmonic distortion − 0.1 0.3 %
S/N signal-to-noise ratio f = 20 to 16000 Hz − 76 − dB

α

19

α

38

α

57

α

76

IM2 intermodulation for f
IM3 f

ARI traffic radio (ARI) f = 57 kHz; note 2 − 70 − dB

α

57

α

67

α

114

α

190

PSRR power supply ripple rejection f = 100 Hz;

VCO (pin 2)

f

osc

∆f/f capture and holding range − 1 − %
V

7

=25°C; input signal V

amb

i MPX(p-p)

= 1.7 V; m = 100% (∆f=±75 kHz, f

= 1 kHz); de-emphasis of 50 µs

mod

supply voltage (pin 5) 7.5 10 12 V
supply current − 12 − mA

MPX input signal on pin 20

− 1.7 − V

(peak-to-peak value)
overdrive margin of MPX input signal THD = 1% 3 −−dB
AF mono output signal at pins 10 and 11

without pilot − 900 − mV

(RMS value)
overdrive margin of output signal THD = 1% 3 −−dB
difference of output voltage levels −−1dB
DC output voltage (pins 10 and 11) 3.3 3.8 4.3 V
output resistance − 130 −Ω
channel separation pin 16 open-circuit;

− 40 − dB

see Fig.6

pilot signal suppression f = 19 kHz − 50 − dB
subcarrier suppression f = 38 kHz − 50 − dB

f = 57 kHz − 46 − dB
f = 76 kHz − 60 − dB

= 1 kHz f

spur

Subsidiary Communication Authorization

= 10 kHz; note 1 − 60 − dB

mod

= 13 kHz; note 1 − 58 − dB

mod

f = 67 kHz; note 3 70 −−dB

(SCA)
Adjacent Channel Interference (ACI) f = 114 kHz; note 4 − 80 − dB

f = 190 kHz; note 4 − 70 − dB

− 35 − dB

V

ripple(rms)

= 100 mV

oscillator frequency (ceramic resonator) − 456 − kHz
frequency range of free running oscillator 452 − 460 kHz

VCO-off voltage (pin 7) 0 − 0.6 V

1996 Sep 02 6

Philips Semiconductors Product specification

PLL stereo decoder and noise blanker TDA1591

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Mono/stereo control (pins 16, 17 and 19)

V

i pilot(rms)

pilot threshold voltage for automatic switching
by pilot input voltage (RMS value)

HYS hysteresis of pilot threshold voltage − 2 − dB
V

19

switching voltage for external mono control
(pin 19)

V

ref

V

16-17

reference input voltage range (pin 17) 1 − 5V
control voltage for channel separation due to

pin 17 (V

ref

)

Pilot indicator logic level output (pin 18)

V

18

I

18

LOW voltage I18= −200 µA − 250 400 mV
HIGH current V18=10V −−1µA

Muting (pin 8)

MUTE

V

O(offset)

mute attenuation (pin 8) V8< 0.4 V − 80 − dB

att

DC offset voltage (pins 10 and 11)

HCC (pin 15)

CR

deem

control range of de-emphasis see Figs 7 and 8

for European standard C
for USA standard C

V

15-17

control voltage (pin 15 due to pin 17) in both
standards

Noise interference detector

V

trigg

∆V

8

t

sup

I

13,14

V

pulse

trigger threshold (pin 6) f

voltage offset as a function of V

trigg

AF suppression time; pulse width − 40 −µs
input offset current (pins 13 and 14) during AF suppression

trigger sensitivity (pin 6) τ

stereo on − 24 30 mV
stereo off 820−mV

0 − 1V

α

= 6 dB; see Fig.5 −−85 − mV

cs

α

= 26 dB; see Fig.5 −−32 − mV

cs

>4V −−0.2 dB

V

8

after muting

= 6.8 nF 50 − 150 µs

deem

=10nF 75 − 225 µs

deem

lower value CR
upper value CR

= 120 kHz

int

V

8(DC)

V

8(DC)

V

=10mV − 200 − mV

6 trigg

= 100 mV − 2.3 − V

V

6 trigg

deem

deem

= 7.7 V − 10 − mV
= 6.7 V − 100 − mV

−−±400 mV

− 0 − mV

−−300 − mV

− 20 − nA

time

=10µs − 10 − mV

pulse

1996 Sep 02 7