Philips (Now NXP) SI4800 Schematic [ru]
M3D315
1. Product profile
1.1 Description
1.2 Features
1.3 Applications
SI4800
N-channel TrenchMOS™ logic level FET
Rev. 02 — 17 February 2004 Product data
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
■ Low gate charge ■ Surface mounted package
■ Low on-state resistance ■ Fast switching.
■ Portable appliances ■ Notebook computers
■ Lithium-ion battery chargers ■ DC-to-DC converters.
1.4 Quick reference data
■ VDS≤ 30 V ■ ID≤ 9A
■ P
≤ 2.5 W ■ R
tot
DSon
2. Pinning information
Table 1: Pinning - SOT96-1 (SO-8), simplified outline and symbol
Pin Description Simplified outline Symbol
1,2,3 source (s)
4 gate (g)
5,6,7,8 drain (d)
8
1
Top view MBK187
SOT96-1 (SO8)
5
4
≤ 18.5 mΩ
g
MBB076
d
s
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
3. Ordering information
Table 2: Ordering information
Type number Package
Name Description Version
SI4800 SO8 plastic small outline package; 8 leads SOT96-1
4. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
drain-source voltage (DC) 25 °C ≤ Tj≤ 150 °C - 30 V
gate-source voltage (DC) - ±20 V
drain current T
peak drain current T
total power dissipation T
=25°C; pulsed; tp≤ 10 s;
amb
=70°C; pulsed; tp≤ 10 s;
T
amb
=25°C; pulsed; tp≤ 10 µs;
amb
=25°C; pulsed; tp≤ 10 s;
amb
=70°C; pulsed; tp≤ 10 s;
T
amb
Figure 2 and 3 -9A
Figure 2 -7A
Figure 3 -40A
Figure 1 - 2.5 W
Figure 1 - 1.6 W
storage temperature −55 +150 °C
junction temperature −55 +150 °C
source (diode forward) current T
=25°C; pulsed; tp≤ 10 s - 2.3 A
amb
9397 750 12899
Product data Rev. 02 — 17 February 2004 2 of 12
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
T
amb
03aa11
(°C)
120
P
der
(%)
80
40
0
0 50 100 150 200
P
tot
P
der
-----------------------
P
tot 25 C°()
100%×= I
Fig 1. Normalized total power dissipation as a
function of ambient temperature.
2
10
T
amb
03aa19
(°C)
120
I
der
(%)
80
40
0
0 50 100 150 200
I
D
der
-------------------
I
D25C
()
100%×=
°
Fig 2. Normalized continuous drain current as a
function of ambient temperature.
03ap01
I
(A)
10
1
10
10
T
amb
D
-1
-2
Limit R
DSon
-1
10
=25°C; IDM is single pulse.
= V
DS
/ I
D
DC
1 10 10
tp = 10 µs
1 ms
10 ms
100 ms
10 s
VDS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
2
9397 750 12899
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 17 February 2004 3 of 12
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
5. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-a)
thermal resistance from junction to ambient mounted on a printed-circuit board;
minimum footprint; tp≤ 10 s;
Figure 4
5.1 Transient thermal impedance
--50K/W
2
10
10
1
10
10
T
amb
-1
-2
10
=25°C
δ = 0.5
0.2
0.1
0.05
0.02
-4
single pulse
-3
10
10
P
t
p
-2
10
-1
1 10 10
2
Z
th(j-amb)
(K/W)
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration.
03af83
t
p
δ =
T
t
T
3
t
10
(s)
p
9397 750 12899
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 17 February 2004 4 of 12
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