7.3.11Register 12: central servo offset cancellation
inputs A and B
7.3.12Register 13: central servo offset cancellation
inputs C and D
7.3.13Register 14: RF filter settings
7.3.14Register 15: DPD filter settings
TZA1038HW
7.4Internal digital control, serial bus and external
digital input signal relationships
7.4.1STANDBY mode
7.4.2RF only mode
7.5Signal descriptions
7.5.1Data path signals through pins A to D
7.5.2Data signal path through input pins RFSUMP
and RFSUMN
7.5.3HF filtering
7.5.4Focus signals
7.5.5Radial signals
7.5.5.1DPD signals (DVD-ROM mode) with no
drop-out concealment
7.5.5.2DPD signals (DVD-ROM mode) with
drop-out concealment
7.5.5.3Three-beam push-pull (CD mode)
7.5.5.4Enhanced push-pull
8LIMITING VALUES
9THERMAL CHARACTERISTICS
10CHARACTERISTICS
11APPLICATION INFORMATION
11.1Signal relationships
11.1.1Data path
11.1.2Servo path
11.2Programming examples
11.3Energy saving
11.4Initial DC and gain setting strategy
11.4.1Electrical offset from pick-up
11.4.2Gain setting servo
11.4.3DC level in RF path
11.4.4Gain setting RF path
12PACKAGE OUTLINE
13SOLDERING
13.1Introduction to soldering surface mount
packages
13.2Reflow soldering
13.3Wave soldering
13.4Manual soldering
13.5Suitability of surface mount IC packages for
wave and reflow soldering methods
14DATA SHEET STATUS
15DEFINITIONS
16DISCLAIMERS
2003 Sep 032
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
1FEATURES
• Operates with DVD-ROM, DVD+RW, DVD-RW,
CD-ROM and CD-RW
• Operates up to 64 × CD-ROM and 12 × DVD-ROM
• RF data amplifier with wide, fine pitch programmable
noise filter and equalizer equivalent to 64 × CD or
12 × DVD
• Programmable RF gain for DVD-ROM, CD-RW and
CD-ROM applications (approximately 50 dB range to
cover a large range of disc-reflectivity and OPUs)
• Additional RF sum input
• Balanced RF data signal transfer
• Universal photodiode IC interface using internal
conversion resistors and offset cancellation
• Input buffers and amplifiers with low-pass filtering
• Three different tracking servo strategies:
– Conventional three-beam tracking for CD
– Differential Phase Detection (DPD) for DVD-ROM,
including option to emulate traditional drop-out
detection: Drop-Out Concealment (DOC)
– Advanced push-pull with dynamic offset
compensation.
• Enhanced signal conditioning in DPD circuit for optimal
tracking performance under noisy conditions
• Radial error signal for Fast Track Counting (FTC)
• RF onlymode: servo outputs canbeset to 3-state, while
RF data path remains active
• Radial servo polarity switch
• Flexible adaption to different light pen configurations
• Two fully automatic laser controls for red and infrared
lasers, including stabilization and an on/off switch
• Automatic selection of monitor diode polarity
• Digital interface with 3 and 5 V compatibility.
TZA1038HW
2GENERAL DESCRIPTION
The TZA1038HW is an analog preprocessor and laser
supply circuit for DVD and CD read-only players. The
device contains data amplifiers, several options for radial
tracking and focus control. The preamplifier forms a
versatile, programmable interface between single light
path voltage output CD or DVD mechanisms to Philips
digital signal processor family for CD and DVD (for
example, Gecko, HDR65 or Iguana). A separate
high-speed RFSUM input is available.
The device contains several options for radial tracking:
• Conventional three-beam tracking for CD
• Differential phase detector for DVD
• Push-pull with flexible left and right weighting to
compensate dynamic offsets e.g. beam landing offset
• A radial error signal to allow Fast Track Count (FTC)
during track jumps.
The dynamic range of this preamplifier and processor
combination can be optimized for LF servo and RF data
paths. The gain in both channels can be programmed
separately and so guarantees optimal playability for all
disc types.
The RF path is fully DC coupled. The DC content
compensation techniques provide fast settling after disc
errors.
The device can accommodate astigmatic, single foucault
anddoublefoucault detectors and can beusedwithP-type
lasers with N-sub or P-sub monitor diodes. After an initial
adjustment, the circuit will maintain control over the laser
diode current. With an on-chip reference voltage
generator, a constant stabilized output power is ensured
and is independent of ageing.
An internal Power-on reset circuit ensures a safe start-up
condition.
3 V digital supply voltage2.73.35.5V
5 V digital supply voltage4.55.05.5V
supply currentwithout laser supply−98120mA
STANDBY mode−− 1mA
V
I(logic)
logic input compatibilitynote 12.73.35.5V
Servo signal processing
B
LF(−3dB)
−3 dB bandwidth of
LF path
I
O(LF)
output currentfocus servo output0−12µA
radial servo output0−12µA
V
O(FTC)(p-p)
FTC output voltage
(peak-to-peak value)
B
FTC
FTC bandwidthFTCHBW = 0−600−kHz
FTCHBW = 1; note 2−1200−kHz
V
I(FTCREF)
FTC reference input
voltage
RF data processing
A
RF
linear current gainprogrammable gain
RF channels6−49dB
RFSUM channels−6−+31dB
B
RF(−3dB)
f
0(RF)
t
d(RF)
−3 dB bandwidth of RFP
and RFN signal path
noise filter and equalizer
corner frequency
flatness delay in RF data
path
RFEQEN = 0;
RFNFEN = 0
BWRF = 0812.014.5MHz
BWRF = 127100145182MHz
equalizer on; flat from
0 to 100 MHz;
BWRF = 127
Z
i
input impedance of
pins A to D
PACKAGE
SOT545-2
6075100kHz
2.0−−V
1.25−2.75V
200300−MHz
−− 0.5ns
100−−kΩ
2003 Sep 034
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
i(RF)(FS)
V
i(SUM)(dif)
V
I(DC)
V
o(RF)(dif)(p-p)
V
O(RF)(DC)
V
i(RFREF)(CM)
Laser supply
I
o(laser)(max)
V
i(mon)
input voltage on
pins A to D for full-scale at
output
differential input voltage
on pins RFSUMP and
RFSUMN
DC input voltage range on
pins RFSUMP and
RFSUMN
differential output voltage
on pins RFP and RFN
(peak-to-peak value)
DC output voltage on
pins RFP and RFN
input reference voltage on
pin RFREF for common
mode output
maximum current output
to laser
input voltage from laser
monitor diode
atthe appropriate signal
path gain setting
RF signal path−− 600mV
LF signal path−−700mV
G
with respect to V
= −6dB−− 1800mV
RFSUM
SS
1.3−V
DDA
− 1.0V
−− 1.4V
0.35−V
DDA
− 1.9V
0.81.22.1V
−120−−mA
P-type monitor diode
LOW level voltage−V
HIGH level voltage−V
− 0.155 −V
DDA4
− 0.190 −V
DDA4
N-type monitor diode
LOW level voltage−0.155−V
HIGH level voltage−0.185−V
Notes
1. Input logic voltage level follows the supply voltage applied at pin V
2. High FTC bandwidth is achieved when IS1and IS2> 1.5 µA.
2003 Sep 035
DDD3
.
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
5BLOCK DIAGRAM
handbook, full pagewidth
RFSUMP
RFSUMN
OPUREF
FTCREF
V
DDL
REXT
CDMI
CDLO
DVDMI
DVDLO
V
DDA1
1
2
OPUREF
8
A
9
B
10
C
11
D
3
E
4
F
12
27
47
44
46
45
7
48
6
V
SSA1
5
A to D
5
VOLTAGE AND
REFERENCES
42
V
SSA2
V
DDA2
CURRENT
LASER 1
LASER 2
V
DDA3
43
SERVO SIGNAL PROCESSING
COMPENSATION
V
SSA3
37
RF DATA PROCESSING
MULTIPLEXER
4
3-BEAM
TRACKING
DPD
PUSH-PULL
OFFSET
41
V
SSA4
31
V
DDA4
DUAL
LASER
SUPPLY
V
SSD
RFREF
32
VARIABLE
GAIN STAGES
SELECT; SWAP
S1S2
19
SIDA
38
FTC
16
V
DDD3
V
15
TZA1038HW
4
FTC
COMPARATOR
SERIAL
INTERFACE
1718
SICLSILD
DDD5
23
TZA1038HW
39
RFP
40
RFN
36
OA
35
OB
34
OC
33
OD
30
S1
29
S2
28
OCENTRAL
25
FTC
20
COP
21
COM
22
COO
14
TM
26
TDO
MCE466
Fig.1 Block diagram.
2003 Sep 036
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
6PINNING
SYMBOLPINDESCRIPTION
RFSUMP1positive RF sum input
RFSUMN2negative RF sum input
E3input E
F4input F
V
DDA1
V
SSA1
DVDMI7input signal from DVD laser monitor diode
A8input A
B9input B
C10input C
D11input D
OPUREF12reference input from Optical Pick-Up (OPU)
n.c.13not connected
TM14test mode input (factory test only)
V
DDD3
SIDA16serial host interface data input
SICL17serial host interface clock input
SILD18serial host interface load
V
n.c.24not connected
FTC25fast track count output
TDO26test data output (factory test only)
FTCREF27FTC reference input
OCENTRAL28test pin for offset cancellation
S229servo current output 2 for radial tracking
S130servo current output 1 for radial tracking
V
SSA4
V
DDA4
OD33servo current output for focus D
OC34servo current output for focus C
OB35servo current output for focus B
OA36servo current output for focus A
V
DDA3
RFREF38DC reference input for RF channel common mode output voltage
RFP39positive RF output
RFN40negative RF output
5analog supply voltage 1 (RF input stage)
6analog ground 1
15digital supply voltage (serial interface 3 V I/O pads and FTC comparator)
19digital ground
23digital supply voltage (5 V digital core)
31analog ground 4
32analog supply voltage 4 (servo signal processing)
37analog supply voltage 3 (RF output stage)
TZA1038HW
2003 Sep 037
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
SYMBOLPINDESCRIPTION
V
SSA3
V
SSA2
V
DDA2
REXT44reference current input (connect via 12.1 kΩ to V
CDLO45CD laser output
CDMI46input signal from CD laser monitor diode
V
DDL
DVDLO48DVD laser output
41analog ground 3
42analog ground 2
43analog supply voltage 2 (internal RF data processing)
47laser supply voltage
SSA4
TZA1038HW
)
handbook, full pagewidth
RFSUMP
RFSUMN
V
DDA1
V
SSA1
DVDMI
OPUREF
SSA3
SSA2
DDL
CDLO
CDMI
V
DVDLOn.c.
48
47
46
45
1
2
3
E
4
F
5
6
7
8
A
9
B
10
C
D
11
12
13
14
15
16
TM
SIDA
DDD3
V
DDA2
V
V
REXT
43
42
44
TZA1038HW
17
18
19
SILD
SSD
V
SICL
V
41
20
COP
RFN
40
21
COM
RFP
39
22
COO
RFREF
38
23
DDD5
V
DDA3
V
37
24
n.c.
36
OA
35
OB
34
OC
33
OD
V
32
V
31
30
S1
29
S2
28
OCENTRAL
27
FTCREF
26
TDO
25
FTC
MCE467
DDA4
SSA4
Fig.2 Pin configuration.
2003 Sep 038
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
7FUNCTIONAL DESCRIPTION
7.1RF data processing
The RF data path is a fully DC-coupled, multi-stage
amplifier (see Fig.3). The input signal for data can be
selected from RF inputs A to D or from the summed
RF inputsRFSUMPandRFSUMN.Switchingbetweenthe
two sets of signals is performed by an internal multiplexer.
The signals are fully balanced internally to improve signal
quality and reduce power supply interference.
RF outputs RFP and RFN can be DC coupled to the
Analog-to-Digital Converter (ADC) of the decoder.
The RF input signals are from photodiodes and have
a largeDC content by nature. This DCcomponentmust be
removed from the signals for good system performance.
Built-in DACs, located after the input stages
G1and RFSUM,have the ability to dothis. The DAC range
and resolution is scaled with the gain setting of the first
amplifier stage. When the DC content is removed, the
RF signal can be DC coupled to the decoder. The main
advantage of DC coupling is fast recovery from signal
swings due to disc defects since there is no AC coupling
capacitance to slow the recovery. When using DC
coupling, both AC and DC content in the data signal is
known. The Philips Iguana decoders have on-chip control
loops to support Automatic Gain Control (AGC) and DC
cancellation.
Two separate DACs are available for cases where the left
and right side DC conditions can be different.
TZA1038HW
When it is not possible to have a DC connection between
the TZA1038HW and the decoder, the signals on servo
outputs OA to OD can be used as they contain the same
LP-filtered and DC coupled information.
Summing of the photodiode signals A to D is performed in
the second amplifier stage G2. Each individual diode
channel can be switched on, off or inverted with switches
SW-A to SW-D.
Switching between photodiode signals and RFSUM input
is performed immediately before the third amplifier
stage G3. This stage has a variable gain with fine
resolution to allow automatic gain adjustment to be
controlled by the decoder.
The filter stage limits the bandwidth according to the
maximum playback speed of the disc. This is to optimize
the noise performance. The filter stage consists of an
equalizer and a noise filter, both of which can be
bypassed,alsothe boost factor of the equalizer canbeset.
Thecorner frequencies ofthe equalizer and noisefilter are
equal and can be programmed to a 7-bit resolution.
The RF output signals RFP and RFN can be DC coupled
to a decoder with a differential input pair (as with Philips
Iguana decoders). The common mode output voltage can
be set externally at pin RFREF.
The signals for differential phase detection are tapped
from the inputs A to D at the RF amplifier G1stages.
DC cancellation for the A to D and RFSUM signal paths
can be set independently or simultaneously.
2003 Sep 039
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2003 Sep 0310
ndbook, full pagewidth
RFREF
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
RFSUMP
RFSUMN
OPUREF
RF
inputs
38
39
RFP
RFN
outputs
servo
radial
outputs
RF
40
30
S1
29
S2
TZA1038HW
MCE468
RF
RF
DPD-A
OFFSL
DPD-B
DPD-C
OFFSR
DPD-D
RFSUM
SW-A
SW-B
SW-C
SW-D
RF
OFFSS
G
3
EQUALIZER
NOISE
FILTER
TZA1038HW
G
2
DPD-A
DPD-D
DPD-C
DPD-B
central aperture signal
DPD
FILTER
DOC
1
2
12
G
8
A
9
B
10
C
11
D
1
G
1
G
1
G
1
Fig.3 RF data and DPD processing.
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
7.2Servo signal processing
The photodiode configurations and naming conventions
are shown in Figs 4 and 5.
7.2.1SERVO SIGNAL PATH SET-UP
A block diagram of theservo signal path is shown in Fig.6.
In general, the servo signal path comprises:
• Avoltage-to-currentconverterwith programmable offset
voltage source V
• A 4-bit DAC for each of the six channels to compensate
for offset per channel
• A variable gain stage to adapt the signal level to the
specific pick-up and disc properties
• Low-pass filtering and output stage for the photodiode
current signals
• Error output stage in the radial data path for fast track
counting.
Servo output signals OA to OD, S1 and S2 are unipolar
current signals which represent the low-pass filtered
photodiode signals. In DPD radial tracking, the S1 and S2
signalsaretheequivalentofthe satellite signals commonly
found in traditional CD systems.
The servo output signals OA to OD, S1 and S2 are set to
3-state if bit RFonly = 1 (register 13, bit 11).
handbook, halfpage
Data=A+B+C+D
Push-pull = (A + B) − (C + D)
Focus = (A + C) − (B + D)
DPD2 = phase (A + B, C + D)
DPD4 = phase (A,D) + phase (C,B)
that is common to all inputs
LFOFFS
BA
CD
left
tangential direction
right
MGW553
TZA1038HW
handbook, halfpage
Data=A+B+C+D
Push-pull = A − D
Focus = C − B
DPD2 = phase (A, D)
DPD4 not applicable
Fig.5 Foucault diode configuration.
7.2.2F
OCUS SERVO
Focus information is reflected in the four outputs
OA to OD. Gain and offset can be programmed.
For optical pick-ups where only channels B and C are
used for focus, channels A and D can be switched off
(bit Focus_mode = 0).
For initial alignment, a copy of the output currents can be
made available on pin OCENTRAL.
7.2.3RADIAL SERVO
Radial information can be obtained from the two output
signals S1 and S2, and the gain and offset can be
programmed. The TZA1038HW provides differential
phase detection, push-pull and three-beam push-pull for
radial tracking. The signal FTC is made available for fast
track counting and is primarily the voltage error signal
derived from signals S1 or S2.
left
tangential direction
right
DCBA
MGW554
Fig.4 Astigmatic diode configuration.
2003 Sep 0311
Thepolarityofthe radial loop can be reversed via theserial
control bus (RAD_pol).
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2003 Sep 0312
ndbook, full pagewidth
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
RF
inputs
DPD
8
A
9
B
10
C
11
D
3
E
4
F
V
/
C
OFFSA
V
/
C
OFFSB
V
/
C
OFFSC
V
/
C
OFFSD
V
/
R
OFFSE
V
/
R
OFFSF
26k
I
14k
30k
I
14k
30k
I
14k
30k
I
14k
15k
I
15k
I
MUX
2−α
G
G
G
G
α
LFC
LFC
LFC
LFC
G
G
LFR
LFR
MUX
SWAP
CA
FTC
25
FTC
27
FTCREF
30
S1
servo
radial
S2
OA
OB
OC
OD
outputs
servo
focus
outputs
29
36
35
34
33
OPUREF
V
LFOFFS
12
LF
OFFS
TZA1038HW
F
OFFS
OCENTRAL
28
MCE469
OCENTRAL
TZA1038HW
Fig.6 Servo signal path.
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
7.2.4DIFFERENTIAL PHASE DETECTION
The TZA1038HW provides differential phase detection to
support DVD in various ways:
• DPD2withfour channels programmed to be activegives
DPD as required in the standard specification
• Two of the four channels can be excluded from the DPD
for pick-ups with analternative photodiode arrangement
• An increase in performance, dedicated for DVD+RW,
can be obtained by using the DPD4 method. Then two
truly separated phase detectors are active. After the
phase detection of the two input pairs the result is
summed.
InputsignalsforDPD are taken from input pins A to D after
thefirst gain stage G1(seeFig.3). Pre-emphasis is applied
by means of a programmable lead/lag filter. Additionally, a
programmable low-pass filter is available to improve the
signal quality under noisy signal conditions at lower
speeds. For further signal improvements the DPD pulse
stretcher can be programmed to higher values at lower
speeds.
The DPD signal is low-pass filtered by two internal
capacitors. The signal is then fed to pins S1 and S2, or
directedviathe drop-out concealment circuit to theoutputs
(see Section 7.5).
7.2.4.1Drop-out concealment
A special function is built in for compatibility with drop-out
detection strategies, based on level detection in the
S1 and S2 signals. When using DPD in a fundamental
way, there is no representation of mirror level information
from the light pen.
When the drop-out concealment function is enabled
(bit DOCEN = 1), a portion of the Central Aperture (CA)
signal is added to S1 and S2. Also, when the CA signal
drops below the DOC threshold, the DPD signal is
gradually attenuated.
The DPD detection cannot work properly when the input
signal becomes very small. The output of the DPD may
then show a significant offset. The DOC may not conceal
this offset completely because:
• DOC is gradually controlled from the CA signal
• The CA signal may not become 0 during disc-defect.
For details see Section 7.5.5.2
7.2.4.2Push-pull and three-beam push-pull
The TZA1038HW can also provide radial information by
means of push-pull signals (from the photodiodeinputs) or
TZA1038HW
in a three-spot optical system with Three-Beam Push-Pull
(TBPP). The built-in multiplexer gives a flexible method of
dealing with many detector arrangements. For push-pull,
the input signals are taken from channels A to D. There is
also a command that switches off channels B and C,
leaving channels A and D for push-pull
(bits RT_mode[2:0]).
ForTBPP, the input signal is takenfromchannels E and F,
irrespective of bit RFSUM setting.
7.2.4.3Enhanced push-pull (dynamic offset
compensation for beam landing)
Thisoptioncancels offsets due to beam landing.Afactor α
canbe programmed to re-balancethe signal gain between
channels S1 and S2. In a simplified form this can be
described as:
S1 = A
S2 = A
Factor α can be programmed in a range from 0.6 to 1.35,
with 1.0 as the balanced condition (bits α[3:0]).
7.2.4.4Offset compensation
A provision is made to compensate electrical offset from a
light pen. The offset voltage from the light pen can be
positiveornegative.In general, the offset between any two
channels is smaller than the absolute offsets. As negative
input signals cannot be handled by the TZA1038HW
internal servo channels, a two-step approach is adopted:
• A coarse DAC, common to all the input channels, adds
an offset that shifts the input signals in positive direction
until all inputs are ≥0. The DAC used (LF
2-bit resolution (bits LF
• A fine setting per channel is provided to cancel the
remainder of the offset between the channels. This is
achieved by DACs subtracting the DC component from
thesignalsandbringingtheinputs to approximately zero
offset (within ≈ 1 mV). The DACs (registers 11 to 13)
have a 4-bit resolution.
The range of both DACs can be increased by a factor of
three to compensate for higher offset values by means of
control parameter bit SERVOOS.
With a switched-off laser, the result of the offset
cancellation can be observed at each corresponding
output pin, OA to OD, S1 and S2, or via a built-in
multiplexer to pin OCENTRAL (central channels only).
See registers 11 to 13 for DAC and multiplexer control.
×α×input left
LFR
× (2 −α)×input right.
LFR
OFF
[1:0]).
OFFS
) has a
2003 Sep 0313
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
7.2.5AUTOMATIC DUAL LASER SUPPLY
The TZA1038HW can control the output power of two
lasers; it has an Automatic Laser Power Control (ALPC)
that stabilizes the laser output power and compensates
the effects of temperature and ageing of the laser.
ALPC automatically detects if there is a P-type or N-type
monitor diode in use in either of the laser circuits. The
regulation loop formed by the ALPC, the laser, the monitor
diode and the associated adjustment resistor will settle at
themonitorinputvoltage. The monitor input voltage can be
programmed to HIGH (≈ 180 mV) or LOW (≈ 150 mV),
according to frequently-used pre-adjustments of the light
pen. This set point can be set independently for both
ALPCs. Bandwidth limitation and smooth switch-on
behaviour is realized using an internal capacitor.
A protection circuit is included to prevent laser damage
dueto dips in laser supplyvoltage V
dip occurs, the output can saturate and restrict the
required laser current. Without the protection circuit, the
ALPC would try to maximize the output power with
destructive results for the laser when the supply voltage
recovers. The protection circuit monitors the supply
voltage and shuts off the laser when the voltage drops
belowasafe value. The ALPC recovers automaticallyafter
the dip has passed.
Only one laser can be activated at the same time.
An internal break-before-make circuit ensures safe
start-up for the laser when a toggle situation between the
two lasers is detected. When both lasers are programmed
on, neither laser will be activated.
7.2.6POWER-ON RESET AND GENERAL POWER ON
When the supply voltage is switched on, bit PWRON is
reset by the Power-On Reset (POR) signal. This
concludes in a STANDBY mode at power up. POR is
intended to prevent the lasers being damaged due to
randomsettings.Allotherfunctionsmay be switched when
power is on. The TZA1038HW becomes active when
bit PWRON = 1.
.If a supply voltage
DDL
TZA1038HW
7.2.7COMPATIBILITY WITH TZA1033HL/V1
7.2.7.1Software compatibility
The TZA1038HW is highly software compatible with the
TZA1033HL/V1. Provided that some conditions are met,
the software of the TZA1038HW can be used as a
successor with just minor modifications. This compatibility
is achieved with the implementation of the TZA1038HW
mode control bit (bit K2_Mode). When bit K2_Mode = 0,
the TZA1038HW will act as a TZA1033HL/V1. When
bit K2_Mode = 1, the TZA1038HW will act as a
TZA1033HL/K2 and the new functions will be available
(but require a software update).
Other conditions or restrictions are:
• Registerbits of the TZA1038HW whichwere not defined
areprogrammedto a logic 0. Registers 9, 10, 14 and 15
may be left undefined
• The G4stage high gain setting of the TZA1033HL/V1 is
not available in the TZA1038HW; if this value was set to
logic 0, there will be no difference
• Whenbit K2_Mode = 0the RF bandwidth will be fixed to
theminimumvalueof10 MHz(typical);bit K2_Mode = 1
toselect a higher bandwidth; the bandwidthisnow lower
than using a TZA1033HL/V1.
7.2.7.2Hardware compatibility
Thepackageis changed from LQFP64 for theTZA1033HL
to LQFP48 for the TZA1038HW.
The hardware differences are:
• Input pins STB, HEADER and LAND of the TZA1033HL
are not present
• Input pins CD of TZA1033HL/V1 are not used;
TZA1038HW has RFSUM inputs instead; the RFSUM
inputs of TZA1038HW may be connected to ground
when not used.
2003 Sep 0314
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
7.2.8INTERFACE TO THE SYSTEM CONTROLLER
Programming the registers of TZA1038HW is done via a
serial bus (see Fig.7). The circuitry is formed by a serial
input shift register and a number of registers that store the
data. The registers can always be programmed,
irrespective of STANDBY mode.
If required, the bus lines can be connected in parallel with
an I2C-bus. The protocol needs no switching of the data
line during SICL = HIGH. This means that other I2C-bus
devices will not recognise any START or STOP
commands. Control words addressed to TZA1038HW
handbook, full pagewidth
SICL
SIDA
TZA1038HW
should go uniquely with the SILD signal. When
SILD = HIGH, the TZA1038HW will not respond to any
signal on SIDA or SICL.
During a transmission, the serial data is first stored in an
input shift register. At the rising edge of SILD, the content
of the input register is copied into the addressed register.
This is also the moment the programmed information
becomes effective.
The input pins have CMOS compatible thresholdlevels for
both 3.3 and 5 V supplies.
The TZA1038HW is controlled by serial registers. To keep programming fast and efficient, the control bits are sent in
16-bit words. Four bits of the word are used for the address and for each address there are 12 data bits.
Table 1 Overview of control parameters
SYMBOLPARAMETERVALUESREGISTERBITS
Data path
G
)gain of first RF amplifier stage
1(A1
0, 6 and 12 dB (1×, 2× and 4×)311 and 10
(or linear amplification)
)gain of second RF amplifier
G
2(A2
6, 12, 18 and 24 dB (2×, 4×, 8× and 16×)39 and 8
stage (or linear amplification)
G
)gain of third RF amplifier
3(A3
0 to 13 dB in steps of 0.8 dB (1× to 4×)37to4
stage (or linear amplification)
GRFSUM
(A
RFSUM
)
gain of RFSUM input stage (or
linear amplification)
BWRFbandwidth limitation in
−6, 0, 6, 12 and 18 dB
07 to 5
(0.5×,1×,2×,4×and 8×)
= 12 to 145 MHz146 to 0
f
0(RF)
RF path
2003 Sep 0315
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
SYMBOLPARAMETERVALUESREGISTERBITS
RF
OFFSL
RF
OFFSR
RF
OFFSS
Servo radial path
LF
OFFS
R
LFR
R
LFPP
R
OFFSE
R
OFFSF
αdynamic radial offset
I
(FS)(DPD),
I
(FS)(DPD)(DOC)
I
REFRAD(CM)
f
start_DPD
DC offset compensation in left
RF input path
DC offset compensation in
right RF input path
DC offset compensation in
RFSUM path
DC offset compensation for
LF path (common for all servo
inputs)
CD satellite path input
transresistance
DVD push-pull signal
transresistance
DC offset compensation for
radial servo path (input E)
DC offset compensation for
radial servo path (input F)
compensation factor
full scale DPD current, fixed
value based on bandgap
voltage across external
resistor
internally generated common
mode DC reference current in
DPD mode
start frequency lead/lag filter
of DPD block
RFSUM = 0; full range depends on
411to6
G1setting:
G
= 0 dB: 0 to 450 mV in 7.1 mV steps
1
G
= 6 dB: 0 to 225 mV in 3.6 mV steps
1
G
= 12 dB: 0 to 120 mV in 1.9 mV steps
1
RFSUM = 0; full range depends on
45 to 0
G1setting:
= 0 dB: 0 to 450 mV in 7.1 mV steps
G
1
G
= 6 dB: 0 to 225 mV in 3.6 mV steps
1
G
= 12 dB: 0 to 120 mV in 1.9 mV steps
1
RFSUM = 1; full range depends on
4or55to0
GRFSUM setting:
GRFSUM = −6 dB; 0 to 1700 mV
GRFSUM = 0 dB; 0 to 850 mV
GRFSUM = 6 dB; 0 to 425 mV
GRFSUM = 12 dB; 0 to 210 mV
GRFSUM = 18 dB; 0 to 105 mV
SERVOOS = 0:
V
=0,5,10or15mV
LFOFFS
1111 and 10
SERVOOS = 1:
V
= 0, 15, 30 or 45 mV
LFOFFS
15 kΩ fixed−−
30 kΩ fixed−−
SERVOOS = 0: V
SERVOOS = 1: V
SERVOOS = 0: V
SERVOOS = 1: V
ROFFSE
ROFFSE
ROFFSF
ROFFSF
= 0 to 20 mV117 to 4
= 0 to 60 mV
=0to20mV113to0
=0to60mV
α = 0.6 to 1.35 in 15 steps of 0.0563 to 0
DOCEN = 0: fixed value = 20 µA15
DOCEN = 1: fixed value = 6.6 µA
3.5 µA fixed−−
f
start_DPD
= 1, 5 or 10 MHz
71 and 0
(TZA1033HL/V1 compatible)
f
start_DPD
= 1, 5, 10, 18 or 24 MHz155 to 3
2003 Sep 0316
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
SYMBOLPARAMETERVALUESREGISTERBITS
G
LFR(ALFR
R
FTC
Servo focus path
R
LFC
C
OFFSA
C
OFFSB
C
OFFSC
C
OFFSD
G
LFC(ALFC
βfocus offset compensationβ =0to
F
OFFSEN
)lowfrequency gain, radialpath
output stage (or linear
amplification)
gain of fast track count output680 kΩ±20% fixed for ±2 V (p-p)−−
LF path input transresistance14 kΩ fixed−−
DC offset compensation for
central servo path A
DC offset compensation for
central servo path B
DC offset compensation for
central servo path C
DC offset compensation for
central servo path D
)low frequency gain, central
path output stage (or linear
amplification)
full range offset compensation
for focus
−15 to +9 dB in steps of 3 dB
611to8
(0.18× to 2.8×)
SERVOOS = 0: 0 to 20 mV127 to 4
SERVOOS = 1: 0 to 60 mV
SERVOOS = 0: 0 to 20 mV123 to 0
SERVOOS = 1: 0 to 60 mV
SERVOOS = 0: 0 to 20 mV137 to 4
SERVOOS = 1: 0 to 60 mV
SERVOOS = 0: 0 to 20 mV133 to 0
SERVOOS = 1: 0 to 60 mV
−15 to +9 dB in steps of 3 dB
67 to 4
(0.18× to 2.8×)
31
⁄
32
DAC enabled: I
DAC disabled: I
= 400 nA (fixed)210
FOFFS
=0nA
FOFFS
24 to 0
7.3.1REGISTER 0: POWER CONTROL
Table 2 Register address 0H
BIT15141312111098
SYMBOL
AD3AD2AD1AD0−−−−
BIT76543210
SYMBOL
GRF
SUM2
GRF
SUM1
GRF
SUM0
DVD_ MILVLCD_MILVLDVD_ LDONCD_LDONPWRON
Table 3 Description of register bits (address 0H)
BITSYMBOLFUNCTION
15 to 12AD[3:0]0000 = address 0H
11 to 8−not used
7 to 5GRFSUM[2:0]Gain of RFSUM input stage.
000 = −6dB
001 = 0 dB
010 = 6 dB
011=12dB
100=18dB
bit RFSUM = 0: right RF channel offset compensation value (symbol is RF
bit RFSUM = 1 and bit DPD_DCC = 1: not used
bit RFSUM = 1 and bit DPD_DCC = 0: the decoder controls DPD and RFSUM
channels automatically, in parallel and with same values (symbol is RF
OFFSL
OFFSR
OFFSS
5RF
3/
3
RF
RF
OFFSL
OFFSR
OFFSS
4RF
2/
2
RF
RF
OFFSL
OFFSR
OFFSS
3RF
1/
1
RF
RF
OFFSS
OFFSL
OFFSR
OFFSS
OFFSR
).
2
0/
0
)
7.3.6R
EGISTER 5: RF SUM OFFSET COMPENSATION
Table 12 Register address 5H
BIT15141312111098
SYMBOL
AD3AD2AD1AD0−−−−
BIT76543210
SYMBOL
−−RF
OFFSS
5RF
OFFSS
4RF
OFFSS
3RF
OFFSS
2RF
OFFSS
1RF
OFFSS
Table 13 Description of register bits (address 5H)
BITSYMBOLFUNCTION
15 to 12AD[3:0]0101 = address 5H
11 to 6−not used
5to0RF
[5:0]RF offset compensation definition.
OFFSS
bit RFSUM = 0: not used
bit RFSUM = 1 and bit DPD_DCC = 0: not used
bit RFSUM = 1 and bit DPD_DCC = 1: the decoder controls RFSUM channels;
the DPD channels can be set independently from the microprocessor.
0
2003 Sep 0320
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
7.3.7REGISTER 6: SERVO GAIN AND DYNAMIC RADIAL OFFSET COMPENSATION FACTOR
Table 14 Register address 6H
BIT15141312111098
SYMBOL
AD3AD2AD1AD0G
BIT76543210
SYMBOL
3G
G
LFC
2G
LFC
1G
LFC
0α3α2α1α0
LFC
Table 15 Description of register bits (address 6H)
BITSYMBOLFUNCTION
15 to 12AD[3:0]0110 = address 6H
11 to 8G
[3:0]Low frequency gain, radial path output stage. 0000 to 1000: −15 to +9 dB
LFR
in 3 dB steps.
7to4G
[3:0]Low frequency gain, central path output stage. 0000 to 1000: −15 to +9 dB
LFC
in 3 dB steps.
3to0α[3:0]Dynamic radial offset compensation factor. 0000 to 1111: 0.60 to 1.35
in 0.05 steps; 1000 = balanced value (default).
3G
LFR
2G
LFR
1G
LFR
LFR
0
7.3.8R
EGISTER 7: SERVO PATH GAIN AND BANDWIDTH AND RF PATH BANDWIDTH AND PRE-EMPHASIS
Definitions in register 7 are intendedmainly for software compatibility with the TZA1033HL/V1. Newfeatures that require
morebit-space to program aremovedto registers 14 and 15. Only DPDstretchremains programmed in register 7.Some
parameters are slightly modified.
Table 16 Register address 7H
BIT15141312111098
SYMBOL
AD3AD2AD1AD0DPDLPF1DPDLPF0DPD_
stretch2
DPD_
stretch1
BIT76543210
SYMBOL
DPD_
stretch0
DPD_
testmode
DVDALAS_
mode
EQ
2EQ
RF
1EQ
RF
RF
0f
start_DPD
1f
start_DPD
0
Table 17 Description of register bits (address 7H)
FUNCTION
BITSYMBOL
K2_Mode = 0K2_Mode = 1
15 to 12AD[3:0]0111 = address 7H0111 = address 7H
11 and 10 DPDLPF[1:0]DPD low-pass filter.not applicable
SERVOOS = 0: 0 to 20 mV; bit SERVOOS = 1: 0 to 60 mV.
SERVOOS = 0: 0 to 20 mV; bit SERVOOS = 1: 0 to 60 mV.
1R
OFFSF
OFFSF
0
7.3.11REGISTER 12: CENTRAL SERVO OFFSET CANCELLATION INPUTS A AND B
Table 22 Register address CH
BIT15141312D11D10D9D8
SYMBOL
AD3AD2AD1AD0TSTDPDRFTSTSRV2TSTSRV1TSTSRV0
BITD7D6D5D4D3D2D1D0
SYMBOL
C
OFFSA
3C
OFFSA
2C
OFFSA
1C
OFFSA
0C
OFFSB
3C
OFFSB
2C
OFFSB
1C
2003 Sep 0323
OFFSB
0
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
Table 23 Description of register bits (address CH)
BITSYMBOLFUNCTION
15 to 12AD[3:0]1100 = address CH
11TSTDPDRFDPD RF test bit. With this bit the DPD filter performance is checked. 0 = normal
operation; 1 = RF signal filtered by the DPD block is connected to the RFoutput.
10 to 8TSTSRV[2:0]Test matrix for servo signals to pin OCENTRAL.
000 = normal operation
001 = filter DAC current for test purposes
011 = CA (sum A to D)
100 = channel A
101 = channel B
110 = channel C
111 = channel D
7to4C
3to0C
[3:0]Central servo input A offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;
OFFSA
bit SERVOOS = 1: 0 to 60 mV.
[3:0]Central servo input B offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;
OFFSB
bit SERVOOS = 1: 0 to 60 mV.
7.3.12REGISTER 13: CENTRAL SERVO OFFSET CANCELLATION INPUTS C AND D
Table 24 Register address DH
BIT15141312111098
SYMBOL
AD3AD2AD1AD0RFonly−−−
BIT76543210
SYMBOL
C
OFFSC
3C
OFFSC
2C
OFFSC
1C
OFFSC
0C
OFFSC
3C
OFFSC
2C
OFFSC
1C
OFFSC
0
Table 25 Description of register bits (address DH)
BITSYMBOLFUNCTION
15 to 12AD[3:0]1101 = address DH
11RFonlyOperation mode. 0 = normal operation; 1 = RF only mode (servo outputs
OA to OD, S1 and S2 are 3-state).
10 to 8−not used
7to4C
[3:0]Central servo input C offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;
OFFSC
bit SERVOOS = 1: 0 to 60 mV.
3to0C
[3:0]Central servo input D offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;
OFFSD
bit SERVOOS = 1: 0 to 60 mV.
2003 Sep 0324
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
7.3.13REGISTER 14: RF FILTER SETTINGS
Table 26 Register address EH
BIT15141312111098
SYMBOL
BIT76543210
SYMBOL
Table 27 Description of register bits (address EH); bit K2_Mode = 1
7.4Internal digital control, serial bus and external
digital input signal relationships
The settings of all internal switches, DACs and modes of
operationcanbeprogrammed via the serial bus. There are
also a few external digital signals which influence the
programmed settings.
7.4.1STANDBY MODE
Toensurea safe start-up, the TZA1038HWhasan internal
Power-on reset that resets on bit PWRON. During
STANDBY mode, most circuits, including laser supplies,
are switched off.
bit CD_LDON = 1 if CD laser is on and POWERON
bit DVD_LDON = 1 if DVD laser is on and POWERON.
7.4.2RF ONLY MODE
The servo outputs can be disabled for easy interfacing in
systems where two front-end signal processors are used.
This mode will set the outputs OA to OD, S1 and S2 to
3-state. The RF data path remains active.
7.5Signal descriptions
The variables A1to A3, A
RFSUM, ALFC
linear equivalents of G1to G3, GRFSUM, G
and A
LFR
LFC
, are the
and G
7.5.1DATA PATH SIGNALS THROUGH PINS A TO D
With bit RFSUM = 0:
(DVD
High speed advanced analog DVD signal
processor and laser supply
Switches SW-A to SW-D can be programmed 1, −1or0
(respectively pass, invert or not pass the signal) for each
channel. In this way the data can be read by any
combination of diode inputs.
The first gain stage also carries the signals for DPD
tracking. Therefore this stage will also be active when
RFSUM input and DPD is selected. The DC offset
cancellation is also active in this situation but left and right
channels are controlled from a single DAC. Also in this
situation, the A to D and RFSUM inputs are used
simultaneously.
Control of the DC offset DACs can be chosen to be from
the same register or from two independent registers
(registers 4 and 5).
The differential HF signal from the G3stage is sent to a
filter section that consists of an equalizer and a noise filter,
whicharecontrolledbybits BWRF,RFKEQ,RFEQENand
RFNFEN. The equalizer has a transfer function H
which is modelled after a target transfer function H
H
e
This represents a third-order equi-ripple phase filter with a
good delay response. The boost factor k is programmable
via the serial bus control bit RFKEQ. The corner
frequency ω
parameter bit BWRF. The equalizer is switched on with
control bit RFEQEN.
The noise filter has a transfer function H2(s) which is
modelledafterathird-order Butterworth low-pass filter with
target transfer function H
filter. The noise filter is switched on with bit RFNFEN.
7.5.4FOCUS SIGNALS
Focus servo signals:
OA =× A
+ β×F
OB =× A
+(1−β)×F
OC =× A
+ β×F
OD =× A
+(1−β)×F
1
------------ R
LFC
OFFS
1
------------ R
LFC
1
------------ R
LFC
OFFS
1
------------ R
LFC
× (A − OPUREF + LF
LFC
× (B − OPUREF + LF
LFC
OFFS
× (C − OPUREF + LF
LFC
× (D − OPUREF + LF
LFC
OFFS
The parameter β can be programmed via the serial bus.
The focus offset DAC can be switched on with the control
bit F
OFFSEN
.
7.5.5RADIAL SIGNALS
7.5.5.1DPD signals (DVD-ROM mode) with no
drop-out concealment
DPD tracking can be activated with bits RT_mode[2:0] of
register 1. Input signals are taken from the diode inputs
A to D, through the input stage G1 and the DC offset
cancellationDAC. When bit RFSUM = 0, theinputstage is
also used for the RF signal. When bit RFSUM = 1, the
setting for G1and DC offset controlcan be independent of
the setting for the data signal which goes through RFSUM.
S1
DPD=I(FS)(DPD)
S2
= −I
DPD
∆ t
is the time difference between the two input signals,
-----T
P
(FS)(DPD)
∆ t
×+I
-----T
P
∆ t
×+I
-----T
P
relative to the period time T
is the full scale range.
1
×=
---------------------s
1
+
------------
ω
0RF
is equal tothat of the equalizer
− C
OFFS
OFFS
OFFS
OFFS
REFRAD
REFRAD
of the input signal. I
P
− C
− C
− C
(FS)(DPD)
OFFSA
OFFSB
OFFSC
OFFSD
)
)
)
)
2003 Sep 0327
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
The bandwidth of the DPD signal is limited by the 100 kHz
phase detector integration filters and the bandwidth of the
output stages (100 kHz for S1 and S2).
The input signals used for DPD depend on the
programmed radial tracking mode (bits RT_mode[2:0]):
DPD
DPD
Range ofis from −0.5 to + 0.5.
∆ t
-----T
P
= DPD2:(A,D) or DPD2:(A + C,B+D)
mode
= DPD4: 0.5[(A,D) +(C,B)]
mode
∆ t
-----T
P
> 0 if A,C phase leads with respect to D,B phase.
FTC = (S1 − S2) × (R
∆t
-----T
P
FTC
∆ t
-----T
P
+ FTCREF)
ForS1 and S2bit RAD_polis assumed to be set to logic 1.
Otherwise the signals appearing at S1 and S2 will be
swapped.
7.5.5.2DPD signals (DVD-ROM mode) with
drop-out concealment
With bit DOCEN = 1, drop-out concealment is activated
and the S1 and S2 outputs change:
• Thecommonmodelevel (I
REFRAD
the CA signal
• The scaling changes.
At low signal levels (SUM < DOC
∆ t
ofis reduced smoothly.
-----T
P
S1
S2
DPD
DPD
=C×I
= −C × I
(FS)(DPD)(DOC)
(FS)(DPD)(DOC)
∆ t
×+ 0.25 × CA.
-----T
P
∆ t
×+ 0.25 × CA.
-----T
Where:
• I
(FS)(DPD)(DOC)
is the full scale range
• C = concealment multiplier, C = 0 to 1 when CA is
0 to DOC
threshold
• CA=OA+OB+OC+OD
• DOC
is typically 3 µA.
threshold
∆ t
-----T
P
∆ t
-----T
P
)isnowdetermined by
), the contribution
threshold
P
TZA1038HW
ForS1 and S2bit RAD_polis assumed to be set to logic 1.
Otherwise the signals appearing at S1 and S2 will be
swapped.
The DPD detection can not work properly when the input
signal becomes very small. The output of the DPD may
then show a significant offset. The DOC may not conceal
this offset completely because:
• DOC is gradually controlled from the CA signal
• The CA signal may not become 0 during disc-defect.
7.5.5.3Three-beam push-pull (CD mode)
When the three-beam system is used, the radial signals
S1 and S2 can be composed from inputs E and F.
to 600 kHz).
ForS1 and S2bit RAD_polis assumed to be set to logic 1.
Otherwise the signals appearing at S1 and S2 will be
swapped.
7.5.5.4Enhanced push-pull
Top hold push-pull method is supported but only in
conjunction with a compatible decoder. The peak hold
function is executed in the decoder, by measuring the
mirror levels of the gap-zones in each header. The
TZA1038HW will compensatefor offset errors in two ways:
• The DC offset from the pick-up can be compensated by
means of a DAC (C
OFFSx
• The dynamic offsets can be compensated by means of
the multiplier ratio α.
The correction values must be calculated in the decoder
and programmed via the serial bus. The method is called
the enhanced push-pull method.
ForS1 and S2bit RAD_polis assumed to be set to logic 1.
Otherwise the signals appearing at S1 and S2 will be
swapped.
The signals from the B and C channels can be switched off, depending on the photodiode configuration
(bit RT_mode[2:0]).
C
OFFSCOFFSCCOFFSD
R
LFPP
–()–×+×–+
OFFSACOFFSB
–()–×+×–+
2003 Sep 0329
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
8LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOLSPARAMETERCONDITIONSMIN.MAX.UNIT
V
DD
T
amb
V
esd
Note
1. ESD behaviour is tested in accordance with JEDEC II standard:
HBM is equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
MM is equivalent to discharging a 200 pF capacitor through a 0.75 µH series inductor.
HIGH level voltage0.1750.1850.2V
laser output voltage−−V
low supply voltage
3.63.84.0V
− 0.5V
DDL
protection level
2003 Sep 0335
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
∆V
prot
I
I(mon)
I
o(laser)(max)
t
on(laser)
FTC comparator
V
I(CM)
V
OL
V
OH
V
IO
I
LI
A
V
t
, t
r
f
t
res
Serial bus interface (see Fig.8)
V
IH
V
IL
I
IH
I
I
t
su(strt)
t
su(D)
t
h(D)
t
clk(H)
t
clk(L)
T
clk
t
su(load)
t
load(H)
low supply voltage
−200−mV
protection
hysteresis
laser monitor diode
−−200nA
input current
maximum current
−120−−mA
output to laser
laser switch on time−3−ms
common mode
0−2.5V
input voltage
LOW-level output
0−0.5V
voltage
HIGH-level output
V
− 0.5−V
DDD3
DDD3
voltage
input offset voltage−−10mV
input leakage
−−100nA
current
voltage gain−200−V/mV
rise and fall timeCL=15pF−250−ns
response timeV
HIGH-level input
= 200 mV (p-p)−200−ns
I(dif)
0.7V
DDD3
−−V
voltage
LOW-level input
−−0.3V
DDD3
voltage
HIGH-level input
current on pin TM
input incorporates
internal pull-down
−−100µA
resistor
input currentpins SIDA, SICL and
−−100nA
SILD
start set-up time0−−ns
data set-up time5−−ns
data hold time20−−ns
clock HIGH time10−−ns
clock LOW time10−−ns
clock period30−−ns
load pulse set-up
30−−ns
time
load pulse HIGH
10−−ns
time
V
V
Notes
1. Level follows the applied supply voltage at pin V
DDD3
.
2003 Sep 0336
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
2. This range for the servo path is designed to be larger than for the data path so that the servo path can handle
out-of-focus situations.
G1 G2 G3++()
-----------------------------------------
3. A =[dB] or A =[dB] (see Section 7.5).
10
20
4. Input impedance depends on gain setting. Highest gain has lowest input impedance.
5. The gain of the RF sum channel, when programmed to −6 dB, will be increased when the supply voltage is below
4.8 V and at an ambient temperature of −40 °C.
6. Noise figures depend on gain and filter settings, examples given here.
V
+
7. V
OO(ref)
8. Integral range for G
RFPVRFN
=
---------------------------------2
–
V
RFREF
from minimum to maximum gain is 13 dB (typical).
3
9. At the transition BWRF = 63 to 64 the ∆f may be between −0.2 and +1.7 MHz
10. Faster for small steps.
11. Overall gain from input to output is determined by R
three-beam push-pull (CD) or DVD push-pull. Gain FTC scales with G
gain is fixed.
12. High FTC bandwidth is achieved when IS1and IS2> 1.5 µA.
13. Channel pair matching is defined in % of full scale (FS) output at half of the full scale level.
Gsum G3+()
---------------------------------- 20
10
FTC/RLFR
or R
FTC/RLFPP
. When DPD tracking is selected the FTC
FRR
, depending on radial tracking mode,
handbook, full pagewidth
SICL
SIDA
SILD
t
su(strt)
t
clk(H)
t
h(D)
t
su(D)
D0A3
T
clk
t
clk(L)
Fig.8 Single word transmission.
t
su(load)
MGW495
2003 Sep 0337
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
11 APPLICATION INFORMATION
11.1Signal relationships
Simplified relationships between signals are described in
this section. In the simplification, all built-in options for
DVD-ROM are omitted. The variables A1to A3, A
A
, are the linear equivalents of bits G1to G3,G
LFR
G
.
LFR
11.1.1DATA PATH
Pins RFP and RFN carry the RF data signals in opposite
phases with respect to each other. This allows an ADC
with a balanced or differential input to be used in the
decoder. Depending on the DC input ranges of the ADC,
in many cases the connection between TZA1038HW and
the decoder can be a DC pin to pin connection. The
common mode DC level of pins RFP and RFN can be
chosen independently by means of input pin RFREF.
If bit RFSUM = 0
• V
RFP=VRFREF
• V
RFN=VRFREF
• V
RFDIF=A3×A2×A1
+ 0.5 × A3× A2× A1× (VI− V
− 0.5 × A3× A2× A1× (VI− V
×(VI− V
RFOFFS
).
If bit RFSUM = 1
• V
RFP=VRFREF
− V
RFOFFSS
MN
• V
RFN=VRFREF
− V
RFOFFSS
MN
• V
RFDIF=ARFSUM
+0.5×A
)
− 0.5 × A
)
× A3(V
RFSUM
RFSUM
RFSUMP
× A3× (V
× A3× (V
− V
RFSUMN
RFSUMP
RFSUMP
− V
Where:
• A1,A2,A3and A
are programmed gain values
RFSUM
• VI= averageinputvoltage at pins A to D, with respectto
the voltage at pin OPUREF
• V
is the programmed RF
RFOFFS
DAC voltage
OFFS
(register 4 and register 5)
• V
Correct settings for V
keep both V
is the input voltage at pin RFREF.
RFREF
and V
RFREF
RFP
and V
at the DC voltage levels
RFN
RFOFFS
are required to
specified for the TZA1038HW and the decoder.
LFC
LFC
RFOFFS
RFOFFS
− V
− V
RFOFFSS
and
and
)
)
RFSU
RFSU
).
TZA1038HW
11.1.2SERVO PATH
The current through output pins OA to OD represents the
low-pass filtered input voltage of each individual pick-up
segment. The gain from input to output can be
programmed to adapt to different disc types or pick-ups
(offset cancellation is omitted for simplicity):
VIxA
×
I
=
Ox
=
I
S1
I
=
S2
or:
I
=
S1
I
=
S2
or:
I
S1IDCIFS
I
S2IDCIFS
Where:
• A
and A
LFC
and radial paths
• Gain should be programmed such that maximum signal
levels fit into the range of the servo processor ADC
• V
; V
I(A)
at pins A to D with respect to pin OPUREF
• IDC is a DC current that keeps IS1and IS2 unipolar
• IFS is the sensitivity to relative phase difference.
11.2Programming examples
Table 30 Sample of register values and mode settings.
REGISTER VALUE (HEX)
REGISTER
DVD; LOW
GAIN
DVD; HIGH
(1)
GAIN
CD; HIGH
(1)
GAIN
0005045043switch on the laser power; V
101D01D007select diode or SUM inputs and corresponding tracking
method
2800800800set K2 mode
3800−800set low RF gain = 18 dB + G
−800−set G1 for DPD (G3= 0 dB in this example)
4820410410approximation for DVD
5000000000optional second RF offset setting
6338778778G
LFC=GLFR
α =1
7200200000set bits DPD_stretch to 1.9 ns
8000000000enable inputs A to D for RF
9000000000not used
10000000000not used
11000000000set for electrical offset compensation from pick-up (see
12000000000
Section 11.4)
13000000000
14335335335set bits BWRF to 80 MHz; RFEQEN = 1; RFNFEN = 1
15022022000set bits DPD_LL to 24 MHz; set bits DPD_LPF
to 100 MHz
MODE SETTINGS
= 150 mV; set GRFSUM
mon
3
DAC
OFFS
= −6 dB (low gain) or +6 dB (high gain);
Note
1. Use RFSUM input.
2003 Sep 0339
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
11.3Energy saving
Bit PWRON can be used to bring the TZA1038HW into
STANDBY mode reducing the supply current to
approximately 0.5 mA.
11.4Initial DC and gain setting strategy
11.4.1ELECTRICAL OFFSET FROM PICK-UP
It is useful to compensate for electrical offset, especially
with pick-ups that give a low output signal. It is possible to
compensate for each individual servo channel. Due to
internal circuitry, the TZA1038HW servo channels can
handle only signals positive with respect to the reference
input OPUREF. Therefore the potentially negative offset
from the pick-up must first be cancelled. The LF
can be programmed to do this, and will apply this to all six
channels at the same time. The LF
DAC can be set
OFFS
to 0, 5, 10 or 15 mV.
As a second step, the offset between each channel can be
compensated by connecting the DACs to each individual
DAC (C
OFFSA
to C
OFFSD
, R
OFFSE
and R
OFFSF
). These
DACs can be programmed between 0 and 20 mV with
approximately 1.25 mVresolution. Where the LF
increases the outputs signal level, the individual DACs
decrease the output signal. In this way the output signal
can be set very close to zero. The range of DACs, LF
C
OFFS
and R
can be tripled with control
OFFS
bit SERVOOS.
The output current of servo channel A is calculated by:
represents the electrical offset from the pick-up.
The procedure to cancel the offset is:
1. Activate the pick-up and switch off the laser.
2. Set LF
to its maximum value.
OFFS
3. Measure the output currents off all relevant servo
outputs.
4. Ifall outputs represent a signal >5 mVequivalent input
voltage, decrease V
then repeat step 3; if all
LFOFFS
outputs represent a signal <5 mV equivalent input
voltage, go to step 5.
5. Measure each output and increase C
OFFS
output current is close enough to zero.
This procedure needs only to be done once, or after a
longer time when temperature may have changed the
pick-up offset.
OFFS
OFFS
OFFS
×
LFC
− V
OPUREF
until the
DAC
DAC
,
)
TZA1038HW
The test pin OCENTRAL can be useful to follow this
procedure. This pin can be programmed to output a copy
of the signal OA to OD (see register 12).
11.4.2G
The servo gain has to be chosen dependant on the
reflectivity of the disc. So this needs to be done each time
when a new disc is inserted in the mechanism. A trial and
error procedure should find the optimal setting. Gain can
be set in 3 dB steps.
11.4.3DC LEVEL IN RF PATH
Once the gains in the servo path have been set, the
average DC level at the inputs can be calculated from the
value of the servo output signals:
=
V
I
Where IOx is the average value of the output currents at
pins OA to OD.
This value is a good estimate to use initially to set the
RF DC compensation, V
of the RF
of G1.
In cases where a DC coupling between TZA1038HW and
the decoder is made, a fine tuning of the RF DC
compensation can be doneduring play. Thezero-crossing
level of the data-eye pattern can be used to judge the
correct DC compensation level.
11.4.4GAIN SETTING RF PATH
The choice of RF gain is determined by the modulation of
the disc, therefore the modulation needs to be checked
each time a new disc is inserted in the mechanism. A trial
and error procedure should be sufficient to find the
optimum setting. For optimum use of the dynamic range:
• Use G3 for fine tuning and AGC, so initially this should
be set in the range 0 to 6 dB to leave an additional gain
of 6 dB free to use during disc defects
• Use G1and G2 to set the gain, increase G1 first,
when G1 has reached its maximum then G2 should be
increased
• G2shows better noise performance in 12 and 24 dB
settings than in 6 and 18 dB setting
High speed advanced analog DVD signal
processor and laser supply
12 PACKAGE OUTLINE
HTQFP48: plastic thermal enhanced thin quad flat package; 48 leads;
body 7 x 7 x 1 mm; exposed die pad
c
y
37
exposed die pad side
D
h
X
2536
Z
24
A
E
TZA1038HW
SOT545-2
E
h
e
1.05
0.95
pin 1 index
b
p
0.27
0.25
0.17
w M
D
H
D
ceLywvθ
p
0.20
0.09
48
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm
A1A2A3b
max.
0.15
1.2
0.05
e
w M
b
p
13
121
Z
D
B
02.55 mm
scale
(1)
D
7.1
6.9
D
4.6
4.4
(1)
E
7.1
6.9
E
4.6
4.4
h
h
v M
v M
0.5
E
A
B
HDH
9.1
8.9
H
E
9.1
8.9
A
2
A
A
1
detail X
E
L
0.75
0.45
p
0.08 0.080.21
Z
D
0.89
0.61
(A )
3
θ
L
p
L
(1)
(1)
Z
E
0.89
7°
0.61
0°
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT545-2
IEC JEDEC JEITA
REFERENCES
2003 Sep 0341
EUROPEAN
PROJECTION
ISSUE DATE
99-08-04
03-04-07
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
processor and laser supply
13 SOLDERING
13.1Introduction to soldering surface mount
packages
Thistextgives a very brief insight toa complextechnology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certainsurfacemountICs, but it is not suitable for finepitch
SMDs. In these situations reflow soldering is
recommended.
13.2Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screenprinting, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
• below 220 °C (SnPb process) or below 245 °C (Pb-free
process)
– for all BGA and SSOP-T packages
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a
volume ≥ 350 mm3 so called thick/large packages.
• below 235 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
TZA1038HW
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• Forpackageswithleads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
13.4Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
13.3Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
2003 Sep 0342
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
13.5Suitability of surface mount IC packages for wave and reflow soldering methods
1. Formore detailed information on theBGApackages refer to the
“(LF)BGAApplication Note
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Hot bar or manual soldering is suitable for PMFP packages.
SOLDERING METHOD
WAVEREFLOW
(4)
(5)(6)
(7)
suitable
suitable
suitable
”(AN01026); order a copy
(2)
.
2003 Sep 0343
Philips SemiconductorsProduct specification
High speed advanced analog DVD signal
TZA1038HW
processor and laser supply
14 DATA SHEET STATUS
LEVEL
IObjective dataDevelopmentThis data sheet contains data from the objective specification for product
IIPreliminary data QualificationThis data sheet contains data from the preliminary specification.
IIIProduct dataProductionThis data sheet contains data from the product specification. Philips
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DATA SHEET
STATUS
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
(1)
PRODUCT
STATUS
(2)(3)
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
DEFINITION
15 DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at any other conditionsabovethosegiven in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuch applications will be
suitable for the specified use without further testing or
modification.
16 DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personalinjury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
2003 Sep 0344
Philips Semiconductors – a w orldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com.Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands753503/01/pp45 Date of release: 2003 Sep 03Document order number: 9397 750 11645
SCA75
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