Philips TEA6100-N3 Datasheet

DATA SH EET
Product specification File under Integrated Circuits, IC01
August 1987
INTEGRATED CIRCUITS
TEA6100
FM/IF system and microcomputer-based tuning interface
August 1987 2
Philips Semiconductors Product specification
FM/IF system and microcomputer-based tuning interface
TEA6100
GENERAL DESCRIPTION
The TEA6100 is a FM/IF system circuit intended for microcomputer controlled radio receivers. The circuit includes highly sensitive analogue circuitry. The digital circuitry, including an I2C bus, controls the analogue circuitry and the AM/FM tuning and stop information for the microcomputer.
Features
4-stage symmetrical IF limiting amplifier
Software selectable AM or FM input
Symmetrical quadrature demodulator
Single-ended LF output stage
D.C. output level determined by the input signal
Semi-adjustable AM and FM level voltage
Multi-path detector/rectifier/amplifier circuitry
3-bit level information and 3-bit multi-path information
Signal dependent 'soft' muting circuit; externally
adjustable
Reference voltage output (FM mode only)
8-bit AM/FM frequency counter with selectable counter
resolution
Possibility to measure the AM IF frequency at 460 kHz (250 Hz resolution) and 10,7 MHz (500 Hz resolution)
Reference frequency can be directly connected to the reference frequency output of a frequency synthesizer (TSA6057, 40 kHz) .
PACKAGE OUTLINE
20-lead DIL; plastic (SOT146); SOT146-1; 1996 August 13.
August 1987 3
Philips Semiconductors Product specification
FM/IF system and microcomputer-based tuning interface
TEA6100
QUICK REFERENCE DATA
PARAMETER CONDITIONS SYMBOL MIN. TYP. MAX. UNIT
Supply voltage V
P1
, V
P2
8,5 V
Supply current I
P1
+ I
P2
35 mA
FM/IF sensitivity 3 dB before
limiting V
i
15 −µV
Signal plus noise f = 75 kHz;
to noise ratio VI= 10 mV (S + N)/N 85 dB
Audio output voltage
after limiting f = 22,5 kHz V
o
200 mV
AM suppression V
IFM
= 600 µV to 600 mV; m = 0,3 AMS 60 dB
Frequency counter
sensitivity AM pin 19,
f = 10,7 MHz V
i(AM)
45 −µV
f = 460 kHz V
i(AM)
20 −µV
FM pin 18,
f = 10,7 MHz V
i(FM)
45 −µV
Resolution of the reference
frequency counter frequency of
40 kHz;
AM IF = 460 kHz f
s
(AM) 250 Hz
IF = 10,7 MHz f
s
(AM) 500 Hz
FM f
s
(FM) 6,4 kHz
August 1987 4
Philips Semiconductors Product specification
FM/IF system and microcomputer-based
tuning interface
TEA6100
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Fig.1 Block diagram.
August 1987 5
Philips Semiconductors Product specification
FM/IF system and microcomputer-based tuning interface
TEA6100
PINNING
1V
P1
analogue supply voltage 2 MUTE IN mute input 3 LA OUT level amplifier output 4 RT/A IN rectifier/amplifier input 5 RT/A OUT rectifier/amplifier output 6F
ref
reference frequency input 7 DGND digital ground 8V
P2
digital supply voltage 9 SCL serial clock line; I
2
C bus
10 SDA serial data line; I
2
C bus 11 LF OUT audio output signal 12 Q-DET phase shift for quadrature
detector
13 Q-DET phase shift for quadrature
detector 14 LADJ level amplifier adjustment 15 V
ref
reference voltage 16 FB DEC decoupled feedback 17 FB DEC decoupled feedback 18 INPUT 1 FM/AM IF input 19 INPUT 2 AM/FM IF input 20 AGND analogue ground
Fig.2 Pinning diagram.
FUNCTIONAL DESCRIPTION (see Figs 1 and 16) The IF amplifier consists of four balanced limiting amplifier stages, two separate inputs (AM and FM) and one output.
Software programming (see Table 2; Figs 4 and 5) allows the input signals (AM/FM) to be inserted on either input (pin 18 or 19). The output drives the frequency counter and via the mute stage, drives the quadrature detector. The output of the quadrature detector is applied to an audio stage (which has a single-ended output). The AM/FM level amplifier, which is driven by 5 IF level detectors, generates a signal dependent d.c. voltage. The level output voltage is used internally to control the mute stage and, if required, the signal can be used externally to control the stereo channel separation and frequency response of a stereo decoder. The signal is also feed to the analogue-to-digital converter (ADC). Due to the front-end spread in the amplification, the level voltage is made adjustable (LADJ, pin 14). The level voltage amplifier controls the mute stage and this insures the 3 dB limiting point remains constant, independent of the front-end spread. AM and FM mode have different front-end circuitry, therefore LADJ must be adjustable for both inputs.
The output voltage of the level amplifier is dependent upon the field strength of the input signal. The multi-path of the FM signal exists in the AM modulation of the input signal. The following method is used to determine the level information and the amount of multi-path (as a DC voltage):
the IF level detector detects the multi-path and feds the signal, via the level amplifiers, to the external bandpass filter (pin 3) and ADC1
the signal is then fed to an internal rectifier
the rectified signal is then fed to an amplifier, so at pin 5 the DC level information is externally available and internally
used by ADC2
In the FM mode, the DC information concerning the multi-path is available at pin 5 and the level information is available at pin 3.
August 1987 6
Philips Semiconductors Product specification
FM/IF system and microcomputer-based tuning interface
TEA6100
In the AM mode, the level information at pin 3 cannot be directly used owing to AM modulation on the output signal of the level amplifier. This signal requires filtering, which is achieved by the following method:
the multiplexer is switched to a position which causes the signal to be applied to the attenuator
after attenuation the signal is fed to an amplifier (the resultant gain of attenuator and amplifier is unity), after
amplification the signal is filtered by an internal resistor and external capacitor
after filtering the signal is applied to ADC2 and is externally available
In AM mode pin 5 contains the level information. The voltages on pin 3 and 5 are converted into two 3-bit digital words by the ADC, which can then be read out by the
I2C bus. The meaning of the 3- bit words is shown in Table 1.
Table 1 3-bit words
The FM modulated signal is converted into an audio signal by the symmetrical quadrature detector. The main advantage of such a detector is that it requires few external components.
An FM signal requires good AM suppression, and as a result, the IF amplifiers must act as limiters. To achieve good suppression on small input signals the IF amplifiers must have a high gain and thus a high sensitivity. High sensitivity is an undesirable property when used in car radio applications, this problem is solved by having an externally adjustable mute stage to control the overall sensitivity of the device.
The IF mute stage is controlled by the level amplifier (soft muting) and is only active in FM mode. If the input falls below a predetermined level, the mute stage becomes active. To avoid the 'ON/OFF' effect of the audio signal due to fluctuations of the input signal, the mute stage is activated rapidly but de-activated slowly. The mute stage is de-activated slowly, via a current source and an external capacitor at pin 2, to avoid aggressive behaviour of the audio signal. It is possible to adjust the '3 dB limiting point' of the audio output via the level voltage due to the level signal being externally adjustable. If hard muting is required then pin 2 must be switched to ground.
The 8-bit counter allows accurate stop information to be obtained, because exact tuning is achieved when the measured frequency is equal to the centre frequency of the IF filter.
To measure the input frequency, the number of pulses which occur in a defined time must be counted. This defined time is refered to as 'window'. A wide window indicates a long measuring time and therefore a high accuracy. The counter resolution is defined as Hertz per count. Due to the TEA6100 having to measure the IF frequencies of AM and FM, the counter resolution must be adjustable (different channel spacing). The counter resolution depends on the setting of dividers 1 (N1), divider 2 (N2) and the reference frequency (F
ref
). The divider ratios of N1 and N2 are controlled by software (see section PROGRAMMING INFORMATION). In Table 3 the window and counter resolution has been calculated for a reference frequency of 40 kHz. The accuracy is controlled by bit 7 of the input word. Although the resolution is the same for bit 7 = logic 0 and bit 7 = logic 1, the width of the window doubles when bit 7 = logic 1.
bit 7 = 0, accuracy = ± counter resolution
bit 7 = 1, accuracy = ± 1⁄2 counter resolution
WORD
POSITION
FM AM
1 multipath level without modulation 2 level level with modulation
August 1987 7
Philips Semiconductors Product specification
FM/IF system and microcomputer-based tuning interface
TEA6100
Communication between TEA6100 and the microcomputer is via a two wire bidirectional I2C bus. The power supply lines are fully isolated to avoid cross talk between the digital and analogue parts of the circuit.
Table 2 Input bits
BIT FUNCTION LOGIC 0 LOGIC 1 SEE Fig.5 AND 6
1 reference frequency 32 kHz 40 kHz A 2 IF mode AM FM B 3 IF input pin 19 pin 18 C 4 counter input 460 kHz 10,7 MHz D 5 counter mode AM FM E 6 resolution divide by 8 divide by 1 F 7 accuracy LOW HIGH G 8 test mode OFF ON H
Fig.3 Input data format waveforms.
August 1987 8
Philips Semiconductors Product specification
FM/IF system and microcomputer-based
tuning interface
TEA6100
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Fig.4 Output data format waveforms.
August 1987 9
Philips Semiconductors Product specification
FM/IF system and microcomputer-based tuning interface
TEA6100
Fig.5 Switch positions, analogue part (switches drawn in logic 0 state).
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