8-bit, 40 Msps 2.7 to 5.5 V universal
analog-to-digital converter
Product specification
Supersedes data of 1995 May 08
File under Integrated Circuits, IC02
1996 Feb 21
Philips SemiconductorsProduct specification
8-bit, 40 Msps 2.7 to 5.5 V universal
analog-to-digital converter
FEATURES
• 8-bit resolution
• Operation between 2.7 and 5.5 V
• Sampling rate up to 40 MHz
• DC sampling allowed
• High signal-to-noise ratio over a large analog input
frequency range (7.3 effective bits at 4.43 MHz
full-scale input at f
• CMOS/TTL compatible digital inputs and outputs
• External reference voltage regulator
• Power dissipation only 30 mW (typical)
• Low analog input capacitance, no buffer amplifier
required
• Sleep mode (4 mW)
• No sample-and-hold circuit required.
QUICK REFERENCE DATA
= 40 MHz)
clk
TDA8790
APPLICATIONS
High-speed analog-to-digital conversion for:
• Video data digitizing
• Camera
• Camcorder
• Radio communication.
GENERAL DESCRIPTION
The TDA8790 is an 8-bit universal analog-to-digital
converter (ADC) for video and general purpose
applications. It converts the analog input signal from
2.7 to 5.5 V into 8-bit binary-coded digital words at a
maximum sampling rate of 40 MHz. All digital inputs and
outputs are CMOS/TTL compatible. A sleep mode allows
reduction of the device power consumption down to 4 mW.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
DDA
V
DDD
V
DDO
∆V
DD
I
DDA
I
DDD
I
DDO
analog supply voltage2.73.35.5V
digital supply voltage2.73.35.5V
output stages supply voltage2.53.35.5V
supply voltage difference
V
V
DDA
DDD
− V
− V
DDD
DDO
−0.2−+0.2V
−0.2−+2.25V
analog supply current−46mA
digital supply current−58mA
output stages supply currentf
= 40 MHz; CL= 20 pF;
clk
−12mA
ramp input
INLintegral non-linearityf
DNLdifferential non-linearityf
f
clk(max)
P
tot
maximum clock frequency40−−MHz
total power dissipationV
= 40 MHz; ramp input−±0.5±0.75LSB
clk
= 40 MHz; ramp input−±0.25±0.5LSB
clk
DDA=VDDD=VDDO
= 3.3 V−3053mW
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TDA8790MSSOP20plastic shrink small outline package; 20 leads; body width 4.4 mmSOT266-1
1996 Feb 212
Philips SemiconductorsProduct specification
8-bit, 40 Msps 2.7 to 5.5 V universal
analog-to-digital converter
BLOCK DIAGRAM
handbook, full pagewidth
analog
voltage input
V
RT
V
V
RM
V
DDA
5
CLOCK DRIVER
10
R
LAD
I
9
8
ANALOG -TO - DIGITAL
CONVERTER
CLK
1
LATCHES
V
DDD
3
TDA8790
CMOS
OUTPUTS
2
19
D7
18
D6
17
D5
16 D4
15
D3
14
D2
13 D1
12
D0
TDA8790
SLEEP
MSB
data outputs
LSB
V
RB
7
6
V
analog
ground
SSA
V
output
ground
411
SSOVSSD1
digital
ground
20
MBE502
V
DDO
Fig.1 Block diagram.
1996 Feb 213
Philips SemiconductorsProduct specification
8-bit, 40 Msps 2.7 to 5.5 V universal
analog-to-digital converter
PINNING
SYMBOLPINDESCRIPTION
CLK1clock input
SLEEP2sleep mode input
V
DDD
V
SSD
V
DDA
V
SSA
V
RB
V
RM
V
I
V
RT
V
SSO
D012data output; bit 0 (LSB)
D113data output; bit 1
D214data output; bit 2
D315data output; bit 3
D416data output; bit 4
D517data output; bit 5
D618data output; bit 6
D719data output; bit 7 (MSB)
V
DDO
3digital supply voltage (2.7 to 5.5 V)
4digital ground
5analog supply voltage (2.7 to 5.5 V)
6analog ground
7reference voltage BOTTOM input
8reference voltage MIDDLE
9analog input voltage
10reference voltage TOP input
11digital output ground
20positive supply voltage for output
stage (2.7 to 5.5 V)
1
CLK
2
SLEEP
V
3
DDD
V
4
SSD
V
5
DDA
V
V
SSA
V
RB
RM
V
RT
TDA8790
6
7
8
V
9
I
10
MBE501
Fig.2 Pin configuration.
TDA8790
V
20
DDO
19
D7
18
D6
17
D5
16
D4
15
D3
14
D2
D1
13
D0
12
V
11
SSO
1996 Feb 214
Philips SemiconductorsProduct specification
8-bit, 40 Msps 2.7 to 5.5 V universal
TDA8790
analog-to-digital converter
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
DDA
V
DDD
V
DDO
∆V
V
I
V
clk(p-p)
I
O
T
stg
T
amb
T
j
DD
analog supply voltagenote 1−0.3+7.0V
digital supply voltagenote 1−0.3+7.0V
output stages supply voltagenote 1−0.3+7.0V
supply voltage difference
− V
V
V
V
DDA
DDA
DDD
− V
− V
DDD
DDO
DDO
input voltagereferenced to V
AC input voltage for switching
may have any value between −0.3 V and +7.0 V provided that the supply
DDO
voltage ∆VDD remains as indicated.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOLPARAMETERVALUEUNIT
R
th j-a
thermal resistance from junction to ambient in free air120K/W
1996 Feb 215
Philips SemiconductorsProduct specification
8-bit, 40 Msps 2.7 to 5.5 V universal
TDA8790
analog-to-digital converter
CHARACTERISTICS
V
DDA=V5
V
i(p-p)
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply
V
DDA
V
DDD
V
DDO
∆V
I
DDA
I
DDD
I
DDO
Inputs
to V6= 3.3 V; V
= 1.84 V; CL= 20 pF; T
analog supply voltage2.73.35.5V
digital supply voltage2.73.35.5V
output stages supply voltage2.53.35.5V
DD
supply voltage difference
− V
V
DDA
− V
V
DDD
analog supply current−46 mA
digital supply current−58 mA
output stages supply currentf
DDD=V3
DDD
DDO
to V4= 3.3 V; V
=0to+70°C; typical values measured at T
amb
DDO=V20
= 40 MHz; ramp input;
clk
to V11= 3.3 V; V
CL=20pF
SSA,VSSD
=25°C; unless otherwise specified.
amb
and V
shorted together;
SSO
−0.2−+0.2V
−0.2−+2.25V
−12 mA
LOCK INPUT CLK (REFERENCED TO V
C
V
IL
V
IH
I
IL
I
IH
Z
I
C
I
INPUT SLEEP (REFERENCED TO V
V
IL
V
IH
I
IL
I
IH
LOW level input voltage0−0.3V
HIGH level input voltage0.7V