Philips tda8787 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

TDA8787

10-bit, 3.0 V analog-to-digital
interface for CCD cameras

Preliminary specification
Supersedes data of 1998 Mar 27
File under Integrated Circuits, IC02

1998 Oct 15

Philips Semiconductors Preliminary specification

10-bit, 3.0 V analog-to-digital interface for
CCD cameras

FEATURES

• Correlated Double Sampling (CDS), Automatic Gain
Control (AGC), 10-bit Analog-to-Digital Converter (ADC)
and reference regulator included

• Fully programmable via a 3-wire serial interface

• Sampling frequency up to 18 MHz

• AGC gain range of 36 dB (in steps of 0.1 dB)

• Low power consumption of only 190 mW (typ.)

• Power consumption in standby mode of 4.5 mW (typ.)

• 3.0 V operation and 2.5 to 3.6 V operation for the digital

outputs

• Active control pulses polarity selectable via serial
interface

• 8-bit DAC included for analog settings

• TTL compatible inputs, CMOS compatible outputs.

QUICK REFERENCE DATA

APPLICATIONS

• Low-power, low-voltage CCD camera systems.

GENERAL DESCRIPTION

The TDA8787 is a 10-bit analog-to-digital interface for
CCD cameras. The device includes a correlated double
sampling circuit, AGC and a low-power 10-bit ADC
together with its reference voltage regulator.

AGC gain is controlled via the serial interface.
The ADC input clamp level is controlled via the serial

interface.
An additional DAC is provided for additional system

controls; its output voltage range is 1.0 V (p-p) which is
available at pin OFDOUT.

TDA8787

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CCA

V

CCD

V

CCO

I

CCA

I

CCD

I

CCO

analog supply voltage 2.7 3.0 3.6 V
digital supply voltage 2.7 3.0 3.6 V
digital outputs supply voltage 2.5 2.6 3.6 V
analog supply current all clamps active − 55 70 mA
digital supply current − 811mA
digital outputs supply current f

= 18 MHz; CL=20pF;

pix

− 12mA

input ramp response time is 800 µs

ADC

res

V

i(CDS)(p-p)

f

pix(max)

f

pix(min)

DR

AGC

N

tot(rms)

ADC resolution − 10 − bits
maximum CDS input voltage

(peak-to-peak value)

VCC= 2.85 V 650 −−mV
V

≥ 3.0 V 800 −−mV

CC

maximum pixel rate 18 −−MHz
minimum pixel rate 5 −−MHz
AGC dynamic range − 36 − dB
total noise from CDS input to

AGC gain = 0 dB; see Fig.8 − 0.25 − LSB

ADC output

P

tot

total power consumption V

CCA=VCCD=VCCO

=3V − 190 − mW

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA8787HL LQFP48 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm SOT313-2

1998 Oct 15 2

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in

o

_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in

white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...

1998 Oct 15 3

ok, full pagewidth

BLOCK DIAGRAM

10-bit, 3.0 V analog-to-digital interface for

CCD cameras

Philips Semiconductors Preliminary specification

CPCDS1

CPCDS2

V

CCA3

AGND3

V

CCA1

AGND1

OFDOUT

SHP

47

7

8
42

41

CORRELATED

4

IN

6

5

9

DOUBLE

SAMPLING

OFD DAC

15

14 3

TEST2

TEST1 AGND4

V

CCD3

V

ref

DGND3

1

SHD

48

CDS CLOCK GENERATOR

CLAMP

16

TEST3

2

CLAMP

V

CCA2

18

AGND2

17

AGC

9-BIT

REGISTER

8-BIT

REGISTER

CLPDM

CLPOB

13

45

OAGC OAGCC

40

REGULATOR

OE

37

OUTPUT
BUFFER

20
19
39
38
26

36
35
34
33
32
31
30
29
28
27

25

44

MGM541

DGND1
V

CCD1
DGND2
V

CCD2
OGND

D9
D8

D7
D6
D5
D4
D3
D2
D1
D0

V

CCO

DCLPC

24

PBK

11

PRE-

BLANKING

10

STDBY

AGND5

12

43

COMPARATOR

SHIFTERSHIFT

TDA8787

46

SEN

DAC

23

SCLK

7-BIT

REGISTER

SERIAL

INTERFACE

22

SDATA

10-bit ADC

21

VSYNC

CLK

DATA

FLIP-

FLOP

Fig.1 Block diagram.

TDA8787

Philips Semiconductors Preliminary specification

10-bit, 3.0 V analog-to-digital interface for

TDA8787

CCD cameras

PINNING

SYMBOL PIN DESCRIPTION

V

CCD3

DGND3 2 digital ground 3
AGND4 3 analog ground 4
IN 4 input signal from CCD
AGND1 5 analog ground 1
V

CCA1

CPCDS1 7 clamp storage capacitor pin 1
CPCDS2 8 clamp storage capacitor pin 2
OFDOUT 9 analog output of the additional 8-bit control DAC
STDBY 10 standby mode control input (LOW: TDA8787 active; HIGH: TDA8787 standby)
PBK 11 pre-blanking control input
CLPDM 12 clamp pulse input at dummy pixel
CLPOB 13 clamp pulse input at optical black
TEST1 14 test pin input 1 (should be connected to AGND2)
TEST2 15 test pin input 2 (should be connected to AGND1)
TEST3 16 test pin input 3 (should be connected to AGND2)
AGND2 17 analog ground 2
V

CCA2

V

CCD1

DGND1 20 digital ground 1
SDATA 21 serial data input for serial interface control
SCLK 22 serial clock input for serial interface
SEN 23 strobe pin for serial interface
VSYNC 24 vertical sync pulse input
V

CCO

OGND 26 digital output ground
D0 27 ADC digital output 0 (LSB)
D1 28 ADC digital output 1
D2 29 ADC digital output 2
D3 30 ADC digital output 3
D4 31 ADC digital output 4
D5 32 ADC digital output 5
D6 33 ADC digital output 6
D7 34 ADC digital output 7
D8 35 ADC digital output 8
D9 36 ADC digital output 9 (MSB)
OE 37 output enable control input (LOW: outputs active; HIGH: outputs in high impedance)
V

CCD2

DGND2 39 digital ground 2
CLK 40 data clock input

1 digital supply voltage 3

6 analog supply voltage 1

18 analog supply voltage 2
19 digital supply voltage 1

25 output supply voltage

38 digital supply 2

1998 Oct 15 4

Philips Semiconductors Preliminary specification

10-bit, 3.0 V analog-to-digital interface for
CCD cameras

SYMBOL PIN DESCRIPTION

AGND3 41 analog ground 3
V

CCA3

AGND5 43 analog ground 5
DCLPC 44 regulator decoupling pin
OAGC 45 AGC output (test pin)
OAGCC 46 AGC complementary output (test pin)
SHP 47 preset sample-and-hold pulse input
SHD 48 data sample-and-hold pulse input

42 analog supply 3

SHD

SHP

48

47

OAGC

OAGCC
46

45

DCLPC

AGND5

44

43

CCA3

V

42

AGND3

CLK

41

40

CCD2

DGND2

V

39

38

TDA8787

OE

37

V

CCD3
DGND3
AGND4

AGND1

V

CCA1

CPCDS1
CPCDS2

OFDOUT

STDBY

PBK

CLPDM

24

VSYNC

36
35
34
33
32
31
30
29
28
27
26
25

MGM542

D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
OGND

V

CCO

1
2
3
4

IN

5
6
7
8

9
10
11
12

13

14

15

TEST2

TEST1

CLPOB

16

17

TEST3

AGND2

TDA8787

18

19

CCA2

V

V

CCD1

20

21

SDATA

DGND1

22

SCLK

23

SEN

Fig.2 Pin configuration.

1998 Oct 15 5

Philips Semiconductors Preliminary specification

10-bit, 3.0 V analog-to-digital interface for

TDA8787

CCD cameras

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CCA

V

CCD

V

CCO

∆V

CC

V

i

I

o

T

stg

T

amb

T

j

Note

1. The supply voltages V
voltage difference ∆VCC remains as indicated.

analog supply voltage note 1 −0.3 +7.0 V
digital supply voltage note 1 −0.3 +7.0 V
output stages supply voltage note 1 −0.3 +7.0 V
supply voltage difference

between V
between V
between V

CCA
CCA
CCD

and V
and V
and V

CCD
CCO
CCO

−1.0 +1.0 V

−1.0 +1.0 V

−1.0 +1.0 V

input voltage referenced to AGND −0.3 +7.0 V
data output current −±10 mA
storage temperature −55 +150 °C
operating ambient temperature −20 +75 °C
junction temperature − 150 °C

, V

CCA

CCD

and V

may have any value between −0.3 and +7.0 V provided that the supply

CCO

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 76 K/W

1998 Oct 15 6