Philips TDA8786, TDA8786A Datasheet

INTEGRATED CIRCUITS

DATA SHEET

TDA8786; TDA8786A

10-bit analog-to-digital interface for CCD cameras

Preliminary specification

1997 May 20

Supersedes data of 1996 May 15

File under Integrated Circuits, IC02

Philips Semiconductors	Preliminary specification

10-bit analog-to-digital interface for

TDA8786; TDA8786A

CCD cameras

FEATURES

∙Correlated double sampling (CDS), AGC, soft clipper, pre-blanking, 10-bit ADC and reference regulator included

∙Fully programmable via a 3-wire serial interface

∙Sampling frequency up to 18 MHz

∙AGC gain from 3.5 dB to 33.5 dB (in 0.1 dB steps)

∙Programmable soft clipper for white compression (starting at 40% of the input signal)

∙Stand-by mode available for each block for power saving applications (14 mW)

∙6 dB fixed gain analog output for analog iris control

∙8-bit and 10-bit DAC included for analog settings

∙Low power consumption of only 400 mW (typ.)

∙5 V operation and 2.5 to 5 V operation for the digital outputs

∙Active control pulse: TDA8786 = HIGH; TDA8786A = LOW

∙TTL compatible inputs, TTL and CMOS compatible outputs.

QUICK REFERENCE DATA

GENERAL DESCRIPTION

The TDA8786; TDA8786A is a 10-bit analog-to-digital interface for CCD cameras. The device includes a correlated double sampling circuit, AGC, a soft clipper circuit and a low power 10-bit analog-to-digital converter (ADC) together with its reference voltage regulator.

The AGC and soft clipper circuits are controlled by on-chip DACs via a serial interface.

A 10-bit DAC controls the ADC input clamp level.

A pre-blanking function is also included.

An additional DAC is provided for additional system controls; its output voltage range is 1.4 V (p-p) which is available at pin OFD.

APPLICATIONS

∙ CCD camera systems.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VCCA	analog supply voltage		4.5	4.75	5.5	V
VCCD	digital supply voltage		4.5	4.75	5.5	V
VCCO	digital outputs supply voltage		2.5	2.6	5.5	V
ICCA	analog supply current		−	73	−	mA
ICCD	digital supply current		−	20	−	mA
ICCO	digital outputs supply current	fCLK = 18 MHz;	−	1	−	mA
		CL = 20 pF; ramp input
ADCres	ADC resolution		−	10	−	bits
ViCDS(p-p)	CDS input voltage (peak-to-peak value)		−	400	1200	mV
GCDS	CDS output amplifier gain		−	6	−	dB
fss(max)	maximum clock frequency		18	−	−	MHz
AGCdyn	AGC dynamic range		−	30	−	dB
S/N	total signal-to-noise ratio from CDS input	CDS input = 600 mV (p-p)	−	55	−	dB
	to ADC output
Ptot	total power consumption		−	440	−	mW

ORDERING INFORMATION

	TYPE		PACKAGE
	NUMBER	NAME	DESCRIPTION	VERSION
	TDA8786	LQFP48	plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm	SOT313-2
	TDA8786A

1997 May 20

2

Philips Semiconductors	Preliminary specification

10-bit analog-to-digital interface for

TDA8786; TDA8786A

CCD cameras

BLOCK DIAGRAM

VCCA3

DGND2

VCCO

IN2

IN1

AGND3

CDSP2

CDSP1

CLPCDS

CLK

VCCD2

OE

47

46

48

45

44

43

42

41

40

39

38

37

36

OGND

TRACK-

TRACK-

TRACK-

CLOCK

AND-HOLD

AND-HOLD

AND-HOLD

GENERATOR

TRACK-

TRACK-

35

D9

AND-HOLD

AND-HOLD

19

34

D8

CLAMP

STGE

5

33

AGND1

CLAMP

ref2

D7

TDA8786

32

D6

TDA8786A

4

+6 dB

AMPOUT

31

2

D5

PBK

OUTPUTS

10-BIT ADC

BUFFER

7

30

1

SOFT

AGC

D4

AGCOUT

CLIPPER

1

29

CLPOPB

D3

ref1

OPTICAL

8

9-BIT DAC

BLACK

28

PBIN

D2

CLAMP

6

VCCA1

27

4-BIT DAC

D1

9

1

PBOUT

10

26

ADCIN

D0

25

DGND1

10-BIT DAC

8-BIT DAC

3

OFDOUT

11

REGULATOR

SERIAL

CLAMP

INTERFACE

CLPADC

12

13

14

15

16

17

18

23

22

21

20

24

DACOUT

VCCA2

V

RT

STDBY SEN

SDATA

VCCD1

MGE361

Vref

AGND2

VRB

DEC1

SCLK

Fig.1

Block diagram.

1997 May 20

3

Philips Semiconductors	Preliminary specification

10-bit analog-to-digital interface for

TDA8786; TDA8786A

CCD cameras

PINNING

SYMBOL	PIN	DESCRIPTION
CLPOPB	1	optical black clamp control pulse input (active HIGH for TDA8786, active LOW for TDA8786A)
PBK	2	pre-blanking control pulse input; if PBK is HIGH (LOW) the signal is replaced by the optical
		black level for TDA8786 (TDA8786A)
OFDOUT	3	analog output of the additional 8-bit control DAC (controlled via the serial interface)
AMPOUT	4	CDS amplifier output (fixed gain = +6 dB)
AGND1	5	analog ground 1
VCCA1	6	analog supply voltage 1
AGCOUT	7	AGC and soft clipper amplifier signal output
PBIN	8	optical black clamp and pre-blanking block signal input (from AGCOUT via a capacitor)
PBOUT	9	optical black clamp and pre-blanking block signal output
ADCIN	10	ADC analog signal input (from PBOUT or AGCOUT via a capacitor)
CLPADC	11	clamp control input for ADC analog input signal clamp (active HIGH for TDA8786 and active
		LOW for TDA8786A)
Vref	12	ADC input clamp reference voltage (normally connected to pin VRB or DACOUT)
DACOUT	13	DAC output for ADC clamp level
AGND2	14	analog ground 2
VCCA2	15	analog supply voltage 2
VRB	16	ADC reference voltage (BOTTOM) code 0
VRT	17	ADC reference voltage (TOP) code 1023
DEC1	18	decoupling 1 (decoupled to ground via a capacitor)
STGE	19	CDS offset storage
SDATA	20	serial data input for the 4 control DACs (9-bit DAC for AGC gain, 4-bit DAC for soft clipper;
		additional 8-bit DAC for OFD output voltage; 10-bit DAC for ADC clamp level and the stand-by
		mode per block; see Table 1)
SCLK	21	serial clock input for the control DACs and their serial interface; see Table 1
SEN	22	enable input for the serial interface shift register (active when SEN = logic 0); see Table 1
STDBY	23	stand-by control pin (active HIGH); all the output bits are logic 0 when stand-by is enabled
VCCD1	24	digital supply voltage 1
DGND1	25	digital ground 1
D0	26	ADC digital output 0 (LSB)
D1	27	ADC digital output 1
D2	28	ADC digital output 2
D3	29	ADC digital output 3
D4	30	ADC digital output 4
D5	31	ADC digital output 5
D6	32	ADC digital output 6
D7	33	ADC digital output 7
D8	34	ADC digital output 8
D9	35	ADC digital output 9 (MSB)
OGND	36	digital output ground

1997 May 20

4

Philips Semiconductors	Preliminary specification

10-bit analog-to-digital interface for

TDA8786; TDA8786A

CCD cameras

	SYMBOL		PIN	DESCRIPTION
	VCCO		37	digital output supply voltage
			38	output enable (LOW: digital outputs active; HIGH: digital outputs high impedance)
	OE
	VCCD2		39	digital supply voltage 2
	DGND2		40	digital ground 2
	CLK		41	ADC clock input
	CLPCDS		42	CDS clamp control input (active HIGH for TDA8786; active LOW for TDA8786A)
	CDSP1		43	CDS control pulse input 1 (active HIGH for TDA8786; active LOW for TDA8786A)
	CDSP2		44	CDS control pulse input 2 (active HIGH for TDA8786; active LOW for TDA8786A)
	VCCA3		45	analog supply voltage 3
	IN1		46	input signal 1 from CCD (usually black channel)
	IN2		47	input signal 2 from CCD (usually video channel)
	AGND3		48	analog ground 3

	AGND3	IN2	IN1	V	CDSP2	CDSP1	CLPCDS	CLK	DGND2	V	OE	V
				CCA3						CCD2		CCO
	48	47	46	45	44	43	42	41	40	39	38	37
CLPOPB	1
PBK	2
OFDOUT	3
AMPOUT	4
AGND1	5
VCCA1	6				TDA8786
AGCOUT	7
					TDA8786A
PBIN	8
PBOUT	9
ADCIN	10
CLPADC	11
Vref	12
	13	14	15	16	17	18	19	20	21	22	23	24
	DACOUT	AGND2	V	V	V	DEC1	STGE	SDATA	SCLK	SEN	STDBY	V
			CCA2	RB	RT							CCD1

36 OGND

35 D9

34 D8

33 D7

32 D6

31 D5

30 D4

29 D3

28 D2

27 D1

26 D0

25 DGND1

MGE360

Fig.2 Pin configuration.

1997 May 20

5

Philips Semiconductors	Preliminary specification

10-bit analog-to-digital interface for

TDA8786; TDA8786A

CCD cameras

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VCCA	analog supply voltage	note 1	−0.3	+7.0	V
VCCD	digital supply voltage	note 1	−0.3	+7.0	V
VCCO	output stages supply voltage	note 1	−0.3	+7.0	V
VCC	supply voltage difference
	between VCCA and VCCD		−1.0	+1.0	V
	between VCCA and VCCO		−1.0	+4.0	V
	between VCCD and VCCO		−1.0	+4.0	V
Vi	input voltage	referenced to VSSA	−0.3	+7.0	V
Vclk(p-p)	AC input voltage for switching	referenced to VSSD	−	VCCD	V
	(peak-to peak-value)
Io	output current		−	10	mA
Tstg	storage temperature		−55	+150	°C
Tamb	operating ambient temperature		−20	+75	°C
Tj	junction temperature		−	150	°C

Note

1. The supply voltages VCCA, VCCD and VCCO may have any value between −0.3 and +7.0 V provided that the supply voltage difference VCC remains as indicated.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL	PARAMETER	CONDITIONS	VALUE	UNIT
Rth j-a	thermal resistance from junction to ambient	in free air	76	K/W

1997 May 20

6

Philips Semiconductors	Preliminary specification

10-bit analog-to-digital interface for

TDA8786; TDA8786A

CCD cameras

CHARACTERISTICS

VCCA = VCCD = 4.75 V; VCCO = 2.6 V; fCLK = 18 Msps; Tamb = 25 °C; unless otherwise specified.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
Supplies
VCCA	analog supply voltage		4.5	4.75	5.5	V
VCCD	digital supply voltage		4.5	4.75	5.5	V
VCCO	supply voltage output		2.5	2.6	5.5	V
ICCA	analog supply current		−	73	−	mA
ICCD	digital supply current		−	20	−	mA
ICCO	supply current output	CL = 20 pF on all data	−	1	−	mA
		outputs; ramp input
Digital inputs
CLOCK INPUT: CLK (REFERENCED TO DGND)
VIL	LOW level input voltage		0	−	0.8	V
VIH	HIGH level input voltage		2.0	−	VCCD	V
IIL	LOW level input current	VCLK = 0.8 V	−1	−	+1	μA
IIH	HIGH level input current	VCLK = 2.0 V	−	−	20	μA
ZI	input impedance	fCLK = 18 MHz	−	2	−	kΩ
CI	input capacitance	fCLK = 18 MHz	−	2	−	pF
INPUTS: CDSP1 AND CDSP2
VIL	LOW level input voltage		0	−	0.6	V
VIH	HIGH level input voltage		2.2	−	VCCD	V
IIL	LOW level input current	VIL = 0.6 V	−	−100	−	μA
IIH	HIGH level input current	VIH = 2.2 V	−	0	−	μA
INPUTS: SEN, STDBY, CLPCDS, CLPOPB, PBK AND CLPADC
VIL	LOW level input voltage		0	−	0.6	V
VIH	HIGH level input voltage		2.2	−	VCCD	V
Ii	input current		−2	−	+2	μA
Correlated double sampling; CDS
ViCDS(p-p)	CDS input amplitude		−	400	1200	mV
	(peak-to-peak value)
ISTGE,IN1,IN2	input current pins 19, 46		−2	−	+2	μA
	and 47
tCDS(min)	CDS control pulses	fiCDS1,2 = fCLK(pix)	12	−	−	ns
	minimum active time
	(HIGH for TDA8786,
	LOW for TDA8786A)
th1	hold time IN1 compared to		−	1	−	ns
	control pulse CDSP1
th2	hold time of IN2 compared to		−	−0.5	−	ns
	control pulse CDSP2

1997 May 20

7

Philips Semiconductors	Preliminary specification

10-bit analog-to-digital interface for

TDA8786; TDA8786A

CCD cameras

SYMBOL	PARAMETER		CONDITIONS	MIN.	TYP.	MAX.	UNIT
Amplifier outputs
GAMPOUT	output amplifier gain			-	6	-	dB
ZAMPOUT	output amplifier impedance			-	300	-	W
VAMPOUT(p-p)	output amplifier dynamic			-	2.4	-	V
	voltage (peak-to-peak value)
VAMPOUT(BL)	output amplifier black level			-	1.1	-	V
	voltage
VAGCOUT(p-p)	AGC output amplifier			-	1800	-	mV
	dynamic voltage level
	(peak-to-peak value)
VAGCOUT	AGC output amplifier			-	1.1	-	V
	black level voltage
ZAGCOUT	AGC output amplifier output	at 10 kHz		-	5	-	W
	impedance
IAGCOUT	AGC output static drive	static		-	-	1	mA
	current
VOPB(p-p)	optical black clamp and			-	1.8	-	V
	blanking block output
	dynamic voltage
	(peak-to-peak value)
VOPB	optical black clamp and			-	1.4	-	V
	blanking block output
	black level voltage
ZOPB	optical black clamp and	at 10 kHz		-	-	5	W
	blanking block output
	impedance
IOPB	OPB output	static		-	-	1	mA
	current drive
IPBIN	input current pin 8			-2	-	+2	mA
GAGCmin	minimum gain of AGC circuit	AGC DAC input code = 00		-	3.5	-	dB
		(9-bit control)
GAGCmax	maximum gain of AGC	AGC DAC input code = ³319		-	33.5	-	dB
	circuit	(9-bit control)
VAGCOUT	AGC output amplifier			-	1.1	-	V
	black level voltage
Vinflex(p-p)	voltage at soft clipper	soft clipper 4-bit control DAC		-	40 %	-	V
	inflexion point	input code = 00			VAGCOUT(p-p)
	(peak-to-peak value)	soft clipper 4-bit control DAC		-	100 %	-	V
		input code = 15			VAGCOUT(p-p)
CRsc	soft clipper compression	Vi(sc)	< Vinflex	-	1.0	-
	ratio	Vi(sc)	> Vinflex	-	0.66	-

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