Philips TDA8785H-C1 Datasheet

DATA SH EET

Product specification
Supersedes data of 1996 Jan 17
File under Integrated Circuits, IC02

1997 Dec 18

INTEGRATED CIRCUITS

TDA8785

8-bit high-speed analog-to-digital
converter with gain and offset
controls

1997 Dec 18 2

Philips Semiconductors Product specification

8-bit high-speed analog-to-digital converter
with gain and offset controls

TDA8785

FEATURES

• 8-bit analog-to-digital converter (ADC)

• 8-bit digital-to-analog converter (DAC)

• Sampling rate up to 30 Msps for both ADC and DAC

• Binary or two’s complement 3-state TTL outputs

• TTL compatible inputs and outputs

• 100 MHz variable gain amplifier (0 to 20 dB) externally

controlled

• All analog inputs and outputs are differential (can also
be used in single-ended format)

• Analog input signal from 0.1 to 1.0 V (p-p) differential

• Offset amplifier with:

– Slow offset control (±250 mV)
– Fast offset control (±500 mV) eventually driven by

internal DAC.

• ADC output code of 8 (typ.) when analog input signal
and offset correction inputs are 0 V

• Gain, slow offset control inputs and DAC output swing
of 1.5 V (p-p) range (2.75 ±0.75 V)

• 2.75 V reference voltage

• Internal references for ADC and DAC.

APPLICATIONS

• CCD type of systems

• Scanner

• Copier

• Video acquisition.

GENERAL DESCRIPTION

The TDA8785 is an 8-bit analog-to-digital converter with
gain and offset controls for the input signal. An internal
8-bit DAC provides fast offsets control.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CCA1

analog supply voltage 1 4.75 5.0 5.25 V

V

CCA2

analog supply voltage 2 4.75 5.0 5.25 V

V

CCD

digital supply voltage 4.75 5.0 5.25 V

V

CCO

TTL output supply voltage 4.75 5.0 5.25 V

I

CCA

analog supply current − 80 − mA

I

CCD

digital supply current − 30 − mA

I

CCO

TTL output supply current − 9 − mA
INL integral non-linearity 0 to 20 dB gain; ramp input −±0.7 ±1.8 LSB
DNL differential non-linearity 0 to 20 dB gain; ramp input −±0.2 ±0.7 LSB
f

clk(max)

maximum clock frequency ADC and DAC 30 −−MHz
B controlled gain amplifier

bandwidth

− 100 − MHz

P

tot

total power dissipation − 600 − mW

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA8785H QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 × 10 × 1.75 mm SOT307-2

1997 Dec 18 3

Philips Semiconductors Product specification

8-bit high-speed analog-to-digital converter
with gain and offset controls

TDA8785

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MBG681

21

43
44
37
38
42
41

OFFSET

AMPLIFIER

GAIN

39
40

ADC

TTL

OUTPUTS

8

8

26 to 33

REGULATORS

6 7 36 5 35 34

9
8

V

CCA

10
11

8

12 to 19

DAC

20 22

CLOCK

DRIVER

CLOCK

DRIVER

23

25
24

1 2 3 4

TDA8785

V

CCA1VCCA2

AGND1

AGND2

DEC2

V

RB

V

DACO(n)

V

DACO(p)

V

FSDAC(p)

V

FSDAC(n)

V

CCD

V

CCO

OGND

OF

B

DEC1

V

ref

V

SOFF(p)

V

SOFF(n)

V

FSAD(p)

V

FSAD(n)

V

FOFF(n)

V

FOFF(p)

V

i(p)

V

i(n)

CLKDACDA7 to DA0

AD0 to AD7

DGNDCLKADC

150 Ω 150 Ω

1997 Dec 18 4

Philips Semiconductors Product specification

8-bit high-speed analog-to-digital converter
with gain and offset controls

TDA8785

PINNING

SYMBOL PIN DESCRIPTION

V

CCA1

1 analog supply voltage 1 (+5 V)

V

CCA2

2 analog supply voltage 2 (+5 V)
AGND1 3 analog ground 1
AGND2 4 analog ground 2
DEC2 5 decoupling input 2
B 6 bandwidth adjustment node input
V

RB

7 ADC reference voltage output

bottom (decoupling)

V

DACO(n)

8 DAC negative voltage output
V

DACO(p)

9 DAC positive voltage output
V

FSDAC(p)

10 DAC full-scale positive control

voltage input

V

FSDAC(n)

11 DAC full-scale negative control

voltage input
DA7 12 DAC TTL input; bit 7 (MSB)
DA6 13 DAC TTL input; bit 6
DA5 14 DAC TTL input; bit 5
DA4 15 DAC TTL input; bit 4
DA3 16 DAC TTL input; bit 3
DA2 17 DAC TTL input; bit 2
DA1 18 DAC TTL input; bit 1
DA0 19 DAC TTL input; bit 0 (LSB)
CLKDAC 20 DAC clock input
DGND 21 digital ground
CLKADC 22 ADC clock input
V

CCD

23 digital supply voltage (+5 V)

OGND 24 output ground
V

CCO

25 output supply voltage (+5 V)
AD0 26 output data; bit 0 (LSB)
AD1 27 output data; bit 1
AD2 28 output data; bit 2
AD3 29 output data; bit 3
AD4 30 output data; bit 4
AD5 31 output data; bit 5
AD6 32 output data; bit 6
AD7 33 output data; bit 7 (MSB)
OF 34 output format input
DEC1 35 decoupling input 1
V

ref

36 reference voltage output (2.75 V)
V

SOFF(p)

37 slow offset amplifier positive

voltage input

V

SOFF(n)

38 slow offset amplifier negative

voltage input

V

FSAD(p)

39 gain control positive voltage input
V

FSAD(n)

40 gain control negative voltage input
V

FOFF(n)

41 fast offset amplifier negative

voltage input

V

FOFF(p)

42 fast offset amplifier positive voltage

input

V

i(p)

43 analog positive voltage input
V

i(n)

44 analog negative voltage input

SYMBOL PIN DESCRIPTION

1997 Dec 18 5

Philips Semiconductors Product specification

8-bit high-speed analog-to-digital converter
with gain and offset controls

TDA8785

Fig.2 Pin configuration.

handbook, full pagewidth

TDA8785

MBG680

1
2
3
4
5
6
7
8

9
10
11

33
32
31
30
29
28
27
26
25
24
23

12

13

14

15

16

17

18

19

20

21

22

44

43

42

41

40

39

38

37

36

35

34

V

CCA1

V

CCA2
AGND1
AGND2

DEC2

B

V

RB

V

DACO(n)

V

DACO(p)

V

FSDAC(p)

V

FSDAC(n)

V

CCD

V

CCO

OGND

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

OF

DEC1

V

ref

V

SOFF(p)

V

SOFF(n)

V

FSAD(p)

V

FSAD(n)

V

FOFF(n)

V

FOFF(p)

V

i(p)

V

i(n)

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

CLKDAC

DGND

CLKADC

1997 Dec 18 6

Philips Semiconductors Product specification

8-bit high-speed analog-to-digital converter
with gain and offset controls

TDA8785

FUNCTIONAL DESCRIPTION

The TDA8785 is composed of an 8-bit ADC (30 Msps),
a wide-band gain amplifier, an input offset amplifier and an
8-bit dynamic adjustment DAC.

Input signal

Two input pins are provided to apply a differential input
signal with a wide range (100 to 1000 mV differential).
It is also possible to apply a single signal by setting a DC
voltage on one of the differential pins and supplying the
signal to the other.

Controlled gain amplifier

The gain amplifier is used to adjust the wide input signal
range to the fixed ADC input range of 1 V (p-p).

A large gain of 20 dB can be achieved with low-noise
behaviour and a large bandwidth of 100 MHz to correctly
amplify square type signals with step edges. Using pin 6,
it is possible to reduce the internal bandwidth of the gain
amplifier via an external capacitor and thus improve its
noise behaviour. The gain amplifier is controlled via an
external differential voltage (single input can also be
applied).

Input offset amplifier and adjustment DAC

The Input offset amplifier contains two different control
inputs (which can also be single):

• Slow offset control, for slow variation characteristics
(e.g. temperature, supply voltage, etc.)

• Fast offset control, for correction related to the clock
rate.

Slow offset control is carried out by an external voltage
while fast offset control is digitally carried out via the
internal 8-bit DAC with external connections of the
respective pins V

DACO(n)

, V

DACO(p)

, V

FOFF(n)

and V

FOFF(p)

.

The internal 8-bit DAC operates at the ADC clock rate to
allow dynamic corrections on the input signal chain based
on the signal processing information carried out after the
digital conversion. The output voltage amplitude of the
DAC can be controlled via a different input voltage (which
can also be single) in a range of ±25% with a 150 Ω DAC
output load.

The DAC can also be used for the gain or the slow offset
control with some external DC voltage adaptations and
can be considered as a separate function of the ADC
chain. The DAC can be used independently, for example
as a video DAC.

8-bit ADC

The 8-bit ADC converts a signal of 1 V (p-p) from the
controlled gain amplifier into an 8-bit coded digital word at
a maximum rate of 30 Msps. Its reference voltage is
supplied by the general voltage regulator. The output data
format can either be binary, two’s complement or 3-state
by selecting pin OF.

When all the differential inputs on the offset amplifier
(V

SOFF(p)

, V

SOFF(n)

, V

FOFF(n)

, V

FOFF(p)

, V

i(p)

and V

i(n)

) are at
0 V (equivalent to both inputs short-circuited), the output
code of the ADC is code 8.

Internal voltage regulator

An internal voltage regulator provides all the references for
the different blocks. A stable 2.75 V voltage reference
output is provided for use in the application environment.
One application is to connect all the slow control inputs
(V

FSDAC(p)

, V

FSDAC(n)

, V

SOFF(p)

, V

SOFF(n)

, V

FSAD(p)

and

V

FSAD(n)

) to this reference, either to their two differential
inputs to get the nominal settings or to one of the
differential inputs to have easy single-input control.

All these control inputs have the same control range.

1997 Dec 18 7

Philips Semiconductors Product specification

8-bit high-speed analog-to-digital converter
with gain and offset controls

TDA8785

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CCA

analog supply voltage −0.3 +7.0 V

V

CCD

digital supply voltage −0.3 +7.0 V

V

CCO

output supply voltage −0.3 +7.0 V

∆V

CC

supply voltage difference between

V

CCA

and V

CCD

−1.0 +1.0 V

V

CCD

and V

CCO

−1.0 +1.0 V

V

CCA

and V

CCO

−1.0 +1.0 V

V

i

input voltage referenced to AGND −0.3 +7.0 V

V

clk(p-p)

clock input voltage for switching (peak-to-peak value) referenced to DGND − V

CCD

V

I

o

output current − 6mA

T

stg

storage temperature −55 +150 °C

T

amb

operating ambient temperature 0 70 °C

T

j

junction temperature − 150 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 75 K/W

1997 Dec 18 8

Philips Semiconductors Product specification

8-bit high-speed analog-to-digital converter
with gain and offset controls

TDA8785

CHARACTERISTICS

V

CCA1=VCCA2=VCCD=VCCO

= 4.75 to 5.25 V; AGND, DGND and OGND short-circuited together;

V

CCA

to V

CCD=VCCD

to V

CCO=VCCA

to V

CCO

= −0.25 to +0.25 V; T

amb

=0to70°C;

typical values measured at V

CCA=VCCD=VCCO

= 5 V and T

amb

=25°C; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V

CCA1

analog supply voltage 1 4.75 5.0 5.25 V

V

CCA2

analog supply voltage 2 4.75 5.0 5.25 V

V

CCD

digital supply voltage 4.75 5.0 5.25 V

V

CCO

TTL output supply voltage 4.75 5.0 5.25 V

I

CCA

analog supply current − 80 − mA

I

CCD

digital supply current − 37 − mA

I

CCO

TTL output supply current − 9 − mA

Reference voltages (pins V

ref

and VRB)

V

o(ref)

output reference voltage 2.60 2.75 2.90 V

V

line

line regulation voltage V

CCA

= 4.75 to 5.25 V − 4 − mV

I

o(L)

output load current −0.5 − +0.5 mA

V

RB

reference voltage output bottom
(decoupling)

− V

CCA

− 2.5 − V

V

offset(B)

offset voltage bottom code 0 − V

RB

− 250 − mV

∆V

ADC

ADC reference voltage difference between

code 0 and 255

− 1 − V

Analog inputs (pins V

i(p)

and V

i(n)

); see Table 1

V

i(diff)(p-p)

differential input voltage V

i(p)

− V

i(n)

(peak-to-peak value)

0 dB gain − 1000 − mV
20 dB gain − 100 − mV

V

I

DC input voltage 2.5 3.0 3.5 V

I

i

input current − 7 −µA

Z

i

input impedance − 20 − kΩ

C

i

input capacitance − 1 − pF

Fast offset amplifier inputs (pins V

FOFF(p)

and V

FOFF(n)

); DC parameters

V

FOFF(p)

positive input voltage 0 dB gain − 500 − mV

20 dB gain − 50 − mV

V

FOFF(n)

negative input voltage 0dB gain − 500 − mV

20 dB gain − 50 − mV

V

I

DC input voltage V

CCA

− 0.75 V

CCA

− 0.25 V

CCA

V

I

i

input current − 4 −µA

Z

i

input impedance − 20 − kΩ

C

i

input capacitance − 1 − pF