Philips TDA8776AK-C1 Datasheet

DATA SH EET

Product specification
Supersedes data of 1995 May 11
File under Integrated Circuits, IC02

1996 Jun 04

INTEGRATED CIRCUITS

TDA8776A

10-bit, 1000 Msps Digital-to-Analog
Converter (DAC)

1996 Jun 04 2

Philips Semiconductors Product specification

10-bit, 1000 Msps Digital-to-Analog
Converter (DAC)

TDA8776A

FEATURES

• 10-bit resolution

• Conversion rate up to 1000 MHz

• 10K/100K ECL input levels

• Internal reference voltage generator

• No deglitching circuit required

• Internal input register

• Power dissipation only 925 mW (typical)

• Internal 50 Ω output load (connected to the analog

ground)

• Very few external components required.

APPLICATIONS

High-speed digital-to-analog conversion for:

• High resolution video and graphics

• Direct digital synthesis (DDS)

• Telecommunication

• High-speed modems.

GENERAL DESCRIPTION

The TDA8776A is a 10-bit Digital-to-Analog Converter
(DAC) for high resolution video and other high frequency
applications. It converts the digital input signal into an
analog output voltage at a maximum conversion rate of
1000 Msps. No external reference voltage is required and
all digital inputs are 10K/100K-ECL compatible.

QUICK REFERENCE DATA

Notes

1. D0 to D9 connected to either HIGH or LOW level, CLK is HIGH and

CLK is LOW.

2. The analog output voltages (V

OUT

and V

OUT

) are negative with respect to AGND (see Table 1). The external output

resistance between AGND and each of these outputs is typically 50 Ω.

3. A warm-up time is necessary to reach optimal performances.

ORDERING INFORMATION

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

EEA

analog supply voltage −5.46 −5.20 −4.94 V

V

EED

digital supply voltage −5.46 −5.20 −4.94 V

V

EEI

input stages digital supply
voltage

note 1 −5.46 −5.20 −4.94 V

I

EEA

analog supply current note 1 − 108 145 mA

I

EED

digital supply current note 1 − 60 85 mA

I

EEI

input stages digital supply
current

note 1 − 10 15 mA

V

OUT

− V

OUT

full-scale analog output voltage
(peak-to-peak value)

notes 1 and 2; ZL=50Ω 1.7 2.0 2.5 V

INL DC integral non-linearity note 3 −±0.3 ±0.5 LSB
DNL DC differential non-linearity note 3 −±0.2 ±0.45 LSB
f

clk(max)

maximum clock frequency 1000 −−MHz

t

S1

settling time (differential) 10% to 90% full scale; Fig.9 − 0.5 − ns

P

tot

total power dissipation − 925 − mW

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA8776AK PLCC28 plastic leaded chip carrier; 28 leads SOT261-2

1996 Jun 04 3

Philips Semiconductors Product specification

10-bit, 1000 Msps Digital-to-Analog
Converter (DAC)

TDA8776A

BLOCK DIAGRAM

Fig.1 Block diagram.

MBE581

10

11

24

D9 D8 D7 D6 D5 D4 D3 D2

D1 D0 IGND

22 21 20 19 18 17 16 15 14 13 12

ECL BUFFERS

COLUMN DECODER

ROW

DECODER

DELAY

TDA8776A

R-2R DIVIDER

25 34 9 86 7 27

28

25

26

AGND1

CLK CLK

DGND1

DGND2

AGND2

V

V

EED1VEED2

V

OUT1VOUT1VOUT2

V

OUT2

EEI

V

EED3

V

EEA

1996 Jun 04 4

Philips Semiconductors Product specification

10-bit, 1000 Msps Digital-to-Analog
Converter (DAC)

TDA8776A

PINNING

SYMBOL PIN DESCRIPTION

n.c. 1 not connected
DGND1 2 digital ground 1
V

EED1

3 digital supply voltage 1 (−5.2 V)

V

EED2

4 digital supply voltage 2 (−5.2 V)
AGND1 5 analog ground 1
V

OUT1

6 analog voltage output 1
V

OUT2

7 analog voltage output 2
V

OUT1

8 complementary analog voltage

output 1

V

OUT2

9 complementary analog voltage

output 2
AGND2 10 analog ground 2
V

EED3

11 digital supply voltage 3 (−5.2 V)
IGND 12 input ground for ECL input buffers
D0 13 data input; bit 0 (LSB)
D1 14 data input; bit 1

D2 15 data input; bit 2
D3 16 data input; bit 3
D4 17 data input; bit 4
D5 18 data input; bit 5
D6 19 data input; bit 6
D7 20 data input; bit 7
D8 21 data input; bit 8
D9 22 data input; bit 9 (MSB)
n.c. 23 not connected
V

EEA

24 analog supply voltage (−5.2 V)

V

EEI

25 input supply voltage for ECL input

buffers (−5.2 V)
CLK 26 complementary clock input
CLK 27 clock input
DGND2 28 digital ground 2

SYMBOL PIN DESCRIPTION

Fig.2 Pin configuration.

5
6
7
8

9
10
11

25
24
23
22
21
20
19

12

13

14

15

16

17

18

4

3

2

1

28

27

26

TDA8776A

IGND

D0

D1D2D3

D4

D5

D6

D7

D8

D9

n.c.

V

EEA

V

OUT1

V

OUT1

V

OUT2

V

OUT2

V

EEI

V

EED3

n.c.

CLK

CLK

DGND1

DGND2

V

EED2VEED1

MBE582

AGND1

AGND2

1996 Jun 04 5

Philips Semiconductors Product specification

10-bit, 1000 Msps Digital-to-Analog
Converter (DAC)

TDA8776A

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

EEA

analog supply voltage −7.0 ±0.3 V

V

EED

digital supply voltage −7.0 ±0.3 V

V

EEI

input stages digital supply voltage −7.0 ±0.3 V

V

EEA

− V

EED

supply voltage differential −0.5 +0.5 V
AGND − DGND ground voltage differential −0.1 +0.1 V
V

I

input voltage V

EEI

±0.3 V

I

OUT/IOUT

total output current ZL=50Ω−5 +50 mA
T

stg

storage temperature −55 +150 °C
T

amb

operating ambient temperature 0 70 °C
T

j

junction temperature − 150 °C

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 55 (typ.) K/W

1996 Jun 04 6

Philips Semiconductors Product specification

10-bit, 1000 Msps Digital-to-Analog
Converter (DAC)

TDA8776A

CHARACTERISTICS

V

EEA=V24

to V5and V10= −5.46 to −4.94 V; V

EED=V3,V4

and V11to V2and V28= −5.46 to −4.94 V;

V

EEI=V25

to V12= −5.46 to −4.94 V; V

EED

and V

EEI

shorted together; T

amb

=0to+70°C; AGND, DGND and IGND

shorted together; V

OUT

− V

OUT

= 2 V (p-p); ZL=50Ω; unless otherwise specified (typical values measured at

V

EEA=VEED

= −5.2 V and T

amb

=25°C).

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

EEA

analog supply voltage −5.46 −5.20 −4.94 V

V

EED

digital supply voltage −5.46 −5.20 −4.94 V

V

EEI

input stages digital supply voltage note 1 −5.46 −5.20 −4.94 V

I

EEA

analog supply current note 1 − 108 145 mA

I

EED

digital supply current note 1 − 60 85 mA

I

EEI

input stages digital supply current note 1 − 10 15 mA

AGND − DGND ground voltage differential −0.1 − +0.1 V

Inputs

D

IGITAL INPUTS (D9 TO D0) AND CLOCK INPUTS (CLK AND CLK)

V

IL

LOW level input voltage −1.9 −1.8 −1.6 V

V

IH

HIGH level input voltage −1.2 −0.9 −0.8 V

I

IL

LOW level input current VI= −1.8 V −−10 µA

I

IH

HIGH level input current VI= −0.9 V −−20 µA

f

clk(max)

maximum clock frequency 1000 −−MHz
Outputs (referenced to AGND); notes 1 and 2
V

OUT

− V

OUT(p-p)

full-scale analog output voltage

(peak-to-peak value)

ZL=50Ω 1.7 2.0 2.5 V

Z

O

output impedance − 50 −Ω

Transfer function

INL DC integral non-linearity note 3 −±0.3 ±0.5 LSB
DNL DC differential non-linearity note 3 −±0.2 ±0.45 LSB

Spurious free dynamic range (f

clk

= 1000 MHz); V

EEA=VEED

= 5.2 V; T

amb

=25°C; note 4; see Fig.3

SFDR spurious free dynamic range

f

OUT

= 10 MHz −65 −69 − dB

f

OUT

= 50 MHz −−60 − dB

f

OUT

= 100 MHz −52 −57 − dB

f

OUT

= 200 MHz −−46 − dB