INTEGRATED CIRCUITS
TDA8775
Triple 10-bit video Digital-to-Analog Converter (DAC)
Preliminary specification |
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1996 Aug 14 |
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File under Integrated Circuits, IC02 |
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Philips Semiconductors |
Preliminary specification |
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Triple 10-bit video Digital-to-Analog
TDA8775
Converter (DAC)
FEATURES
∙10-bit resolution
∙Sampling rate up to:
–50 MHz for normal mode; RL = 37.5 Ω
–35 MHz for LOW power mode; RL = 150 Ω
∙Internal current reference
∙Current reference selector for:
–normal mode, RL = 37.5 Ω (typ.)
–low-power mode, RL = 150 Ω (typ.)
∙No deglitching circuit required
∙SYNC and BLANK control inputs
∙0.66 V output voltage range on red and blue channels
∙1 V output voltage range on green channel (including sync)
∙BLANK control input on the 3 channels
∙+ 5 V power supply.
QUICK REFERENCE DATA
APPLICATIONS
∙General purpose high-speed digital-to-analog conversion
∙Digital TV
∙Graphic display
∙Desktop video processing.
GENERAL DESCRIPTION
The TDA8775 consists of three 10-bit video Digital-to-Analog Converters (DACs). They convert the digital input signals into current outputs at a maximum conversion rate of 50 MHz.
The DACs are based on current source architecture with selectable current reference.
The devices are fabricated in a 5 V CMOS process that ensures high functionality with low power dissipation.
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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VDDA |
analog supply voltage |
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4.5 |
5.0 |
5.5 |
V |
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VDDD |
digital supply voltage |
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4.5 |
5.0 |
5.5 |
V |
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IDDA |
analog supply current |
SLT = 1; RL = 37.5 Ω |
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67 |
tbf |
mA |
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SLT = 0; RL = 150 Ω |
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16 |
tbf |
mA |
IDDD |
digital supply current |
SLT = 1; RL = 37.5 Ω |
− |
15 |
tbf |
mA |
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SLT = 0; RL = 150 Ω |
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10 |
tbf |
mA |
INL |
DC integral non-linearity |
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− |
±1 |
±2 |
LSB |
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DNL |
DC differential non-linearity |
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− |
±0.7 |
±1.0 |
LSB |
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fclk(max) |
maximum clock frequency |
SLT = 1; RL = 37.5 Ω |
50 |
− |
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MHz |
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SLT = 0; RL = 150 Ω |
35 |
− |
− |
MHz |
Ptot |
total power dissipation |
SLT = 1; RL = 37.5 Ω; |
− |
410 |
tbf |
mW |
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fclk = 50 MHz |
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SLT = 0; RL = 150 Ω; |
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130 |
tbf |
mW |
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fclk = 35 MHz |
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ORDERING INFORMATION |
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TYPE |
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PACKAGE |
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NUMBER |
NAME |
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DESCRIPTION |
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VERSION |
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TDA8775G |
LQFP48 |
plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm |
SOT313-2 |
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1996 Aug 14 |
2 |
Philips Semiconductors |
Preliminary specification |
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Triple 10-bit video Digital-to-Analog
TDA8775
Converter (DAC)
BLOCK DIAGRAM
handbook, full pagewidth |
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VDDA1 |
VDDA2 |
VDDA3 |
VDDD1 |
VDDD2 |
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red |
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38 |
41 |
45 |
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11 |
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37 |
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10-7 |
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digital inputs |
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4 |
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(bits R0 to R3) |
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TDA8775 |
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LSB |
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25 |
CLK |
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DECODER |
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red |
6-1 |
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6 |
MSB |
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CURRENT |
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46 |
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digital inputs |
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OUTR |
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DECODER |
SOURCE |
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(bits R4 to R9) |
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green |
24-21 |
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digital inputs |
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4 |
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(bits G0 to G3) |
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LSB |
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DECODER |
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green |
20-15 |
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6 |
MSB |
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CURRENT |
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digital inputs |
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44 |
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DECODER |
SOURCE |
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OUTG |
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(bits G4 to G9) |
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blue |
35-32 |
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47 |
VSSA3 |
digital inputs |
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4 |
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(bits B0 to B3) |
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43 |
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VSSA2 |
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LSB |
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DECODER |
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40 |
VSSA1 |
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blue |
31-26 |
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6 |
MSB |
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CURRENT |
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42 |
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digital inputs |
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OUTB |
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DECODER |
SOURCE |
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(bits B4 to B9) |
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BLANK |
14 |
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control input |
CONTROL |
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CURRENT |
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13 |
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SYNC |
REGISTER |
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REFERENCE |
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control input |
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48 |
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39 |
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12 |
36 |
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MGE965 |
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SLT |
reference current |
VSSD1 |
VSSD2 |
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decoupling input |
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(Iref) |
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Fig.1 Block diagram.
1996 Aug 14 |
3 |
Philips Semiconductors |
Preliminary specification |
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Triple 10-bit video Digital-to-Analog
TDA8775
Converter (DAC)
PINNING
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SYMBOL |
PIN |
DESCRIPTION |
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R9 |
1 |
red digital input data; bit 9 (MSB) |
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R8 |
2 |
red digital input data; bit 8 |
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R7 |
3 |
red digital input data; bit 7 |
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R6 |
4 |
red digital input data; bit 6 |
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R5 |
5 |
red digital input data; bit 5 |
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R4 |
6 |
red digital input data; bit 4 |
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R3 |
7 |
red digital input data; bit 3 |
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R2 |
8 |
red digital input data; bit 2 |
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R1 |
9 |
red digital input data; bit 1 |
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R0 |
10 |
red digital input data; bit 0 (LSB) |
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VDDD1 |
11 |
digital supply voltage 1 |
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VSSD1 |
12 |
digital supply ground 1 |
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13 |
composite sync control input; for green channel only (active LOW) |
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SYNC |
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14 |
composite blank control input (active LOW) |
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BLANK |
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G9 |
15 |
green digital input data; bit 9 (MSB) |
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G8 |
16 |
green digital input data; bit 8 |
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G7 |
17 |
green digital input data; bit 7 |
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G6 |
18 |
green digital input data; bit 6 |
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G5 |
19 |
green digital input data; bit 5 |
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G4 |
20 |
green digital input data; bit 4 |
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G3 |
21 |
green digital input data; bit 3 |
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G2 |
22 |
green digital input data; bit 2 |
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G1 |
23 |
green digital input data; bit 1 |
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G0 |
24 |
green digital input data; bit 0 (LSB) |
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CLK |
25 |
clock input |
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B9 |
26 |
blue digital input data; bit 9 (MSB) |
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B8 |
27 |
blue digital input data; bit 8 |
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B7 |
28 |
blue digital input data; bit 7 |
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B6 |
29 |
blue digital input data; bit 6 |
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B5 |
30 |
blue digital input data; bit 5 |
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B4 |
31 |
blue digital input data; bit 4 |
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B3 |
32 |
blue digital input data; bit 3 |
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B2 |
33 |
blue digital input data; bit 2 |
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B1 |
34 |
blue digital input data; bit 1 |
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B0 |
35 |
blue digital input data; bit 0 (LSB) |
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VSSD2 |
36 |
digital supply ground 2 |
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VDDD2 |
37 |
digital supply voltage 2 |
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VDDA1 |
38 |
analog supply voltage 1 |
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Iref |
39 |
decoupling pin for reference current |
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VSSA1 |
40 |
analog supply ground 1 |
1996 Aug 14 |
4 |
Philips Semiconductors |
Preliminary specification |
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Triple 10-bit video Digital-to-Analog
TDA8775
Converter (DAC)
SYMBOL |
PIN |
DESCRIPTION |
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VDDA2 |
41 |
analog supply voltage 2 |
OUTB |
42 |
blue analog output |
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VSSA2 |
43 |
analog supply ground 2 |
OUTG |
44 |
green analog output |
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VDDA3 |
45 |
analog supply voltage 3 |
OUTR |
46 |
red analog output |
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VSSA3 |
47 |
analog supply ground 3 |
SLT |
48 |
mode selection; normal mode, RL = 37.5 Ω (active HIGH); low power mode, |
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RL = 150 Ω (active LOW) |
SLT |
SSA3 |
OUTR |
DDA3 |
OUTG |
SSA2 |
OUTB |
DDA2 |
SSA1 |
ref |
DDA1 |
DDD2 |
V |
V |
V |
V |
V |
I |
V |
V |
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48 |
47 |
46 |
45 |
44 |
43 |
42 |
41 |
40 |
39 |
38 |
37 |
R9 1
R8 2
R7 3
R6 4
R5 5
R4 6
TDA8775
R3 7
R2 8
R1 9
R0 10
VDDD1 11
VSSD1 12
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24 |
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SYNC |
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BLANK |
G9 |
G8 |
G7 |
G6 |
G5 |
G4 |
G3 |
G2 |
G1 |
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G0 |
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36 VSSD2
35 B0
34 B1
33 B2
32 B3
31 B4
30 B5
29 B6
28 B7
27 B8
26 B9
25 CLK
MGE964
Fig.2 Pin configuration.
1996 Aug 14 |
5 |