Philips TDA8768H-5-C1, TDA8768H-4-C1, TDA8768AH-7-C1, TDA8768AH-5-C1, TDA8768AH-4-C1 Datasheet
DATA SH EET
Preliminary specification
Supersedes data of 1998 Feb 25
File under Integrated Circuits, IC02
1998 Aug 26
INTEGRATED CIRCUITS
TDA8768
12-bit high-speed Analog-to-Digital
Converter (ADC)
1998 Aug 26 2
Philips Semiconductors Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8768
FEATURES
• 12-bit resolution
• Sampling rate up to 55 MHz
•−3 dB bandwidth of 190 MHz
• 5 V power supplies
• Binary or twos-complement CMOS outputs
• In-range CMOS-compatible output
• TLL-CMOS compatible static digital inputs
• 3 to 5 V CMOS-compatible digital outputs
• Differential clock input; Positive Emitter Coupled Logic
(PECL)-compatible
• Power dissipation 325 mW (typical)
• Low analog input capacitance (typical 2 pF), no buffer
amplifier required
• Integrated sample-and-hold amplifier
• Differential analog input
• External amplitude range control
• Voltage controlled regulator included.
APPLICATIONS
• High-speed analog-to-digital conversion for
– Video signal digitizing
– High Definition TV (HDTV)
– Imaging (camera scanner)
– Medical imaging
– Telecommunication
– Base-station receiver.
GENERAL DESCRIPTION
The TDA8768 is a bipolar 12-bit Analog-to-Digital
Converter (ADC) optimized for telecommunications and
professional imaging. It converts the analog input signal
into 12-bit binary coded digital words at a maximum
sampling rate of 55 MHz. All static digital inputs (SH,
CE
and OTC) are TTL and CMOS compatible and all outputs
are CMOS compatible. A sine wave clock input signal can
also be used.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CCA
analog supply voltage 4.75 5.0 5.25 V
V
CCD
digital supply voltage 4.75 5.0 5.25 V
V
CCO
output supply voltage 3.0 3.3 5.25 V
I
CCA
analog supply current − 33 tbf mA
I
CCD
digital supply current − 30 tbf mA
I
CCO
output supply current f
CLK
= 4 MHz; fi= 400 kHz − 3.2 tbf mA
INL integral non-linearity f
CLK
= 4 MHz; fi= 400 kHz −±2.0 ±4.5 LSB
DNL differential non-linearity f
CLK
= 4 MHz; fi= 400 kHz −±0.6 ±1.0 LSB
f
CLK(max)
maximum clock frequency
TDA8768H/4 40 −−MHz
TDA8768H/5 55 −−MHz
P
tot
total power dissipation − 325 tbf mW
TYPE
NUMBER
PACKAGE
SAMPLING
FREQUENCY (MHz)
NAME DESCRIPTION VERSION
TDA8768H/4
QFP44
plastic quad flat package; 44 leads
(lead length 1.3 mm); body 10 × 10 × 1.75 mm
SOT307-2
40
TDA8768H/5 55
1998 Aug 26 3
Philips Semiconductors Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8768
BLOCK DIAGRAM
Fig.1 Block diagram.
V
I
handbook, full pagewidth
MGR470
D11
MSB
data outputs
19
21
D1022
D923
D824
D725
D626
D527
D4
D3
28
29
43
42
39
11
1, 5 to 8, 12 to 14, 16
V
ref
SH
n.c.
D230
D131
D0
LSB
32
V
CCO
33
IR
34
20
18
CMOS
OUTPUTS
LATCHES
ANALOG-TO-DIGITAL
CONVERTER
CLOCK DRIVER
15
V
CCD2
37
V
CCD1
41
V
CCA4
3
V
CCA3
9
V
CCA2
2
V
CCA1
36
CLK
35
CLK
CMOS
OUTPUT
OGND
OVERFLOW/
UNDERFLOW
LATCH
CEOTC
AMP
sample-
and-hold
TDA8768
17
DGND2
38
DGND1
40
AGND4
4
AGND3
10
AGND2
44
AGND1
V
I
1998 Aug 26 4
Philips Semiconductors Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8768
PINNING
SYMBOL PIN DESCRIPTION
n.c. 1 not connected
V
CCA1
2 analog supply voltage 1 (+5 V)
V
CCA3
3 analog supply voltage 3 (+5 V)
AGND3 4 analog ground 3
n.c. 5 not connected
n.c. 6 not connected
n.c. 7 not connected
n.c. 8 not connected
V
CCA2
9 analog supply voltage 2 (+5 V)
AGND2 10 analog ground 2
V
ref
11 reference voltage input
n.c. 12 not connected
n.c. 13 not connected
n.c. 14 not connected
V
CCD2
15 digital supply voltage 2 (+5 V)
n.c. 16 not connected
DGND2 17 digital ground 2
OTC 18 control input twos complement
output; active HIGH
CE 19 chip enable input
(CMOS level; active LOW)
IR 20 in-range output
D11 21 data output; bit 11 (MSB)
D10 22 data output; bit 10
D9 23 data output; bit 9
D8 24 data output; bit 8
D7 25 data output; bit 7
D6 26 data output; bit 6
D5 27 data output; bit 5
D4 28 data output; bit 4
D3 29 data output; bit 3
D2 30 data output; bit 2
D1 31 data output; bit 1
D0 32 data output; bit 0 (LSB)
V
CCO
33 output supply voltage (3 to 5.25 V)
OGND 34 output ground
CLK 35 complementary clock input; active
LOW
CLK 36 clock input
V
CCD1
37 digital supply voltage 1 (+5 V)
DGND1 38 digital ground 1
SH 39 sample-and-hold enable input
(CMOS level; active HIGH)
AGND4 40 analog ground 4
V
CCA4
41 analog supply voltage 4 (+5 V)
V
I
42 positive analog input voltage
V
I
43 negative analog input voltage
AGND1 44 analog ground 1
SYMBOL PIN DESCRIPTION
1998 Aug 26 5
Philips Semiconductors Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8768
Fig.2 Pin configuration.
handbook, full pagewidth
TDA8768H
MGR469
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
n.c.
n.c.
n.c.
n.c.
n.c.
V
CCA1
V
CCA3
V
CCA2
V
ref
AGND3
AGND2
n.c.
n.c.
n.c.
n.c.
IR
D11
D10
DGND2
V
CCD2
CE
OTC
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
OGND
DGND1
AGND4
AGND1
V
CCD1
V
CCA4
CLK
V
CCO
CLK
SH
VIV
I
1998 Aug 26 6
Philips Semiconductors Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8768
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. The supply voltages V
CCA
, V
CCD
and V
CCO
may have any value between −0.3 V and +7.0 V provided that the supply
voltage differences ∆VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CCA
analog supply voltage note 1 −0.3 +7.0 V
V
CCD
digital supply voltage note 1 −0.3 +7.0 V
V
CCO
output supply voltage note 1 −0.3 +7.0 V
∆V
CC
supply voltage difference
V
CCA
− V
CCD
−1.0 +1.0 V
V
CCD
− V
CCO
−1.0 +4.0 V
V
CCA
− V
CCO
−1.0 +4.0 V
V
I
input voltage at pins 42 and 43 referenced to AGND 0.3 V
CCA
V
V
i(p-p)
input voltage at pins 35 and 36 for
differential clock drive (peak-to-peak
value)
− V
CCD
V
I
O
output current − 10 mA
T
stg
storage temperature −55 +150 °C
T
amb
operating ambient temperature −10 +85 °C
T
j
junction temperature − 150 °C
SYMBOL PARAMETER CONDITION VALUE UNIT
R
th(j-a)
thermal resistance from junction to ambient in free air 75 K/W
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