Philips TDA8764TS-8-C1, TDA8764TS-4-C1 Datasheet
DATA SH EET
Preliminary specification
1999 Jan 12
INTEGRATED CIRCUITS
TDA8764
10-bit high-speed low-power ADC
with internal reference regulator
1999 Jan 12 2
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
FEATURES
• 10-bit resolution (binary or gray code)
• Sampling rate up to 40 MHz (/4 version)
Sampling rate up to 80 MHz (/8 version)
• DC sampling allowed
• One clock cycle conversion only
• High signal-to-noise ratio over a large analog input
frequency range (9.5 effective bits at 5 MHz; full-scale
input at f
clk
= 40 MHz)
• No missing codes guaranteed
• In-Range (IR) CMOS output
• TTL and CMOS levels compatible digital inputs
• 2.7 to 3.6 V CMOS digital outputs
• Low-level AC clock input signal allowed
• Internal reference voltage regulator
• Power dissipation only 250 mW (typical for /4 version)
Power dissipation only 375 mW (typical for /8 version)
• Low analog input capacitance, no buffer amplifier
required
• No sample-and-hold circuit required.
APPLICATIONS
High-speed analog-to-digital conversion for:
• Video data digitizing
• Radar pulse analysis
• Transient signal analysis
• High energy physics research
•Σ∆ modulators
• Medical imaging.
GENERAL DESCRIPTION
The TDA8764 is a 10-bit high-speed low-power
Analog-to-Digital Converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary or gray coded digital words at a maximum
sampling rate of 40 MHz (/4 version) and 80 MHz
(/8 version). All digital inputs and outputs are TTL
compatible, although a low-level sine wave clock input
signal is allowed.
The device includes an internal voltage reference
regulator.
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
SAMPLING
FREQUENCY (MHz)
NAME DESCRIPTION VERSION
TDA8764TS/4 SSOP28 plastic shrink small outline package; 28 leads;
body width 5.3 mm
SOT341-1 40
TDA8764TS/8 80
TDA8764HL/4 LQFP32 plastic low profile quad flat package; 32 leads;
body 5 × 5 × 1.4 mm
SOT401-1 40
TDA8764HL/8 80
1999 Jan 12 3
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CCA
analog supply voltage 4.75 5.0 5.25 V
V
CCD
digital supply voltage 4.75 5.0 5.25 V
V
CCO
output stages supply voltage 2.7 3.3 3.6 V
I
CCA
analog supply current
TDA8764TS/4; TDA8764HL/4 − 25 tbf mA
TDA8764TS/8; TDA8764HL/8 − 45 tbf mA
I
CCD
digital supply current
TDA8764TS/4; TDA8764HL/4 − 25 tbf mA
TDA8764TS/8; TDA8764HL/8 − 30 tbf mA
I
CCO
output stages supply current
TDA8764TS/4; TDA8764HL/4 f
clk
= 40 MHz; ramp input − 0 tbf mA
TDA8764TS/8; TDA8764HL/8 f
clk
= 80 MHz; ramp input − 0 tbf mA
INL integral non-linearity
TDA8764TS/4; TDA8764HL/4 f
clk
= 40 MHz; ramp input −±0.8 tbf LSB
TDA8764TS/8; TDA8764HL/8 f
clk
= 80 MHz; ramp input −±0.8 tbf LSB
DNL differential non-linearity
TDA8764TS/4; TDA8764HL/4 f
clk
= 40 MHz; ramp input −±0.25 tbf LSB
TDA8764TS/8; TDA8764HL/8 f
clk
= 80 MHz; ramp input −±0.25 tbf LSB
f
clk(max)
maximum clock frequency
TDA8764TS/4; TDA8764HL/4 40 −−MHz
TDA8764TS/8; TDA8764HL/8 80 −−MHz
P
tot
total power dissipation
TDA8764TS/4; TDA8764HL/4 f
clk
= 40 MHz; ramp input − 250 tbf mW
TDA8764TS/8; TDA8764HL/8 f
clk
= 80 MHz; ramp input − 375 tbf mW
1999 Jan 12 4
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
DGND2
R
LAD
V
RB
V
RM
V
RT
V
I
V
CCD2
V
CCA
D4
D5
D6
D7
D8
D3
D2
D1
D0
D9
IN-RANGE LATCH
CMOS
OUTPUTS
LATCHES
ANALOG-TO-DIGITAL
CONVERTER
CLOCK DRIVER
REFERENCE
VOLTAGE
REGULATOR
FCE099
CMOS
OUTPUT
CLKDEC
GRAY
TC
OE
TDA8764
V
CCO
AGND
9 (15)
3 (7) 5 (10) 1 (5) 10
(16)
15 (21)11 (17)
analog ground digital ground digital ground
DGND1OGND
output ground
analog
voltage input
data outputs
LSB
MSB
V
CCD1
IR output
7 (13)
6 (12)
4 (8) 12 (18) 14 (20) 27 (3)
28 (4)
26 (2)
13 (19)
16 (22)
17 (23)
18 (24)
19 (25)
20 (26)
21 (27)
22 (28)
23 (29)
24 (30)
25 (31)
2 (6)
8 (14)
The pin numbers given in parenthesis refer to the LQFP32 package.
1999 Jan 12 5
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
PINNING
SYMBOL
PINS
DESCRIPTION
SSOP28 LQFP32
CLK 1 5 clock input
TC 2 6 twos complement input (input active LOW)
V
CCA
3 7 analog supply voltage (+5 V)
AGND 4 8 analog ground
DEC 5 10 decoupling input
V
RB
6 12 reference voltage BOTTOM input
V
RM
7 13 reference voltage MIDDLE input
V
I
8 14 analog input voltage
V
RT
9 15 reference voltage TOP input
OE 10 16 output enable input (input active LOW)
V
CCD2
11 17 digital supply voltage 2 (+5 V)
DGND2 12 18 digital ground 2
V
CCO
13 19 supply voltage for output stages (2.7 to 3.6 V)
OGND 14 20 output ground
GRAY 15 21 gray code input (input active HIGH)
D0 16 22 data output; bit 0 (LSB)
D1 17 23 data output; bit 1
D2 18 24 data output; bit 2
D3 19 25 data output; bit 3
D4 20 26 data output; bit 4
D5 21 27 data output; bit 5
D6 22 28 data output; bit 6
D7 23 29 data output; bit 7
D8 24 30 data output; bit 8
D9 25 31 data output; bit 9 (MSB)
IR 26 2 in-range data output
DGND1 27 3 digital ground 1
V
CCD1
28 4 digital supply voltage 1 (+5 V)
n.c. − 1, 9, 11 and 32 not connected
1999 Jan 12 6
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
Fig.2 Pin configuration (SSOP28).
handbook, halfpage
CLK
D9
D7
D6
D8
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
1514
TDA8764TS
FCE100
IR
DGND1
V
CCD1
V
CCA
AGND
V
CCD2
DGND2
OGND
GRAY
V
CCO
DEC
V
RB
V
I
V
RT
V
RM
TC
OE
Fig.3 Pin configuration (LQFP32).
handbook, full pagewidth
TDA8764HL
FCE125
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
n.c.
IR
DGND1
V
CCD1
CLK
TC
V
CCA
AGND
D3
D4
D5
D6
D7
D8
D9
n.c.
V
CCD2
DGND2
OGND
D2
D0
GRAY
D1
V
CCO
n.c.
DEC
n.c.
V
RB
V
I
V
RT
OE
V
RM
1999 Jan 12 7
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. The supply voltages V
CCA
, V
CCD
and V
CCO
may have any value between −0.3 V and +7.0 V provided that the supply
voltage differences ∆VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CCA
analog supply voltage note 1 −0.3 +7.0 V
V
CCD
digital supply voltage note 1 −0.3 +7.0 V
V
CCO
output stages supply voltage note 1 −0.3 +7.0 V
∆V
CC
supply voltage difference
V
CCA
− V
CCD
−1.0 +1.0 V
V
CCA
− V
CCO
−1.0 +4.0 V
V
CCD
− V
CCO
−1.0 +4.0 V
V
I
input voltage referenced to AGND −0.3 +7.0 V
V
i(sw)(p-p)
AC input voltage for switching (peak-to-peak value) referenced to DGND − V
CCD
V
I
O
output current − 10 mA
T
stg
storage temperature −55 +150 °C
T
amb
operating ambient temperature −40 +85 °C
T
j
junction temperature − 150 °C
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
thermal resistance from junction to ambient in free air
SSOP28 110 K/W
LQFP32 90 K/W
1999 Jan 12 8
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
CHARACTERISTICS
The characteristics given refer to the SSOP28 package. V
CCA=V3
to V4= 4.75 to 5.25 V;
V
CCD=V11
to V12and V28to V27= 4.75 to 5.25 V; V
CCO=V13
to V14= 2.7 to 3.6 V; AGND and DGND shorted
together; T
amb
= 0 to 70 °C; typical values measured at V
CCA=VCCD
= 5 V and V
CCO
= 3.3 V; CL= 10 pF and
T
amb
=25°C; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies
V
CCA
analog supply voltage 4.75 5.0 5.25 V
V
CCD1
digital supply voltage 1 4.75 5.0 5.25 V
V
CCD2
digital supply voltage 2 4.75 5.0 5.25 V
V
CCO
output stages supply voltage 2.7 3.3 3.6 V
∆V
CC
supply voltage difference
V
CCA
− V
CCD
−0.20 − +0.20 V
V
CCA
− V
CCO
−0.20 − +2.55 V
V
CCD
− V
CCO
−0.20 − +2.55 V
I
CCA
analog supply current
TDA8764TS/4; TDA8764HL/4 − 25 tbf mA
TDA8764TS/8; TDA8764HL/8 − 45 tbf mA
I
CCD
digital supply current
TDA8764TS/4; TDA8764HL/4 − 25 tbf mA
TDA8764TS/8; TDA8764HL/8 − 30 tbf mA
I
CCO
output stages supply current
TDA8764TS/4; TDA8764HL/4 f
clk
= 40 MHz; ramp input − 0 tbf mA
TDA8764TS/8; TDA8764HL/8 f
clk
= 80 MHz; ramp input − 0 tbf mA
Inputs
C
LOCK INPUT; CLK (REFERENCED TO DGND); note 1
V
IL
LOW-level input voltage 0 − 0.8 V
V
IH
HIGH-level input voltage 2 − V
CCD
V
I
IL
LOW-level input current V
CLK
= 0.8 V −10+1µA
I
IH
HIGH-level input current V
CLK
=2V − 210µA
C
i
input capacitance − 2 − pF
INPUTS OE, TC AND GRAY(REFERENCED TO DGND); see Tables 3 and 4
V
IL
LOW-level input voltage 0 − 0.8 V
V
IH
HIGH-level input voltage 2 − V
CCD
V
I
IL
LOW-level input current VIL= 0.8 V −1 −−µA
I
IH
HIGH-level input current VIH=2V −−1µA
1999 Jan 12 9
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8764
VI(ANALOG INPUT VOLTAGE REFERENCED TO AGND)
I
IL
LOW-level input current
TDA8764TS/4; TDA8764HL/4 V
I=VRB
− 0 −µA
TDA8764TS/8; TDA8764HL/8 V
I=VRB
− 0 −µA
I
IH
HIGH-level input current
TDA8764TS/4; TDA8764HL/4 V
I=VRT
− 45 −µA
TDA8764TS/8; TDA8764HL/8 V
I=VRT
− 85 −µA
Y
i
input admittance
TDA8764TS/4; TDA8764HL/4
fi= 5 MHz; note 2
input resistance − 70 − kΩ
input capacitance 3 5 7 pF
input admittance
TDA8764TS/8; TDA8764HL/8
f
i
= 5 MHz; note 2
input resistance − 45 − kΩ
input capacitance 3 5 7 pF
Reference voltages for the resistor ladder using the internal voltage regulator; see Table 1
V
RB
reference voltage BOTTOM tbf 1.3 tbf V
V
RT
reference voltage TOP tbf 3.7 tbf V
V
diff(ref)
differential reference voltage
VRT− V
RB
tbf 2.4 tbf V
TC
Vdiff
temperature coefficient of
differential reference voltage
− tbf − mV/K
V
offset(B)
offset voltage BOTTOM note 3 − 161 − mV
V
offset(T)
offset voltage TOP note 3 − 161 − mV
V
I(p-p)
analog input voltage
(peak-to-peak value)
note 4 tbf 2.08 tbf V
Outputs
D
IGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND)
V
OL
LOW-level output voltage
TDA8764TS/4; TDA8764HL/4 I
OL
= 1 mA 0 − 0.5 V
TDA8764TS/8; TDA8764HL/8 I
OL
= 2 mA 0 − 0.5 V
V
OH
HIGH-level output voltage
TDA8764TS/4; TDA8764HL/4 I
OH
= −1mA V
CCO
− 0.5 − V
CCO
V
TDA8764TS/8; TDA8764HL/8 I
OH
= −2mA V
CCO
− 0.5 − V
CCO
V
I
OZ
output current in 3-state mode 0.5 V < Vo<V
CCO
−20 − +20 µA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
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