Philips TDA8763M-3-C4, TDA8763M-3-C3, TDA8763M-3-C1, TDA8763M-5-C4, TDA8763M-5-C3 Datasheet
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DATA SH EET
Product specification
Supersedes data of 1997 Feb 10
File under Integrated Circuits, IC02
1999 Jan 06
INTEGRATED CIRCUITS
TDA8763
10-bit high-speed low-power ADC
with internal reference regulator
1999 Jan 06 2
Philips Semiconductors Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
FEATURES
• 10-bit resolution
• Sampling rate up to 50 MHz
• DC sampling allowed
• One clock cycle conversion only
• High signal-to-noise ratio over a large analog input
frequency range (9.3 effective bits at 4.43 MHz
full-scale input at f
clk
= 40 MHz)
• No missing codes guaranteed
• In-Range (IR) CMOS output
• Levels TTL and CMOS compatible digital inputs
• 3 to 5 V CMOS digital outputs
• Low-level AC clock input signal allowed
• Internal reference voltage regulator
• Power dissipation only 235 mW (typical)
• Low analog input capacitance, no buffer amplifier
required
• No sample-and-hold circuit required.
APPLICATIONS
High-speed analog-to-digital conversion for:
• Video data digitizing
• Radar pulse analysis
• Transient signal analysis
• High energy physics research
•Σ∆ modulators
• Medical imaging.
GENERAL DESCRIPTION
The TDA8763 is a 10-bit high-speed low-power
Analog-to-Digital Converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary-coded digital words at a maximum
sampling rate of 50 MHz. All digital inputs and outputs are
TTL and CMOS compatible, although a low-level sine
wave clock input signal is allowed.
The device includes an internal voltage reference
regulator. If the application requires that the reference is
driven via external sources the recommendation is to use
the TDA8763A.
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
SAMPLING
FREQUENCY (MHz)
NAME DESCRIPTION VERSION
TDA8763M/3 SSOP28
plastic shrink small outline package; 28 leads;
body width 5.3 mm
SOT341-1 30
TDA8763M/4 SSOP28 SOT341-1 40
TDA8763M/5 SSOP28 SOT341-1 50
1999 Jan 06 3
Philips Semiconductors Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CCA
analog supply voltage 4.75 5.0 5.25 V
V
CCD
digital supply voltage 4.75 5.0 5.25 V
V
CCO
output stages supply voltage 3.0 3.3 5.25 V
I
CCA
analog supply current − 30 35 mA
I
CCD
digital supply current − 16 21 mA
I
CCO
output stages supply current f
clk
= 40 MHz; ramp input − 12mA
INL integral non-linearity f
clk
= 40 MHz; ramp input −±0.8 ±2.0 LSB
DNL differential non-linearity f
clk
= 40 MHz; ramp input −±0.5 ±0.9 LSB
f
clk(max)
maximum clock frequency
TDA8763M/3 30 −−MHz
TDA8763M/4 40 −−MHz
TDA8763M/5 50 −−MHz
P
tot
total power dissipation f
clk
= 40 MHz; ramp input − 235 305 mW
1999 Jan 06 4
Philips Semiconductors Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
12
DGND2
6
8
R
LAD
7
9
V
RB
V
RM
V
RT
V
I
11
V
CCD2
35
26
V
CCA
21
22
23
24
20 D4
D5
D6
D7
D8
19
18
25
2
D3
D2
17 D1
16 D0
D9
IN-RANGE LATCH
CMOS
OUTPUTS
LATCHES
ANALOG -TO - DIGITAL
CONVERTER
CLOCK DRIVER
REFERENCE
VOLTAGE
REGULATOR
MBE553
CMOS OUTPUT
1
CLKDEC
10
OE
TC
TDA8763
13
V
CCO
4
AGND
analog ground digital ground digital ground
27
DGND1
14
OGND
output ground
analog
voltage input
data outputs
LSB
MSB
28
V
CCD1
IR
output
1999 Jan 06 5
Philips Semiconductors Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
PINNING
SYMBOL PIN DESCRIPTION
CLK 1 clock input
TC 2 two’s complement input (active LOW)
V
CCA
3 analog supply voltage (+5 V)
AGND 4 analog ground
DEC 5 decoupling input
V
RB
6 reference voltage BOTTOM input
V
RM
7 reference voltage MIDDLE input
V
I
8 analog input voltage
V
RT
9 reference voltage TOP input
OE 10 output enable input (CMOS level
input, active LOW)
V
CCD2
11 digital supply voltage 2 (+5 V)
DGND2 12 digital ground 2
V
CCO
13 supply voltage for output stages
(3 to 5 V)
OGND 14 output ground
n.c. 15 not connected
D0 16 data output; bit 0 (LSB)
D1 17 data output; bit 1
D2 18 data output; bit 2
D3 19 data output; bit 3
D4 20 data output; bit 4
D5 21 data output; bit 5
D6 22 data output; bit 6
D7 23 data output; bit 7
D8 24 data output; bit 8
D9 25 data output; bit 9 (MSB)
IR 26 in range data output
DGND1 27 digital ground 1
V
CCD1
28 digital supply voltage 1 (+5 V)
Fig.2 Pin configuration.
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
1514
CLK
TC
CCA
AGND
DEC
RB
RM
I
RT
OE
CCD2
DGND2
CCO
OGND
CCD1
DGND1
IR
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
n.c.
V
V
V
V
V
V
V
V
TDA8763
MBE552
1999 Jan 06 6
Philips Semiconductors Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. The supply voltages V
CCA
, V
CCD
and V
CCO
may have any value between −0.3 V and +7.0 V provided that the supply
voltage differences ∆VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CCA
analog supply voltage note 1 −0.3 +7.0 V
V
CCD
digital supply voltage note 1 −0.3 +7.0 V
V
CCO
output stages supply voltage note 1 −0.3 +7.0 V
∆V
CC
supply voltage difference
V
CCA
− V
CCD
−1.0 +1.0 V
V
CCA
− V
CCO
−1.0 +4.0 V
V
CCD
− V
CCO
−1.0 +4.0 V
V
I
input voltage referenced to AGND −0.3 +7.0 V
V
i(sw)(p-p)
AC input voltage for switching (peak-to-peak value) referenced to DGND − V
CCD
V
I
O
output current − 10 mA
T
stg
storage temperature −55 +150 °C
T
amb
operating ambient temperature −40 +85 °C
T
j
junction temperature − 150 °C
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
thermal resistance from junction to ambient in free air 110 K/W
1999 Jan 06 7
Philips Semiconductors Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
CHARACTERISTICS
V
CCA=V3
to V4= 4.75 to 5.25 V; V
CCD=V11
to V12and V28to V27= 4.75 to 5.25 V; V
CCO=V13
to V14= 3.0 to 5.25 V;
AGND and DGND shorted together; T
amb
=0to+70°C; typical values measured at V
CCA=VCCD
= 5 V and
V
CCO
= 3.3 V; CL= 15 pF and T
amb
=25°C; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies
V
CCA
analog supply voltage 4.75 5.0 5.25 V
V
CCD1
digital supply voltage 1 4.75 5.0 5.25 V
V
CCD2
digital supply voltage 2 4.75 5.0 5.25 V
V
CCO
output stages supply voltage 3.0 3.3 5.25 V
∆V
CC
supply voltage difference
V
CCA
− V
CCD
−0.20 − +0.20 V
V
CCA
− V
CCO
−0.20 − +2.25 V
V
CCD
− V
CCO
−0.20 − +2.25 V
I
CCA
analog supply current − 30 35 mA
I
CCD
digital supply current − 16 21 mA
I
CCO
output stages supply current f
clk
= 40 MHz; ramp input − 12 mA
Inputs
C
LOCK INPUT CLK (REFERENCED TO DGND); note 1
V
IL
LOW-level input voltage 0 − 0.8 V
V
IH
HIGH-level input voltage 2 − V
CCD
V
I
IL
LOW-level input current V
clk
= 0.8 V −10+1µA
I
IH
HIGH-level input current V
clk
=2V − 210 µA
Z
i
input impedance f
clk
= 40 MHz − 2 − kΩ
C
i
input capacitance − 2 − pF
INPUTS OE AND TC (REFERENCED TO DGND); see Table 2
V
IL
LOW-level input voltage 0 − 0.8 V
V
IH
HIGH-level input voltage 2 − V
CCD
V
I
IL
LOW-level input current VIL= 0.8 V −1 −− µA
I
IH
HIGH-level input current VIH=2V −−1µA
V
I
(ANALOG INPUT VOLTAGE REFERENCED TO AGND)
I
IL
LOW-level input current VI=VRB= 1.3 V − 0 −µA
I
IH
HIGH-level input current VI=VRT= 3.67 V − 35 −µA
Z
i
input impedance fi= 4.43 MHz − 8 − kΩ
C
i
input capacitance − 5 − pF
1999 Jan 06 8
Philips Semiconductors Product specification
10-bit high-speed low-power ADC with
internal reference regulator
TDA8763
Reference voltages for the resistor ladder using the internal voltage regulator; see Table 1
V
RB
reference voltage BOTTOM 1.1 1.3 1.5 V
V
RT
reference voltage TOP 3.4 3.6 3.8 V
V
diff
differential reference voltage
VRT− V
RB
2.25 2.3 2.35 V
I
ref
reference current − 9.39 − mA
R
lad
resistor ladder − 245 −Ω
TC
Rlad
temperature coefficient of the
resistor ladder
− 1860 − ppm
− 456 − mΩ/K
V
offset(B)
offset voltage BOTTOM note 2 − 175 − mV
V
offset(T)
offset voltage TOP note 2 − 175 − mV
V
i(p-p)
analog input voltage
(peak-to-peak value)
note 3 1.90 1.95 2.00 V
Outputs
D
IGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND)
V
OL
LOW-level output voltage IOL= 1 mA 0 − 0.5 V
V
OH
HIGH-level output voltage IOH= −1mA V
CCO
− 0.5 − V
CCO
V
I
OZ
output current in 3-state mode 0.5V<Vo<V
CCO
−20 − +20 µA
Switching characteristics
C
LOCK INPUT CLK; see Fig.4; note 1
f
clk(max)
maximum clock frequency
TDA8763M/3 30 −− MHz
TDA8763M/4 40 −− MHz
TDA8763M/5 50 −− MHz
t
CPH
clock pulse width HIGH full effective bandwidth 8.5 −− ns
t
CPL
clock pulse width LOW full effective bandwidth 5.5 −− ns
Analog signal processing
L
INEARITY
INL integral non-linearity f
clk
= 40 MHz; ramp input −±0.8 ±2.0 LSB
DNL differential non-linearity f
clk
= 40 MHz; ramp input −±0.5 ±0.9 LSB
E
offset
offset error middle code −±1−LSB
E
G
gain error (from device to device)
using internal reference voltage
note 4 −±3−%
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
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