Philips tda8761 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

TDA8761

9-bit analog-to-digital converter for
digital video

Preliminary specification
File under Integrated Circuits, IC02

Philips Semiconductors

1995 Mar 20

Philips Semiconductors Preliminary specification

9-bit analog-to-digital converter for
digital video

FEATURES

• 9-bit resolution

• Sampling rate up to 30 MHz

• DC sampling allowed

• One clock cycle conversion only

• High signal-to-noise ratio over a large analog input

frequency range (8.5 effective bits at 10 MHz full-scale
input at f

• No missing codes guaranteed

• In range (IR) 3-state TTL output

• TTL compatible digital inputs and outputs

• Low-level AC clock input signal allowed

• External reference voltage regulator

• Power dissipation only 360 mW (typical)

• Low analog input capacitance, no buffer amplifier

required

• No sample-and-hold circuit required.

= 30 MHz)

clk

TDA8761

APPLICATIONS

Analog-to-digital conversion for:

• Video data digitizing

• Digital Video Broadcasting (DVB)

• Cable TV.

GENERAL DESCRIPTION

The TDA8761 is a 9-bit analog-to-digital converter (ADC)
for professional video and digital video set box
applications. It converts the analog input signal into 9-bit
binary-coded digital words at a maximum sampling rate of
30 MHz. Its linearity performance ensures the required
conversion accuracy in case of 256QAM demodulator
concept and for all symbol frequencies. All digital inputs
and outputs are TTL compatible, although a low-level sine
wave clock input signal is allowed.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V
V
V
I

CCA

I

CCD

I

CCO

CCA
CCD
CCO

analog supply voltage 4.75 5.0 5.25 V
digital supply voltage 4.75 5.0 5.25 V
output stages supply voltage 4.4 5.0 5.25 V
analog supply current − 30 tbf mA
digital supply current − 22 tbf mA
output stages supply current − 22 tbf mA

AINL AC integral non-linearity note 1; full scale input sine wave −±0.75 tbf LSB

note 1; 50% full scale input sine wave −±0.5 tbf LSB

ADNL AC differential non-linearity note 1; full scale input sine wave −±0.5 tbf LSB

note 1; 50% full scale input sine wave −±0.3 tbf LSB

f

clk(max)

P

tot

maximum clock frequency 30 −−MHz
total power dissipation − 360 tbf mW

Note

= 11 MHz and f

1. f

i

= 30 MHz; fi= 8 MHz and f

clk

= 20 MHz.

clk

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA8761M SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1

1995 Mar 20 2

Philips Semiconductors Preliminary specification

9-bit analog-to-digital converter for
digital video

BLOCK DIAGRAM

handbook, full pagewidth

analog

voltage input

V

RT

V

V

RM

V

CCA

3

CLOCK DRIVER

9

I

8

7

ANALOG -TO - DIGITAL

CONVERTER

CLK

1

V

CCD

11

TDA8761

TTL OUTPUTSLATCHES

CE
10

2

25

D8

D7

24

D6

23

D5

22

D4

21
20 D3

19

D2

18

D1

17 D0

TDA8761

TC

MSB

data outputs

LSB

V

6

RB

4
AGND1

analog grounds digital ground

5
AGND2

12
DGND

IN RANGE LATCH

Fig.1 Block diagram.

TTL OUTPUT

14
OGND1

output grounds

27
OGND2

13

28
26

MGC355

V

CCO1

V

CCO2

IR
output

1995 Mar 20 3

Philips Semiconductors Preliminary specification

9-bit analog-to-digital converter for
digital video

PINNING

SYMBOL PIN DESCRIPTION

CLK 1 clock input
TC 2 two’s complement input (active LOW)
V

CCA

AGND1 4 analog ground 1
AGND2 5 analog ground 2
V

RB

V

RM

V

I

V

RT

CE 10 chip enable input (TTL level input,

V

CCD

DGND 12 digital ground
V

CCO1

OGND1 14 output ground 1
n.c. 15 not connected
n.c. 16 not connected
D0 17 data output; bit 0 (LSB)
D1 18 data output; bit 1
D2 19 data output; bit 2
D3 20 data output; bit 3
D4 21 data output; bit 4
D5 22 data output; bit 5
D6 23 data output; bit 6
D7 24 data output; bit 7
D8 25 data output; bit 8 (MSB)
IR 26 in range data output
OGND2 27 output ground 2
V

CCO2

3 analog supply voltage (+5 V)

6 reference voltage BOTTOM input
7 reference voltage MIDDLE
8 analog input voltage
9 reference voltage TOP input

active LOW)

11 digital supply voltage (+5 V)

13 supply voltage for output stages 1

(+5 V)

28 supply voltage for output stages 2

(+5 V)

handbook, halfpage

1

CLK

2

TC

V

3

CCA

V

RB

V

RM

V

RT
CE

V

CCD

DGND

CCO1

4
5
6
7

I

8

9
10
11
12
13

TDA8761

MGC356

V

AGND1
AGND2

V

OGND1

Fig.2 Pin configuration.

TDA8761

V

28

CCO2

27

OGND2
IR

26
25

D8

24

D7

23

D6

22

D5
D4

21
20

D3
D2

19
18

D1

17

D0

16

n.c.

1514

n.c.

1995 Mar 20 4

Philips Semiconductors Preliminary specification

9-bit analog-to-digital converter for

TDA8761

digital video

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
V
V
∆V

V
V

I

O

T
T
T

CCA
CCD
CCO

CC

I
i(p-p)

stg
amb
j

analog supply voltage note 1 −0.3 +7.0 V
digital supply voltage note 1 −0.3 +7.0 V
output stages supply voltage note 1 −0.3 +7.0 V
supply voltage differences between

V
V
V

CCA
CCO
CCA

and V

and V

and V

CCD

CCD

CCO

−1.0 +1.0 V

−1.0 +1.0 V

−1.0 +1.0 V

input voltage referenced to AGND −0.3 +7.0 V
AC input voltage for switching

referenced to DGND − V

CCD

V

(peak-to-peak value)
output current − 10 mA
storage temperature −55 +150 °C
operating ambient temperature 0 +70 °C
junction temperature − +150 °C

Note

1. The supply voltages V
between V

CCA

, V

CCD

CCA

and V

and V

CCD

is between −1 and +1 V.

CCO

may have any value between −0.3 V and +7.0 V provided the difference

CCO

, V

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 110 K/W

1995 Mar 20 5

Philips Semiconductors Preliminary specification

9-bit analog-to-digital converter for

TDA8761

digital video

CHARACTERISTICS

V

CCA=V3

V27= 4.4 to 5.25 V; AGND and DGND shorted together; T
V

CCA=VCCD=VCCO

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply

V

CCA

V

CCD

V

CCO

∆V

I

CCA

I

CCD

I

CCO

Inputs

to V4and V5= 4.75 to 5.25 V; V

=5V; V

analog supply voltage 4.75 5.0 5.25 V
digital supply voltage 4.75 5.0 5.25 V
output stages supply voltage 4.4 5.0 5.25 V

CC

supply voltage differences between

and V

V
V
V

CCA
CCA
CCD

and V
and V

CCD
CCO
CCO

analog supply current − 30 tbf mA
digital supply current − 22 tbf mA
output stages supply current − 22 tbf mA

CCD=V11

= 1.5 V; CL= 15 pF and T

i(p-p)

to V12= 4.75 to 5.25 V; V

= 0 to +70 °C; typical values measured at

amb

=25°C; unless otherwise specified.

amb

CCO=V13

and V28to V14 and

−0.25 − +0.25 V

−0.4 − +0.4 V

−0.4 − +0.4 V

LOCK INPUT CLK (REFERENCED TO DGND); note 1

C
V

IL

V

IH

I

IL

I

IH

Z

I

C

I

LOW level input voltage 0 − 0.8 V
HIGH level input voltage 2.0 − V
LOW level input current V
HIGH level input current V
input impedance f

input capacitance f
INPUT CE (REFERENCED TO DGND); see Table 2
V

IL

V

IH

I

IL

I

IH

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current VIL= 0.4 V −400 −− µA

HIGH level input current VIH= 2.7 V −−20 µA
VI(ANALOG INPUT VOLTAGE REFERENCED TO AGND)
I

IL

I

IH

Z

I

C

I

LOW level input current VI= 1.3 V − 0 −µA

HIGH level input current VI= 3.8 V − 70 −µA

input impedance fi=10MHz − 5 − kΩ

input capacitance fi=10MHz − 8 − pF

CCD

= 0.4 V −10 +1 µA

clk

= 2.7 V −−20 µA

clk

=30MHz − 2 − kΩ

clk

=30MHz − 2 − pF

clk

CCD

V

V

1995 Mar 20 6