Philips TDA8745, TDA8745H Datasheet

0 (0)

INTEGRATED CIRCUITS

DATA SHEET

TDA8745

Satellite sound receiver with

I2C-bus control

Preliminary specification

1996 Mar 11

Supersedes data of 1995 Mar 08

File under Integrated Circuits, IC02

Philips Semiconductors

Preliminary specification

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

 

 

FEATURES

·On-chip frequency synthesizer and mixer:

tuning range 4 to 9.77 MHz

reference oscillator 4 MHz (using a crystal or 4 MHz frequency source)

·IF input switches allowing selection of various IF bandwidths (wide or narrow)

·Demodulation of two audio signals by wide band Phase-Locked Loops (PLLs)

·Audio level control after PLL (modulation depth setting)

·Noise Reduction (NR) bypass for use with main audio signals

·Left, right and mono output [1¤2(l + r)] on SCART level

·External audio inputs (for decoder connection)

·Selectable de-emphasis (DEEM) 50 ms, 75 ms, J17 and flat response

·I2C-bus control of all functions

·Two selectable addresses

·Carrier presence detector with automatic mute option.

ORDERING INFORMATION

APPLICATIONS

·Satellite receivers

·TV sets

·Video recorders.

GENERAL DESCRIPTION

The TDA8745 is the successor of the TDA8740 and TDA8741. The device contains the functionality of the TDA8740 and TDA8741 together with a synthesizer, mixer and I2C-bus control.

The pin numbers mentioned in this publication refer to the SDIP42 package; unless otherwise indicated.

TYPE

 

PACKAGE

 

 

 

 

NUMBER

NAME

DESCRIPTION

VERSION

 

 

 

 

 

TDA8745

SDIP42

plastic shrink dual in-line package; 42 leads (600 mil)

SOT270-1

 

 

 

 

TDA8745H

QFP44

plastic quad flat package; 44 leads (lead length 1.3 mm);

SOT307-2

 

 

body 10 ´ 10 ´ 1.75 mm

 

 

 

 

 

1996 Mar 11

2

Philips Semiconductors

 

 

Preliminary specification

 

 

 

 

 

 

 

 

Satellite sound receiver with I2C-bus control

 

 

TDA8745

 

 

 

 

 

 

 

 

QUICK REFERENCE DATA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

 

MAX.

UNIT

 

 

 

 

 

 

 

 

VP1

synthesizer and mixer supply voltage

 

4.5

5.0

 

5.5

V

V

I2C-bus supply voltage

 

4.5

5.0

 

5.5

V

P2

 

 

 

 

 

 

 

VP3

general supply voltage

 

8.0

12.0

 

13.2

V

IP1

synthesizer and mixer supply current

 

37

 

48

mA

I

I2C-bus supply current

 

0.6

 

mA

P2

 

 

 

 

 

 

 

IP3

general supply current

 

35

 

46

mA

S/N(A)

signal-to-noise ratio secondary channel

A-weighted;

68

77

 

dB

 

 

NR = on; DEEM = 75 μs

 

 

 

 

 

 

 

 

 

 

 

 

 

Vi(rms)

input sensitivity (RMS value) baseband input

S/N(A) = 40 dB;

0.5

 

1.5

mV

 

to mixer

NR = on; DEEM = 75 μs

 

 

 

 

 

 

 

 

 

 

 

 

 

Vi(rms)

baseband input voltage (RMS value)

THD 0.5%

 

 

 

200

mV

Vo

output voltage

 

8

6

 

4

dBV

Ptot

total power dissipation

 

610

 

800

mW

Tstg

storage temperature

 

65

 

+150

°C

Tamb

operating ambient temperature

 

20

 

+70

°C

1996 Mar 11

3

Philips TDA8745, TDA8745H Datasheet

11Mar1996

 

 

 

 

 

 

I 2 C

 

 

 

PDL

 

 

 

 

 

12 V

 

 

 

 

 

 

 

 

LOUTDEEM

 

 

 

 

DIAGRAMBLOCK

soundSatellite

SemiconductorsPhilips

 

 

 

 

5 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100 μH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4.7 Ω

 

 

 

 

5 V

 

 

 

 

 

 

 

 

PRES DET L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100 μF

 

22

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

1000 μF

 

 

 

22

 

 

 

 

 

 

nF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

nF

 

 

 

 

 

nF

2.2

 

 

 

 

 

 

470

1

10

10

1

 

 

4.7

10

 

220 nF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

μF

 

 

 

 

 

 

kΩ

μF

μF

μF

μF

 

 

nF

nF

 

 

 

 

 

 

 

 

 

 

SYNGND

VP1

ADDsel

SDA

SCL

I 2 CGND

VP2

 

 

 

Vref

HFGND

AFGND

VP3

 

CDC L

RECTL

CATT/REC L

 

CNR D L

CD L

 

 

CCL L

EXT L

 

 

 

 

 

 

 

6

4

12

18

17

14

16

 

 

 

19

10

 

32

20

41

42

37

38

 

36

35

 

34

33

25

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vref

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

receiver

 

 

 

10

 

 

4 MHz

 

 

 

 

 

 

 

 

LIMITER

 

 

 

LPF

REDUCTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INTERFACE

 

PDR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PDL

 

PRESENCE

 

 

 

 

 

 

 

 

 

 

OML

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DETECTOR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

XTAL

40

CRYSTAL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DE-EMPHASIS

 

 

 

 

23

O L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HF

PLL

 

 

AUDIO

NOISE

 

 

 

 

 

 

 

 

 

 

 

 

OSCILLATOR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

flat

50 μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

pF

 

 

 

TUN9 to TUN0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J17

75 μs

 

 

 

 

 

 

with

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CHARGE

ϕ

 

 

 

 

IL2 to IL0

 

 

BB

LEV3 to LEV0

 

 

NR

DEM1 and DEM0

 

 

 

OS1 and OS0

 

OM

 

 

 

 

 

 

N

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

200

 

 

 

 

 

 

 

 

 

 

 

 

 

12 to

3dB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OML

 

TDA8745

 

 

 

 

 

 

 

 

21

 

 

 

 

 

 

 

PUMP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OMR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SLF

2

 

 

 

frequency

 

 

 

 

 

 

 

 

 

 

12 to

3dB

 

 

 

 

 

 

 

 

 

 

 

 

C

 

 

 

 

VCO

synthesizer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6.8

33

 

 

 

 

30 to 40 MHz

 

 

 

 

 

 

 

 

HF

 

 

 

AUDIO

NOISE

 

 

DE-EMPHASIS

 

 

 

 

 

 

-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PLL

 

DC

 

 

flat

50 μs

 

 

 

 

22

 

bus

 

 

1 μF

nF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

kΩ

 

 

 

 

 

 

 

 

 

 

 

 

LIMITER

 

 

LPF

REDUCTION

 

 

 

 

 

 

OR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J17

75 μs

 

 

 

 

 

 

 

 

 

 

 

 

BPFN

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

15 pF (1)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

control

 

 

 

 

 

 

 

 

 

 

 

 

IR2 to IR0

 

IR2

 

PRESENCE

 

 

 

 

 

 

 

 

 

 

OMR

 

 

 

 

27 pF

27 pF

3

PRE-BPF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DETECTOR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BASEBAND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IL2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

47 μH

1 kΩ

 

 

 

MIXER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

27 pF

 

 

 

 

 

5

 

 

9

11

13

15

7

8

 

 

39

1

27

26

 

28

29

 

30

31

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IF OUT

10.7

(2)

IN-1

IN-2

IN-3

IN-4

IN-5

IN-6

 

470

1

CDC R

RECTR

CATT/REC R

C NR D R

CD R

OUT R

 

CCL L

EXTR

MBE037

 

 

 

 

 

 

 

 

 

 

10 nF

 

 

10

10

1

 

 

4.7

10

220 nF

 

 

 

 

 

 

 

 

 

 

 

 

 

330 Ω

NARROW

 

 

 

 

 

 

 

kΩ

μF

μF

μF

μF

 

 

nF

nF

DEEM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

330 Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10.52 (2)

PRES DET R

 

 

330 Ω

NARROW

330

 

 

 

 

 

Ω

 

10.7

(2)

 

330 Ω

WIDE

 

330

 

 

 

 

 

 

 

 

Ω

When driving more than three filters in parallel, pin 5 should be buffered.

TDA8745

specificationPreliminary

 

 

(1)

Add 15 pF for NTSC.

 

 

(2)

Ceramic filters:

 

 

 

SFE10.7MJA10-A (narrow)

 

 

 

SFE10.52MJA10-A (narrow)

 

 

 

SFE10.7MS2-A (wide).

 

 

 

Fig.1 Block diagram (SDIP42).

 

 

Philips Semiconductors

 

Preliminary specification

 

 

 

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

 

 

 

 

PINNING

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PIN

 

DESCRIPTION

 

 

 

 

 

SDIP42

 

QFP44

 

 

 

 

 

 

 

 

 

 

 

CDC R

1

 

39

DC decoupling capacitor (right channel)

 

SLF

2

 

41

synthesizer loop-filter

 

 

 

 

 

 

 

BASEBAND IN

3

 

42

baseband input to mixer

 

 

 

 

 

 

 

VP1

4

 

43

synthesizer and mixer supply voltage (+5 V)

 

IF OUT

5

 

44

intercarrier output from mixer

 

 

 

 

 

 

 

SYNGND

6

 

1

synthesizer and mixer ground

 

 

 

 

 

 

 

IN-5

7

 

2

intercarrier input 5/port expansion output 1

 

 

 

 

 

 

 

IN-6

8

 

3

intercarrier input 6/port expansion output 2

 

 

 

 

 

 

 

IN-1

9

 

4

Intercarrier input 1

 

 

 

 

 

 

 

HFGND

10

 

5

HF ground

 

 

 

 

 

 

 

IN-2

11

 

6

intercarrier input 2

 

 

 

 

 

 

 

ADD

12

 

7

I2C-bus address selection

 

sel

 

 

 

 

 

IN-3

13

 

8

Intercarrier input 3

 

 

 

 

 

 

 

I2CGND

14

 

9

I2C-bus ground

 

IN-4

15

 

10

intercarrier input 4

 

 

 

 

 

 

 

V

16

 

11

I2C-bus supply voltage (+5 V)

 

P2

 

 

 

 

 

SCL

17

 

12

I2C-bus serial clock input

 

SDA

18

 

13

I2C-bus serial data input/output

 

Vref

19

 

14

decoupling capacitor for reference voltage

 

VP3

20

 

15

general supply voltage (+12 V)

 

OM

21

 

17

mono channel output [1¤2(l + r)]

 

OR

22

 

18

right channel output

 

OL

23

 

19

left channel output

 

EXTR

24

 

20

external audio input (right channel)

 

EXTL

25

 

21

external audio input (left channel)

 

CATT/REC R

26

 

22

attack/recovery capacitor (right channel)

 

RECTR

27

 

23

rectifier DC decoupling (right channel)

 

CNR D R

28

 

24

noise reduction de-emphasis capacitor (right channel)

 

CD R

29

 

25

de-emphasis capacitor (right channel)

 

DEEM OUT R

30

 

26

de-emphasis output (right channel)

 

 

 

 

 

 

 

CCL R

31

 

27

audio pass-through input (right channel)

 

AFGND

32

 

28

AF ground

 

 

 

 

 

 

 

CCL L

33

 

29

audio pass-through input (left channel)

 

DEEM OUT L

34

 

30

de-emphasis output (left channel)

 

 

 

 

 

 

 

CD L

35

 

31

de-emphasis capacitor (left channel)

 

CNR D L

36

 

32

noise reduction de-emphasis capacitor (left channel)

 

RECTL

37

 

33

rectifier DC decoupling (left channel)

 

CATT/REC L

38

 

34

attack/recovery capacitor (left channel)

 

1996 Mar 11

5

Philips Semiconductors

 

 

 

 

 

 

 

 

Preliminary specification

 

 

 

 

 

 

 

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PIN

 

 

 

 

 

 

DESCRIPTION

 

 

 

 

 

 

 

 

 

SDIP42

 

QFP44

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PRES DET R

39

 

35

 

presence detector timing (right channel)

 

 

 

 

 

 

 

 

 

 

XTAL

40

 

36

 

crystal input for 4 MHz oscillator

 

 

 

 

 

 

 

 

 

 

PRES DET L

41

 

37

 

presence detector timing (left channel)

 

 

 

 

 

 

 

 

 

 

CDC L

42

 

38

 

DC decoupling capacitor (left channel)

n.c.

 

16

 

not connected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

n.c.

 

40

 

not connected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

handbook, halfpage

 

 

 

 

CDC L

 

 

 

 

 

 

 

 

 

 

CDC R

1

 

42

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SLF

2

 

41

 

PRES DET L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BASEBAND IN

3

 

40

 

XTAL

 

 

 

 

 

V P1

 

 

 

 

 

 

 

 

 

 

4

 

39

 

PRES DET R

 

 

 

 

 

 

 

 

 

 

CATT/REC L

 

 

 

 

IF OUT

5

 

38

 

 

 

 

 

 

 

 

 

 

 

RECT L

 

 

 

 

SYNGND

6

 

37

 

 

 

 

 

 

 

 

 

 

 

C NR D L

 

 

 

 

 

IN-5

7

 

36

 

 

 

 

 

 

 

 

 

 

 

C D L

 

 

 

 

 

IN-6

8

 

35

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IN-1

9

 

34

 

DEEM OUT L

 

 

 

 

 

 

 

 

 

 

C CL L

 

 

 

 

HFGND

10

 

33

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IN-2

11

TDA8745

32

 

AFGND

 

 

 

 

ADD sel

 

 

 

 

C CL R

 

 

 

 

12

 

31

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IN-3

13

 

30

 

DEEM OUT R

 

 

 

 

I 2 CGND

 

 

 

 

C D R

 

 

 

 

14

 

29

 

 

 

 

 

 

 

 

 

 

 

C NR D R

 

 

 

 

 

IN-4

15

 

28

 

 

 

 

 

 

V P2

 

 

 

 

RECTR

 

 

 

 

 

16

 

27

 

 

 

 

 

 

 

 

 

 

 

CATT/REC R

 

 

 

 

 

SCL

17

 

26

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SDA

18

 

25

 

EXT L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vref

19

 

24

 

EXT R

 

 

 

 

 

V P3

 

 

 

 

 

 

 

 

 

 

20

 

23

 

O L

 

 

 

 

 

OM

 

 

 

 

 

 

 

 

 

 

21

 

22

 

O R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MBE035

 

 

 

Fig.2 Pin configuration (SDIP42).

1996 Mar 11

6

Philips Semiconductors

Preliminary specification

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

handbook, full pagewidth

 

OUTIF

V

BASEBANDIN

SLF

n.c.

C

C

PRESDET L

XTAL

PRESDET R

C

 

 

 

P1

 

 

 

DCR

DC L

 

 

 

ATT/RECL

 

 

44

43

42

41

40

39

38

37

36

35

34

 

SYNGND

1

 

 

 

 

 

 

 

 

 

33

RECTL

IN-5

2

 

 

 

 

 

 

 

 

 

32

CNR D L

IN-6

3

 

 

 

 

 

 

 

 

 

31

CD L

IN-1

4

 

 

 

 

 

 

 

 

 

30

DEEM OUT L

HFGND

5

 

 

 

 

 

 

 

 

 

29

CCL L

IN-2

6

 

 

 

TDA8745H

 

 

 

28

AFGND

ADDsel

7

 

 

 

 

 

 

 

 

 

27

CCL R

IN-3

8

 

 

 

 

 

 

 

 

 

26

DEEM OUT R

I2 CGND

9

 

 

 

 

 

 

 

 

 

25

C D R

IN-4

10

 

 

 

 

 

 

 

 

 

24

C NR D R

VP2

11

 

 

 

 

 

 

 

 

 

23

RECTR

 

12

13

14

15

16

17

18

19

20

21

22

MBE034

 

SCL

SDA

V

V

n.c.

O

O

O

EXT

EXT

RATT/REC

 

 

 

 

 

ref

P3

 

M

R

L

R

L

 

 

 

 

 

 

 

 

 

 

 

 

 

C

 

Fig.3 Pin configuration (QFP44).

1996 Mar 11

7

Philips Semiconductors

Preliminary specification

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

FUNCTIONAL DESCRIPTION

Satellite sound

The baseband signal coming from a satellite tuner comprises the demodulated video signal plus a number of sound carriers in the event of reception of a PAL, NTSC or SECAM satellite signal.

Nearest to the video signal is the main sound carrier which carries the mono sound related to the video. This is an FM modulated carrier with a fixed pre-emphasis. The carrier frequency can be in the range of 5.8 to 6.8 MHz.

Additionally, a number of optional secondary sound carriers may be present. These can be used for stereo or multi-language sound related to the video signal, or for unrelated radio sound. These carriers are also FM modulated, and for better sound quality (improved signal-to-noise performance) broadcast satellites

(e.g. ‘ASTRA’) use a noise reduction system (adaptive pre-emphasis circuit, combined with a fixed pre-emphasis). These secondary carrier frequencies can be in the range of 6.30 to 8.28 MHz.

For accurate tuning to the many sound carriers, an internal frequency synthesizer and mixer are used to transfer the sound carriers to intermediate frequencies of

10.7 and 10.52 MHz.

The TDA8745 contains all circuitry for the processing of the main channel and secondary channels, from baseband signal to line (SCART) output drivers. By means of external band-pass filters the desired frequencies coming from the synthesizer/mixer are routed to the IF limiter/demodulator inputs.

Band-pass filter and mixer

Before the incoming baseband signal is applied to the mixer, the signal is filtered. Related to the sound carriers, the level of the video part of the baseband signal can be much higher, so to avoid overload it is desirable to attenuate the latter, this is also to avoid interference (additional unwanted mix of signals after mixing).

The internal band-pass filter (pass band from approximately 4 to 10 MHz) is completed by a simple external notch filter. The external filter provides substantial attenuation of the video colour carrier. The notch filter is chosen to be external because the required notch frequency is TV standard dependent and also because an accurate on-chip notch filter requires a tuning mechanism (consuming additional chip area).

The mixer is a double-balanced mixer with degeneration, this to accommodate the level of the filter output signal.

The mixer transfers the different sound carrier frequencies to fixed intermediate frequencies of 10.7 and 10.52 MHz. These frequencies are fed via an internal buffer stage to external ceramic band-pass filters before they are routed to the two demodulator inputs. The buffer stage can drive up to three external ceramic band-pass filters (assuming 330 Ω filter terminations) but this can be increased to four or more by adding an external buffer.

Synthesizer

The synthesizer consists of the following parts:

Reference oscillator

Reference divider

A 10-bit programmable divider

Phase detector

Charge pump

Voltage Controlled Oscillator (VCO)

Divide-by-two circuit.

The reference frequency circuit consists of a 4 MHz crystal oscillator and a divider (by 200). The resulting reference frequency of 20 kHz is fed to the phase detector.

The programmable divider consists of a series of cells (divide by 2 or 3) connected as a ripple counter.

The minimum division ratio is 2n and the maximum division ratio is 2n + 1 1.

The programmable divider output signal is also fed to the phase detector. The charge pump provides output current pulses in accordance with the signals from the phase detector. The final tuning voltage for the VCO is provided by the loop filter and a buffer amplifier.

The oscillator frequency range is from

29.04 to 40.94 MHz, depending on the setting of the programmable divider (by the TUN signal). The tuning voltage is clipped to limit the VCO frequency range.

The frequency of the oscillator is divided-by-two before it is applied to the mixer (to obtain the desired 10 kHz resolution).

Left and right channel inputs

A maximum of six inputs are available (pins 9, 11, 13, 15, 7 and 8). External ceramic band-pass filters, which are tuned to the desired intermediate frequencies, route the signals to the inputs.

For stereo purposes the TDA8745 contains two identical secondary sound processing channels (secondary channel 1 will also be referred to as ‘left’ or ‘language 1’ and secondary channel 2 as ‘right’ or ‘language 2’).

1996 Mar 11

8

Philips Semiconductors

Preliminary specification

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

With the input selection every input pin of the left and/or right channel can be independently selected. Input selection for the left channel is controlled by the IL signal and for the right channel by the IR signal.

From the inputs, the signals are coupled to the limiter/amplifier and to the PLL demodulator of each channel. The output signal from the PLL is routed to both the presence detector and audio level control.

The inputs of pins 7 and 8 can be changed into digital outputs for external switching purposes, set by the so called Port Extension bit (PE). Not used inputs should be connected to ground. Note that the inputs of pins 7 and 8 are also floating when not in Port Extension mode.

Presence detector

The presence detector is used to determine if a carrier is present on the channel of interest. It does so by measuring the amount of high frequency noise (>20 kHz) in the audio signal, which is directly related to the C/N (carrier-to-noise ratio) at the IF input. If a carrier is present, these high frequencies are fairly moderate, if no carrier is present, strong noise components are present.

The audio signal, first high-pass filtered and then rectified, is filtered by the components at pins 41 and 39

(PRES DET L and PRES DET R). The DC level at this pin is then compared with an internal reference voltage. If the level at pins 41 and 39 exceeds this voltage level, the presence detector output goes HIGH (no carrier).

This output signal can be used to drive the output mute (if bit PDM = 1; see Section “Output selection”) and can be monitored by reading bits PDL and PDR. The detection level can be modified by changing the leakage resistor at pins 41 and 39, a higher resistor value gives a ‘no carrier’ response ant C/N levels detected as ‘carrier present’ with a lower resistor value.

Audio level control

Each demodulator output signal is amplified in a buffer amplifier and DC decoupled by means of electrolytic capacitors connected to pin 42 (left) and pin 1 (right).

The output level of all channels is -6 dBV typical at a frequency deviation of the FM signal of 54% of the maximum deviation (i.e 0.54 ´ 85 kHz = 46 kHz for the main channel and 0.54 ´ 50 kHz = 27 kHz for the secondary channels) at 1 kHz modulation frequency (reference level).

To adjust for different (main channel) modulation depths used at some satellites the audio level is made adjustable, the signal can be controlled in steps of 1 dB from

-12 dB to +3 dB by the LEV signal.

Noise Reduction (NR)

To improve the quality of the secondary channels, the audio signal is processed at the transmitter side before modulation. For an overall flat audio response the inverse processing must take place after demodulation. This is achieved in the NR.

The NR can be regarded as an input level dependent Low-Pass Filter (LPF) [adaptive de-emphasis system] followed by a fixed de-emphasis. Figure 3 shows the transfer characteristics as function of the input level (normalized to input level, and without the fixed de-emphasis).

At maximum input level (50 kHz frequency deviation, referred to as 0 dB) the frequency response of the first part (i.e. without fixed de-emphasis) is nearly flat (note the small dip around 3 kHz in Fig.3; this is a system attribute). As the input level is X dB lowered, the higher output frequencies will be reduced an extra X dB with respect to the lower frequencies (1 : 2 expansion).

If a main carrier signal is received, the NR can be bypassed at which the signal is fed directly to the de-emphasis circuit. The noise reduction is active when the NR signal (via I2C-bus) is logic 1.

De-emphasis

De-emphasis is realized by means of several internal resistors and an external capacitor to ground. Via the I2C-bus, the DEM signal can be switched between 50 ms, 75 ms, J17 and no de-emphasis. Figure 4 shows these four different possibilities.

Output selection

With the output selector the output pins 23 and 22 can be switched to the left and right satellite channels

(pins 33 and 31) or to the external inputs (pins 25 and 24) for an other signal source or for connection of a decoder box. the OS1 and OS0 bits determine this selection.

Pin 21 is a separate output which delivers the mono channel. The mono signal is the sum of pin 23 (left) and pin 22 (right) output signal [1¤2(l + r)].

1996 Mar 11

9

Philips Semiconductors

Preliminary specification

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

Output pins 23 and 22 can be muted by setting the OML and OMR signals to logic 1. In addition, automatic muting is also possible, the presence detector (as

described in Section “Presence detector”) sets the PDL bit (PDR for other channel). Absence of a carrier at the selected frequency results in automatic muting. This mechanism is enabled or inhibited by the PDM bit (Presence Detector auto Mute).

All outputs (pins 21, 22 and 23) are line drivers with SCART level capability and are short-circuit protected by means of 125 Ω output resistors. Pins 34 and 30 are also line drivers at SCART level and can be used as signal outputs before the IC’s output selection (i.e. for decoder box use).

ABBREVIATIONS

BPF = Band-Pass Filter.

fmod = modulating frequency.

fM = frequency deviation of the main Channel.

fS1 = frequency deviation of secondary Channel 1 (left).

fS2 = frequency deviation of secondary Channel 2 (right).

fOM = carrier frequency of main Channel.

fOS1 = carrier frequency of secondary Channel 1. fOS2 = carrier frequency of secondary Channel 2. IF = Intermediate Frequency.

IL = Input Left.

IR = Input Right.

LPF = Low-Pass Filter.

NR = Noise Reduction.

OML = Output Mute Left.

OMR = Output Mute Right.

OS = Output Select.

PDM = Presence Detector auto Mute. PE = Port Extension.

PLL = Phase-Locked Loop.

POR = Power-On Reset.

S/N = Signal-to-Noise ratio.

VCO = Voltage Controlled Oscillator.

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MBE284

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MBE285

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

handbook, halfpage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0 dB

 

 

 

 

 

 

 

handbook, halfpage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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(dB)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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20 dB

 

 

 

 

 

 

 

 

 

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

75 μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

102

103

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

105

 

 

 

 

 

 

 

102

103

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

105

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

10

f

(Hz)

10

 

 

 

10

 

(Hz)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

f

 

 

 

 

Fig.4 Noise reduction transfer as function of

 

input level.

Fig.5 LF de-emphasis curves.

1996 Mar 11

10

Philips Semiconductors

 

 

 

 

 

Preliminary specification

 

 

 

 

 

 

 

 

 

 

 

Satellite sound receiver with I2C-bus control

 

 

TDA8745

 

 

 

 

 

 

 

 

 

 

 

 

I2C-BUS PROTOCOL

 

 

 

 

 

 

 

 

 

 

Table 1 Slave receiver/transmitter address: D4 or D6 (HEX)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BIT 7

BIT 6

BIT 5

BIT 4

 

BIT 3

BIT 2

BIT 1

 

BIT 0

 

 

 

 

 

 

 

 

 

 

 

1

1

0

1

 

0

1

AS(1)

 

 

 

(2)

 

 

R/W

Notes

1.AS bit defined by level at address select (pin 12); 0 V = logic 0; 5 V = logic 1.

2.R/W = 0; TDA8745 is receiver (microcontroller is master transmitter). R/W = 1; TDA8745 is transmitter (microcontroller is master receiver).

TDA8745 receiver use

In the receiver mode the device has four subaddresses with auto-increment, as shown in Tables 2 to 5.

Table 2 Input byte SA: 00; situation after POR

IL2

 

IL1

IL0

 

IR2

IR1

IR0

TUN9

TUN8

i7

 

i6

i5

 

i4

i3

i2

i1

i0

 

 

 

 

 

 

 

 

 

 

0

 

0

0

 

0

0

1

1

0

 

 

 

 

 

 

 

 

Table 3 Tuning byte SA: 01; situation after POR

 

 

 

 

 

 

 

 

 

 

 

 

TUN7

 

TUN6

TUN5

 

TUN4

TUN3

TUN2

TUN1

TUN0

t7

 

t6

t5

 

t4

t3

t2

t1

t0

 

 

 

 

 

 

 

 

 

 

1

 

1

1

 

0

1

1

0

0

 

 

 

 

 

 

 

 

 

Table 4 Select byte SA: 02; situation after POR

 

 

 

 

 

 

 

 

 

 

 

 

 

TEST

 

BB

OS1

 

OS0

PDM

PE

OML

OMR

s7

 

s6

s5

 

s4

s3

s2

s1

s0

 

 

 

 

 

 

 

 

 

 

0

 

0

0

 

0

0

0

1

1

 

 

 

 

 

 

 

 

 

Table 5 Audio byte SA: 03; situation after POR

 

 

 

 

 

 

 

 

 

 

 

 

 

LEV3

 

LEV2

LEV1

 

LEV0

NR

DEM1

DEM0

BPFN

a7

 

a6

a5

 

a4

a3

a2

a1

a0

 

 

 

 

 

 

 

 

 

 

1

 

1

0

 

0

1

1

1

0

 

 

 

 

 

 

 

 

 

TDA8745 transmitter use

 

 

 

 

 

 

 

No subaddress.

 

 

 

 

 

 

 

 

Table 6 Read byte

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PDL

 

PDR

 

POR

r7

 

r6

r5

 

r4

r3

r2

r1

r0

 

 

 

 

 

 

 

 

 

 

0 or 1

 

0 or 1

1

 

1

1

1

1

0 or 1

 

 

 

 

 

 

 

 

 

 

1996 Mar 11

11

Philips Semiconductors

Preliminary specification

 

 

Satellite sound receiver with I2C-bus control

TDA8745

 

 

Slave receiver mode (bits transmitted from microcontroller to TDA8745)

Different IF inputs can be selected for the PLLs, for switching between different external BPFs and/or channels; see Tables 7 and 8.

Table 7 IL2 to IL0; Input Left; note 1

IL2

IL1

IL0

PE(2)

MODE

i7

i6

i5

s2

 

 

 

 

 

 

0

0

0

0

IF input IN-1 selected for left PLL (after POR)

 

 

 

 

 

0

0

1

0

IF input IN-2 selected for left PLL

 

 

 

 

 

0

1

0

0

IF input IN-3 selected for left PLL

 

 

 

 

 

0

1

1

0

IF input IN-4 selected for left PLL

 

 

 

 

 

1

0

0

0

IF input IN-5 selected for left PLL

 

 

 

 

 

1

0

1

0

IF input IN-6 selected for left PLL

 

 

 

 

 

1

1

0

0

no selection

 

 

 

 

 

1

1

1

0

no selection

 

 

 

 

 

X

0

0

1

IF input IN-1 selected for left PLL

 

 

 

 

 

X

0

1

1

IF input IN-2 selected for left PLL

 

 

 

 

 

X

1

0

1

IF input IN-3 selected for left PLL

 

 

 

 

 

X

1

1

1

IF input IN-4 selected for left PLL

 

 

 

 

 

0

X

X

1

IF input IN-5 used as output; 0 = 0 V

 

 

 

 

 

1

X

X

1

IF input IN-5 used as output; 1 = 5 V

 

 

 

 

 

Notes

1.X = don’t care.

2.Bit PE (s2) can be set to logic 1 to change IF input 5 into digital output for external switching purposes.

1996 Mar 11

12

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