Philips tda8741, tda8741h DATASHEETS

INTEGRATED CIRCUITS

TDA8741; TDA8741H

Satellite sound circuit with noise reduction

Product specification	October 1994
Supersedes data of November 1992
File under Integrated Circuits, IC02

Philips Semiconductors

Philips Semiconductors	Product specification
Satellite sound circuit with noise reduction	TDA8741; TDA8741H

FEATURES

∙Demodulation of main audio signal using wide band PLL (lock range selectable)

∙Demodulation of secondary audio signals using wide band PLL

∙Noise reduction of the secondary audio signals

∙Output selection: stereo, language 1, language 2, main audio and external

∙Mute control

∙Line outputs (SCART level).

QUICK REFERENCE DATA

APPLICATIONS

∙Satellite receivers

∙TV sets

∙Video recorders.

GENERAL DESCRIPTION

The TDA8741; TDA8741H is a multi-function sound IC for use in satellite receivers, television sets and video recorders. The pin numbers given in parenthesis throughout this document refer to the QFP44 package.

SYMBOL		PARAMETER		CONDITIONS	MIN.	TYP.	MAX.	UNIT
Supply
VP	supply voltage				8	12	13.2	V
Main channel
VIN3(rms)	input sensitivity pin 18 (14) (RMS value)			S/N(A) = 40 dB	−	1.0	2.0	mV
fOM	lock range PLL demodulator
	either				5.5	−	7.5	MHz
	or				10.0	−	11.5	MHz
VOM	output voltage pin 23 (19)				−9	−6	−4	dBV
S/N(A)	signal-to-noise ratio			A-weighted	62	70	−	dB
Secondary channels
VIN1,IN2(rms)	input sensitivity pins 8 and 16 (3 and 11) (RMS value)			S/N(A) = 40 dB	−	0.8	1.5	mV
fOS1,2	lock range PLL demodulators				10.0	−	11.5	MHz
VOR,OL	output voltage pins 24 and 25 (20 and 21)				−8	−6	−4	dBV
S/N(A)	signal-to-noise ratio			A-weighted	72	80	−	dB
Crosstalk
αS/M	crosstalk from secondary to main channel				−	74	−	dB
αM/S	crosstalk from main to secondary channel				−	74	−	dB
αS/S	crosstalk between secondary channels				−	74	−	dB
ORDERING INFORMATION
TYPE			PACKAGE
NUMBER	NAME		DESCRIPTION				VERSION
TDA8741	SDIP42	plastic shrink dual in-line package; 42 leads (600 mil)					SOT270-1
TDA8741H	QFP44(1)	plastic quad flat package; 44 leads (lead length 1.3 mm);					SOT307-2
		body 10 × 10 × 1.75 mm
Note

1.When using IR reflow soldering it is recommended that the Drypack instructions in the “Quality Reference Handbook” (order number 9398 510 63011) are followed.

October 1994

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Philips Semiconductors

Product specification

Satellite sound circuit with noise reduction

TDA8741; TDA8741H

BLOCK DIAGRAM

The pin numbers in parenthesis refer to the QFP44 package.

Fig.1 Block diagram.

October 1994

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	Philips Semiconductors						Product specification
	Satellite sound circuit with noise reduction						TDA8741; TDA8741H
	PINNING
	SYMBOL			PIN	PIN	DESCRIPTION
				SDIP42	QFP44
	n.c.			1	1	not connected
	n.c.			2	5	not connected
	n.c.			3	7	not connected
	n.c.			4	9	not connected
	n.c.			5	12	not connected
	n.c.			6	39	not connected
	MCS			7	2	main channel PLL lock-in range select/disable
	IN-1			8	3	intercarrier input for secondary Channel 1 (left)
	HFGND			9	4	ground for HF section
	n.c.			10	40	not connected
	SCD			11	6	secondary channels PLLs disable
	n.c.			12	41	not connected
	MUTE			13	8	mute switch
	n.c.			14	42	not connected
	Osel L			15	10	output select switch bit 1 (left)
	IN-2			16	11	intercarrier input for secondary Channel 2 (right)
	Osel R			17	13	output select switch bit 2 (right)
	IN-3			18	14	intercarrier input for main channel
	VREF			19	15	decoupling capacitor for reference voltage
	CD M			20	16	de-emphasis capacitor for main channel
	CC M			21	17	audio pass-through capacitor input for main channel
	VP			22	18	positive supply voltage
	OM			23	19	main channel output
	OR			24	20	right channel output
	OL			25	21	left channel output
				26	22	output switch bit 3 (external/internal)
	EXT/INT
	EXTR			27	23	external audio input (right)
	EXTL			28	24	external audio input (left)
	CATT/REC R			29	25	attack/recovery capacitor (right)
	RECTR			30	26	rectifier DC decoupling (right)
	CNR D R			31	27	noise reduction de-emphasis capacitor (right)
	CD R			32	28	fixed de-emphasis capacitor (right)
	CC R			33	29	audio pass-through capacitor input for right channel
	AFGND			34	30	ground for AF section
	CC L			35	31	audio pass-through capacitor input for left channel
	CD L			36	32	fixed de-emphasis capacitor (left)
	CNR D L			37	33	noise reduction de-emphasis capacitor (left)
	RECTL			38	34	rectifier DC decoupling (left)
	CATT/REC L			39	35	attack/recovery capacitor (left)

October 1994

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Philips Semiconductors

Product specification

Satellite sound circuit with noise reduction

TDA8741; TDA8741H

SYMBOL

PIN

PIN

DESCRIPTION

SDIP42

QFP44

CDC L

40

36

DC decoupling capacitor (left)

CDC M

41

37

DC decoupling capacitor (main)

CDC R

42

38

DC decoupling capacitor (right)

n.c.

−

43

not connected

n.c.

−

44

not connected

Fig.2 Pin configuration (SDIP42).

October 1994

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Philips Semiconductors

Product specification

Satellite sound circuit with noise reduction

TDA8741; TDA8741H

Fig.3 Pin configuration (QFP44).

October 1994

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Philips Semiconductors	Product specification
Satellite sound circuit with noise reduction	TDA8741; TDA8741H

FUNCTIONAL DESCRIPTION

Satellite sound

The baseband signal coming from a satellite tuner contains the demodulated video signal plus a number of sound carriers to facilitate reception of a PAL/NTSC/SECAM satellite signal.

Nearest to the video signal is the main sound carrier which carries the single channel sound related to the video. This is an FM modulated carrier with a fixed pre-emphasis. The carrier frequency can be in the range of 5.8 to 6.8 MHz.

Additionally, a number of optional secondary sound carriers may be present which can be used for stereo or multi-language sound related to the video, or for unrelated radio sound. These carriers are also FM modulated, but for better sound quality (improved signal-to-noise performance) broadcast satellites (e.g. ‘ASTRA’) use a noise reduction system (adaptive pre-emphasis circuit, combined with a fixed pre-emphasis).

These secondary carrier frequencies can be in the range of 6.30 to 8.28 MHz. For accurate tuning to the many sound carriers an external frequency synthesizer and mixer is used to transpose the sound carriers to intermediate frequencies of 10.7 and 10.52 MHz.

The TDA8741; H contains all circuitry for processing the main channel and for two secondary channels, from IF signal to line (SCART) output drivers. The desired frequencies can be routed to the TDA8741; H via bandpass filters.

Main channel (see Fig.1)

The lock-in range of the main channel PLL can be switched between 5.5 to 7.5 MHz, PLL off and 10.0 to 11.5 MHz using the MCS signal at pin 7 (2) [when pin 7 (2) is at logic 0, being a voltage from 0 to 1.2 V, the lock-in range = 5.5 to 7.5 MHz; when pin 7 (2) is at logic 1, being a voltage from 3.5 V until VP, the lock-in range = 10.0 to 11.5 MHz; when pin 7 (2) is in the mid voltage position, being a voltage from 1.8 to 2.8 V, the main channel PLL is switched off]. The voltage is then determined by the resistor divider at this pin between VP and ground.

If only one fixed carrier frequency for the main channel is to be demodulated (e.g. 6.5 MHz), the lock-in range of the PLL should be switched to 5.5 to 7.5 MHz. The baseband signal is applied to the main channel input, pin 18 (14) via a 6.5 MHz ceramic bandpass filter. Alternatively, if there is a requirement to demodulate different main channel frequencies, these frequencies can be transferred to a fixed intermediate frequency (e.g. 10.7 MHz) using an

external mixer and oscillator-frequency synthesizer. In this event the lock-in range of the PLL should be switched to 10.0 to 11.5 MHz. The IF signal is applied to the main channel input, pin 18 (14) via a 10.7 MHz ceramic bandpass filter.

The filtered signal is AC-coupled to a limiter/amplifier and then to a PLL demodulator. The PLL FM demodulator ensures that the demodulator is alignment-free. High gain and DC error signals from the PLL, which are superimposed on the demodulator output, require DC decoupling. A buffer amplifier is used to amplify the signal to the same level as the secondary channels and decouples DC using an electrolytic capacitor connected to pin 41 (37). The demodulator output signal is fed to pin 20 (16) via an internal resistor. The output signal can be de-emphasized by means of this resistor and an external capacitor connected to ground.

Capacitor value = de-emphasis time constant per 1500 (for 50 μs: 33 nF).

From here the signal is fed to the output selectors. The signal is amplified to 500 mV (RMS) (i.e. −6 dBV) in the output amplifiers.

Secondary channels

An external mixer and oscillator frequency synthesizer transfers the secondary sound carriers to fixed intermediate frequencies e.g. 10.7 and 10.52 MHz. Two secondary channel inputs are available at pins 8 and 16 (3 and 11). The signals are routed to the inputs via external ceramic bandpass filters which are tuned to the required intermediate frequencies.

For stereo applications the TDA8741; TDA8741H contains two identical secondary sound processing channels. Secondary Channel 1 will also be referred to as ‘LEFT’ or ‘LANGUAGE 1’ and secondary Channel 2 will also be referred to as ‘RIGHT’ or ‘LANGUAGE 2’.

From the inputs the signals are coupled to limiter/amplifiers and then to the PLL demodulators. Processing is similar to the main channel. The demodulator output signal is amplified in a buffer amplifier and DC decoupled using electrolytic capacitors connected to pins 40 (36) (left) and 42 (38) (right). The output level is set with a resistor connected in series with the capacitor.

High frequency components in the amplified PLL output signal are filtered out in the audio LPF block (4th order Butterworth low-pass filter) to prevent unwanted influence on the noise reduction.

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Philips Semiconductors	Product specification
Satellite sound circuit with noise reduction	TDA8741; TDA8741H

NOISE REDUCTION (NR)

The noise reduction can be regarded as an input level-dependent low-pass filter (adaptive de-emphasis system) followed by a fixed de-emphasis. With maximum input level (0 dB) the frequency response of the first part (i.e. without the fixed de-emphasis) is virtually flat. As the input level is lowered by x-dB, the higher output frequencies will be reduced an extra x-dB with respect to the lower frequencies (1 : 2 expansion).

The NR output signal is fed to pin 36 (32) (left) and pin 32 (28) (right) via an internal resistor.

Fixed de-emphasis is achieved by these resistors and external capacitors connected to ground. The signals are DC decoupled via pins 36/35 (32/31) and 32/33 (28/29) and then routed to the output selectors.

OUTPUT SELECTION

With the output selector (see Table 1) the outputs at pins 25 and 24 (21 and 20) can be switched to the different channels. Both outputs can be switched to both secondary channels, to the main channel and to the external inputs at pin 28 and 27 (24 and 23) for IC chaining purposes.

Pin 23 (19) is a separate output which delivers the main channel only, thereby creating the possibility of having three different output channels simultaneously e.g. for use in hi-fi VCRs.

The outputs at pins 25 and 24 (21 and 20) can be muted by setting the MUTE signal at pin 13 (8) to logic 1 (switch positions 6 and 7).

The output at pin 23 (19) can be muted by setting the MUTE signal and the EXT/INT signal at pin 26 (22) both logic 1 (switch position 7).

All outputs at pins 23, 24 and 25 (19, 20 and 21) are line drivers with SCART level capability and are short-circuit protected by 125 Ω output resistors.

Output level of all channels = −6 dBV typical when frequency deviation of FM signal is 54% of maximum frequency deviation (i.e. 0.54 × 85 kHz = 46 kHz for the main channel and 0.54 × 50 kHz = 27 kHz for the secondary channels) at 1 kHz modulation frequency (reference level).

ABBREVIATIONS

fMOD = modulating frequency.

fM = frequency deviation of the main Channel.

fS1 = frequency deviation of secondary Channel 1 (left). fS2 = frequency deviation of secondary Channel 2 (right).

fOM = carrier frequency of main Channel.

fOS1 = carrier frequency of secondary Channel 1. fOS2 = carrier frequency of secondary Channel 2. LPF = Low-Pass Filter.

NR = Noise Reduction.

PLL = Phase-Locked-Loop.

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