Philips TDA8730 Datasheet

INTEGRATED CIRCUITS

DATA SHEET

TDA8730

PLL FM demodulator for DBS signals

Preliminary specification			March 1991
File under Integrated Circuits, IC02

Philips Semiconductors	Preliminary specification
PLL FM demodulator for DBS signals	TDA8730

FEATURES

∙Broadband IF amplifier

∙PLL demodulator, consisting of:

–a multiplier

–a voltage controlled oscillator

–a loop amplifier

∙AGC detector and DC amplifier

∙LOW impedance video and data output

∙Power supply voltage stabilizer

QUICK REFERENCE DATA

GENERAL DESCRIPTION

The TDA8730 is a sensitive PLL demodulator for the second IF and direct broadcasting satellite (DBS) receivers. It provides AGC output and threshold adjustment for optimal signal level at the input of the demodulator.

	SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
	VDD	supply voltage		−	9	−	V
	IDD	supply current		−	75	−	mA
	VI	input voltage level		−	70	−	dBμV
	fosc	minimum oscillator frequency		−	130	−	MHz
	fosc	maximum oscillator frequency		−	720	−	MHz
	VO	video output signal amplitude (peak-to-peak	note 1	−	1.1	−	V
		value)
	VAGC	AGC output voltage		1.8	−	VDD	V

Note

1.f = 13.5 MHz (peak-to-peak value)

ORDERING AND PACKAGE INFORMATION

EXTENDED TYPE			PACKAGE
NUMBER
	PINS	PIN POSITION		MATERIAL	CODE
TDA8730	16	DIL		plastic	SOT38GE(1)

Note

1. SOT38-1; 1996 December 4.

March 1991

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Philips Semiconductors					Preliminary specification
PLL FM demodulator for DBS signals					TDA8730
		PINNING
		SYMBOL	PIN	DESCRIPTION
		AGCO	1	AGC output
		AGCFC	2	AGC frequency compensation
		OSCIN1	3	oscillator input	1
		GND	4	GND
		OSCIN2	5	oscillator input	2
		GND1	6	ground 1
		VDO	7	variable capacitor drive output
		FI	8	feedback input
		VO	9	video output
		GND2	10	ground 2
		SDN	11	stabilizer decoupling node
		VDD	12	supply voltage +9 V
		RFIN2	13	RF input 2
		RFIN1	14	RF input 1
Fig.1 Pinning diagram.		RFGND	15	RF ground
		AGCTS	16	AGC threshold setting

APPLICATIONS

Direct broadcasting satellite (DBS) receivers.

March 1991

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