1996 Aug 26 7
Philips Semiconductors Product specification
8-bit high-speed analog-to-digital converter TDA8716
CHARACTERISTICS
V
EEA
= −4.95 to −5.45 V; V
EED1
, V
EED2
= −4.95 to −5.45 V; AGND, DGND and OGND shorted together;
T
amb
= 0 to +70 °C; unless otherwise specified. (Typical values taken at V
EEA
= −5.2 V; V
EED1
, V
EED2
= −5.2 V;
T
amb
=25°C).
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
V
EEA
analog supply voltage −5.45 −5.2 −4.95 V
V
EED1,VEED2
digital supply voltage −5.45 −5.2 −4.95 V
I
EEA
analog supply current − 50 55 mA
I
EED1,IEED2
digital supply current − 100 110 mA
I
EE
output supply current RL= 2.2 kΩ−20 25 mA
V
diff
supply voltage differential V
EEA
− V
EED1
; V
EEA
− V
EED2
−0.5 0 +0.5 V
Reference voltages for the resistor ladder
V
RB
reference voltage BOTTOM −3.5 −3.13 − V
V
RT
reference voltage TOP −−1.87 −1.5 V
V
ref
reference voltage differential VRT− V
RB
− 1.26 − V
V
OB
voltage offset BOTTOM note 1 − 130 − mV
V
OT
voltage offset TOP note 1 − 130 − mV
V
I(p-p)
input voltage amplitude
(peak-to-peak value)
0.95 1.0 1.5 V
I
ref
reference current − 15 − mA
R
LAD
resistor ladder − 85 −Ω
TC
RL
temperature coefficient of the
resistor ladder
− 0.18 −Ω/K
Inputs
CLK and
CLK input
V
IL
LOW level input voltage −1850 −1770 −1650 mV
V
IH
HIGH level input voltage −960 −880 −810 mV
I
IL
LOW level input current V
CLK
= −1.77 V − 1 −µA
I
IH
HIGH level input current V
CLK
= −0.88 V − 10 −µA
R
I
input resistance − 20 − kΩ
C
I
input capacitance − 2 − pF
V
CLK(p-p)
differential clock input
V
CLK
− V
CLK
(peak-to-peak value)
− 900 − mV
Analog input; note 2
I
IB
input current BOTTOM VRB= −3.13 V − 0 −µA
I
IT
input current TOP VRT= −1.87 V − 170 −µA
R
I
input resistance − 7 − kΩ
C
I
input capacitance − 13 20 pF