Philips TDA8310A-N1 Datasheet

DATA SH EET

Product specification
Supersedes data of 1995 Nov 29
File under Integrated Circuits, IC02

1996 Jan 25

INTEGRATED CIRCUITS

TDA8310A

PAL/NTSC colour processor
for PIP applications

1996 Jan 25 2

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

TDA8310A

FEATURES

• Video switch with 2 CVBS inputs. One input can be
switched between CVBS and Y/C and the circuit can
automatically detect whether the incoming signal is
CVBS or Y/C

• Integrated chrominance trap and bandpass filters
(automatically calibrated)

• Integrated luminance delay line

• Automatic PAL/NTSC decoder which can decode all

standards available in the world

• Easy interfacing with the TDA8395 (SECAM decoder)
for multistandard applications

• Horizontal PLL with an alignment-free horizontal
oscillator

• Vertical count-down circuit

• RGB/YUV and fast blanking switch with 3-state output

and active clamping

• Low dissipation (560 mW)

• Small amount of peripheral components compared with

competition ICs.

GENERAL DESCRIPTION

The TDA8310A is an alignment-free PAL/NTSC colour
processor for Picture-in-Picture (PIP) applications.
The main difference between the TDA8310 and the
TDA8310A is that the vision IF amplifier has been omitted
in the TDA8310A. Therefore, the circuit contains an input
signal selector, a PAL/NTSC colour decoder, horizontal
and vertical synchronization and an RGB/YUV switch.

The input signal selector has 2 CVBS inputs. One of the
inputs can be switched between CVBS and Y/C and the
circuit can automatically detect whether the incoming
signal is CVBS or Y/C. The output signals for the PIP
processor are;

Luminance signal
Colour difference signals (U and V)
Horizontal and vertical synchronization pulses.

The RGB/YUV switch can select between two RGB or
YUV sources, e.g. between the PIP processor and the
SCART input signal.

The supply voltage for the IC is 8 V. It is available in a
52-pin SDIP package.

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA8310A SDIP52 plastic shrink dual in-line package; 52 leads (600 mil) SOT247-1

1996 Jan 25 3

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

TDA8310A

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

P

supply voltage (pins 19 and 41) 7.2 8.0 8.8 V

I

P

supply current − 70 1.4 mA

Input voltages

V

17,20(p-p)

CVBS/Y input voltage (peak-to-peak value) − 1.0 − V

V

16(p-p)

chrominance input voltage (peak-to-peak value) − 0.3 − V

V

i(p-p)

RGB/YUV input signal voltage amplitude
(peak-to-peak value)

−−1.3 V

Output signals

V

o(p-p)

luminance output voltage (peak-to-peak value) − 1.4 − V

V

50(p-p)

(B−Y) output voltage (peak-to-peak value) 1.06 1.33 1.6 V

V

51(p-p)

(R−Y) output voltage (peak-to-peak value) 0.84 1.05 1.26 V

V

39

horizontal sync pulse output voltage − 4.0 − V

V

36

vertical sync pulse output voltage − 4.0 − V

G

v

voltage gain of the RGB switches −0.5 0 +0.5 dB

Control voltage

V

control

control voltage for HUE 0 − 5.0 V

1996 Jan 25 4

Philips Semiconductors Product specification

PAL/NTSC colour processor

for PIP applications

TDA8310A

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BLOCK DIAGRAM

handbook, full pagewidth

MGD128

46 45

PLL XTAL4

REF

44

XTAL343XTAL242XTAL1

R/W

COLOUR1

27 26

COLOUR2

25

LOGIC1

24

LOGIC2

23

B Y

R Y

50 51

GND1 GND3

18 38

LUMINANCE
DELAY LINE

Y

49

HUE

28

4

IDENT

SECAM

48

4716

CHROMA

I

917

INPUT

SELECTOR

20

GND2

CVBS

INT

SYSTSWCHROMA

O

CVBS

EXT

31

AUTOMATIC

Y/C

DETECTOR

15

DEC

FT

32

33, 34

CHROMINANCE

BANDPASS

CHROMINANCE

TRAP

FILTER

TUNING

SYNC

SEPARATOR

VERTICAL

SYNC

SEPARATOR

PAL/NTSC
DECODER

VCO

+

CONTROL

PHASE

DETECTOR

COINCIDENCE/

NOISE

DETECTOR

n.c.

22, 29

i.c.

CVBS

SW

37

PH1LF

35

DEC

BG

21

DEC

DIG

41

V

P2

30

INTB

19

V

P1

HORIZONTAL/

VERTICAL

DIVIDER

PULSE

SHAPER

39

HOUT36VOUT

SANDCASTLE

GENERATOR

40

SAND

TDA8310A

BLANK2

52

B2

3

G2

2

R2

1

BLANK

5

B

6

G

7

R

8

CLAMP

14

BLANK1

13

B1

12

G1

11

R1

10

RGB/YUV

SWITCH

Fig.1 Block diagram.

1996 Jan 25 5

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

TDA8310A

PINNING

SYMBOL PIN DESCRIPTION

R2 1 RED input 2 (PIP)
G2 2 GREEN input 2 (PIP)
B2 3 BLUE input 2 (PIP)
IDENT 4 colour standard identification output
BLANK 5 blanking output
B 6 BLUE output
G 7 GREEN output
R 8 RED output
SYST

SW

9 CVBS/system switch
R1 10 RED input 1
G1 11 GREEN input 1
B1 12 BLUE input 1
BLANK1 13 blanking input1
CLAMP 14 clamping pulse input
DEC

FT

15 decoupling filter tuning

CHROMA

I

16 chrominance input

CVBS

EXT

17 external CVBS/Y input
GND1 18 ground 1 (0 V)
V

P1

19 supply voltage 1 (+8 V)
CVBS

INT

20 internal CVBS input
DEC

DIG

21 decoupling digital supply rail
i.c. 22 internally connected (test purposes)
LOGIC2 23 crystal logic 2 input/output
LOGIC1 24 crystal logic 1 input/output
COLOUR2 25 colour system logic 2 input/output
COLOUR1 26 colour system logic 1 input/output
R/

W 27 read/write selection input

HUE 28 HUE control input
i.c. 29 internally connected (test purposes)
INTB 30 internal bias
GND2 31 ground 2 (0 V)
CVBS

SW

32 CVBS positive/negative modulation

control switch input
n.c. 33 not connected
n.c. 34 not connected
DEC

BG

35 bandgap decoupling
VOUT 36 vertical sync output pulse
PH1LF 37 phase 1 loop filter
GND3 38 ground 3 (0 V)
HOUT 39 horizontal sync output pulse
SAND 40 sandcastle pulse output
V

P2

41 supply voltage 2 (+8 V)
XTAL1 42 4.4336 MHz crystal
XTAL2 43 3.5820 MHz crystal for PAL-N
XTAL3 44 3.5756 MHz crystal for PAL-M
XTAL4 45 3.5795 MHz crystal for NTSC
PLL 46 PLL colour filter
CHROMA

O

47 chrominance output for TDA8395
SECAM 48 SECAM reference output
Y 49 Y output
B−Y50B−Y output
R−Y51R−Y output
BLANK2 52 blanking/insertion input 2 (PIP)

SYMBOL PIN DESCRIPTION

1996 Jan 25 6

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

TDA8310A

Fig.2 Pin configuration.

handbook, halfpage

TDA8310A

MGD127

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

R2
G2
B2

IDENT

BLANK

B
G
R

SYST

SW

R1
G1
B1

BLANK1

CLAMP

DEC

FT

CHROMA

I

CVBS

EXT

GND1

V

P1

CVBS

INT

DEC

DIG

i.c.
LOGIC2
LOGIC1

COLOUR2
COLOUR1

BLANK2
R−Y
B−Y
Y
SECAM
CHROMA

O

PLL
XTAL4
XTAL3
XTAL2
XTAL1
V

P2

SAND
HOUT
GND3
PH1LF
VOUT
DEC

BG

n.c.
n.c.
CVBS

SW

GND2
INTB
i.c.
HUE
R/W

52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27

1996 Jan 25 7

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

TDA8310A

FUNCTIONAL DESCRIPTION
CVBS switch

The circuit contains a 2 input CVBS switch and one of
the inputs can be switched between CVBS and Y/C.
The circuit contains an identification circuit which can
automatically switch between the CVBS and Y/C signals.
It is also possible to force the switch to CVBS or Y/C.

Synchronization circuit

The sync separator is preceded by a voltage controlled
amplifier which adjusts the sync pulse amplitude to a fixed
level. The sync pulses are fed to the slicing stage
(separator) which operates at 50% of the amplitude.

The separated sync pulses are fed to the first phase
detector and to the coincidence detector. The coincidence
detector is used to detect whether the line oscillator is
synchronized and for transmitter identification. The first
PLL has a very high static steepness this ensures that the
phase of the picture is independent of the line frequency.
The line oscillator operates at twice the line frequency.

The oscillator network is internal. Because of the spread of
internal components an automatic adjustment circuit has
been added to the IC.

The circuit compares the oscillator frequency with that of
the crystal oscillator in the colour decoder. This results in
a free-running frequency which deviates less than 2%
from the typical value.

The horizontal output pulse is derived from the horizontal
oscillator via a pulse shaper. The pulse width of the output
pulse is 5.4 µs, the front edge of this pulse coincides with
the front edge of the sync pulse at the input.

The vertical output pulse is generated by a count-down
circuit. The pulse width is approximately 380 µs. Both the
horizontal and vertical output pulses will always be
available at the outputs even when no input signal is
available.

In addition to the horizontal and vertical sync pulse outputs
the IC has a sandcastle pulse output which contains burst
key and blanking pulses.

Integrated video filters

The circuit contains a chrominance bandpass and trap
circuit. The filters are realised by gyrator circuits that are
automatically tuned by comparing the tuning frequency
with the crystal frequency of the decoder. When a Y/C
signal is supplied to the input the chrominance trap is
automatically switched off by the Y/C detection circuit
however, it is also possible to force the filters in the CVBS
or Y/C position.

The luminance delay line is also realised by gyrator
circuits.

Colour decoder

The colour decoder contains an alignment-free crystal
oscillator, a colour killer circuit and colour difference
demodulators. The 90° phase shift for the reference signal
is achieved internally.

The colour decoder is very flexible. Together with the
SECAM decoder (TDA8395) an automatic multistandard
decoder can be designed but it is also possible to use it for
one standard when only one crystal is connected to the IC.
The decoder can be forced to one of the standards via the
‘forced mode’ pins. The crystal pins which are not used
must be connected to the positive supply line via a 8.2 kΩ
resistor. It is also possible to connect the non-used pins
with one resistor to the positive supply line. In this event
the resistor must have a value of 8.2 kΩ divided by the
number of pins.

The chrominance output signal of the video switch is
externally available and must be used as an input signal
for the SECAM decoder.

RGB/YUV switch

The RGB/YUV switch is for switching between two RGB or
YUV video sources. The outputs of the switch can be set
to high-impedance state so that other switches can be
used in parallel.

The switch is controlled via pins 13 and 52. The details of
switch control are shown in Table 4.

1996 Jan 25 8

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

TDA8310A

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC134).

THERMAL CHARACTERISTICS

CHARACTERISTICS

V

P

=8V; T

amb

=25°C; unless otherwise specified.

SYMBOL PARAMETER MIN. MAX. UNIT

V

P

supply voltage − 9.0 V

T

stg

storage temperature −25 +150 °C

T

amb

operating ambient temperature −25 +70 °C

T

sld

soldering temperature for 5 s − 260 °C

T

j

maximum operating junction temperature − 150 °C

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air ≤40 K/W

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V

P

supply voltage (pins 19 and 41) 7.2 8.0 8.8 V

I

P1

supply current (pin 19) 45 65 80 mA

I

P2

supply current (pin 41) 3 5 10 mA

P

tot

total power dissipation − 560 − mW

R

bias

value of resistor to be connected
between pin 30 and the positive
supply line

− 10 − kΩ

CVBS and Y/C switch

I

NTERNAL CVBS AND EXTERNAL CVBS/Y INPUTS (PINS 20 AND 17)

V

20,17(p-p)

CVBS/Y input voltage
(peak-to-peak value)

notes 1 and 3 − 1 1.4 V

I

20,17

input current − 46µA

V

clamp

top sync clamping voltage level − 3.3 − V

I

clamp

clamping input current 80 100 −µA
CHROMINANCE INPUT (PIN 16)
V

16(p-p)

chrominance input voltage

(peak-to-peak value)

notes 1, 4 and 11 − 0.3 − V

V

16(p-p)

input signal amplitude before clipping

occurs (peak-to-peak value)

note 2 1.0 −−V

R

I

chrominance input resistance 14 20 26 kΩ
C

I

chrominance input capacitance note 1 −−5pF