Philips TDA8310A Datasheet

INTEGRATED CIRCUITS

DATA SH EET

TDA8310A

PAL/NTSC colour processor
for PIP applications

Product specification
Supersedes data of 1995 Nov 29
File under Integrated Circuits, IC02

1996 Jan 25

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

FEATURES

• Video switch with 2 CVBS inputs. One input can be
switched between CVBS and Y/C and the circuit can
automatically detect whether the incoming signal is
CVBS or Y/C

• Integrated chrominance trap and bandpass filters
(automatically calibrated)

• Integrated luminance delay line

• Automatic PAL/NTSC decoder which can decode all

standards available in the world

• Easy interfacing with the TDA8395 (SECAM decoder)
for multistandard applications

• Horizontal PLL with an alignment-free horizontal
oscillator

• Vertical count-down circuit

• RGB/YUV and fast blanking switch with 3-state output

and active clamping

• Low dissipation (560 mW)

• Small amount of peripheral components compared with

competition ICs.

TDA8310A

GENERAL DESCRIPTION

The TDA8310A is an alignment-free PAL/NTSC colour
processor for Picture-in-Picture (PIP) applications.
The main difference between the TDA8310 and the
TDA8310A is that the vision IF amplifier has been omitted
in the TDA8310A. Therefore, the circuit contains an input
signal selector, a PAL/NTSC colour decoder, horizontal
and vertical synchronization and an RGB/YUV switch.

The input signal selector has 2 CVBS inputs. One of the
inputs can be switched between CVBS and Y/C and the
circuit can automatically detect whether the incoming
signal is CVBS or Y/C. The output signals for the PIP
processor are;

Luminance signal
Colour difference signals (U and V)
Horizontal and vertical synchronization pulses.

The RGB/YUV switch can select between two RGB or
YUV sources, e.g. between the PIP processor and the
SCART input signal.

The supply voltage for the IC is 8 V. It is available in a
52-pin SDIP package.

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA8310A SDIP52 plastic shrink dual in-line package; 52 leads (600 mil) SOT247-1

PACKAGE

1996 Jan 25 2

Philips Semiconductors Product specification

PAL/NTSC colour processor

TDA8310A

for PIP applications

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

P

I

P

Input voltages

V

17,20(p-p)

V

16(p-p)

V

i(p-p)

Output signals

V

o(p-p)

V

50(p-p)

V

51(p-p)

V

39

V

36

G

v

Control voltage

V

control

supply voltage (pins 19 and 41) 7.2 8.0 8.8 V
supply current − 70 1.4 mA

CVBS/Y input voltage (peak-to-peak value) − 1.0 − V
chrominance input voltage (peak-to-peak value) − 0.3 − V
RGB/YUV input signal voltage amplitude

−−1.3 V

(peak-to-peak value)

luminance output voltage (peak-to-peak value) − 1.4 − V
(B−Y) output voltage (peak-to-peak value) 1.06 1.33 1.6 V
(R−Y) output voltage (peak-to-peak value) 0.84 1.05 1.26 V
horizontal sync pulse output voltage − 4.0 − V
vertical sync pulse output voltage − 4.0 − V
voltage gain of the RGB switches −0.5 0 +0.5 dB

control voltage for HUE 0 − 5.0 V

1996 Jan 25 3

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1996 Jan 25 4

INTB

V

PH1LF

37

DEC

35

BG

DEC

21

DIG

V

P1

P2

41

19

30

HOUT36VOUT

39

SAND

40

BLOCK DIAGRAM

PAL/NTSC colour processor

for PIP applications

Philips Semiconductors Product specification

CVBS

DEC

SW

n.c.

COINCIDENCE/

NOISE

DETECTOR

22, 29

i.c.

33, 34

FT

15

CHROMINANCE

BANDPASS

32

AUTOMATIC

DETECTOR

31

GND2

Y/C

CVBS

20

CVBS

INT

INPUT

SELECTOR

EXT

SYST

917

CHROMA

SW

PHASE

DETECTOR

SYNC

SEPARATOR

CHROMINANCE

4716

I

CHROMA

TRAP

48

SECAM

O

46 45

PLL XTAL4

VCO

+

CONTROL

VERTICAL

SYNC

SEPARATOR

FILTER

TUNING

REF

PAL/NTSC
DECODER

44

XTAL343XTAL242XTAL1

PULSE

SHAPER

HORIZONTAL/

VERTICAL

DIVIDER

TDA8310A

27 26

R/W

COLOUR2

COLOUR1

25

LOGIC1

SANDCASTLE

GENERATOR

24

23

LOGIC2

B Y

50 51

R Y

RGB/YUV

SWITCH

LUMINANCE
DELAY LINE

18 38

GND1 GND3

10

R1

11

G1

12

B1

13

BLANK1

14

CLAMP

8

R

7

G

6

B

5

BLANK

1

R2

2

G2

3

B2

52

BLANK2

4

IDENT
HUE

28

49

Y

MGD128

TDA8310A

Fig.1 Block diagram.

handbook, full pagewidth

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

PINNING

SYMBOL PIN DESCRIPTION

R2 1 RED input 2 (PIP)
G2 2 GREEN input 2 (PIP)
B2 3 BLUE input 2 (PIP)
IDENT 4 colour standard identification output
BLANK 5 blanking output
B 6 BLUE output
G 7 GREEN output
R 8 RED output
SYST

SW

R1 10 RED input 1
G1 11 GREEN input 1
B1 12 BLUE input 1
BLANK1 13 blanking input 1
CLAMP 14 clamping pulse input
DEC

FT

CHROMA
CVBS

EXT

GND1 18 ground 1 (0 V)
V

P1

CVBS

INT

DEC

DIG

i.c. 22 internally connected (test purposes)
LOGIC2 23 crystal logic 2 input/output
LOGIC1 24 crystal logic 1 input/output
COLOUR2 25 colour system logic 2 input/output
COLOUR1 26 colour system logic 1 input/output
R/

W 27 read/write selection input

9 CVBS/system switch

15 decoupling filter tuning
16 chrominance input

I

17 external CVBS/Y input

19 supply voltage 1 (+8 V)
20 internal CVBS input
21 decoupling digital supply rail

TDA8310A

SYMBOL PIN DESCRIPTION

HUE 28 HUE control input
i.c. 29 internally connected (test purposes)
INTB 30 internal bias
GND2 31 ground 2 (0 V)
CVBS

SW

n.c. 33 not connected
n.c. 34 not connected
DEC

BG

VOUT 36 vertical sync output pulse
PH1LF 37 phase 1 loop filter
GND3 38 ground 3 (0 V)
HOUT 39 horizontal sync output pulse
SAND 40 sandcastle pulse output
V

P2

XTAL1 42 4.4336 MHz crystal
XTAL2 43 3.5820 MHz crystal for PAL-N
XTAL3 44 3.5756 MHz crystal for PAL-M
XTAL4 45 3.5795 MHz crystal for NTSC
PLL 46 PLL colour filter
CHROMA
SECAM 48 SECAM reference output
Y 49 Y output
B−Y50B−Y output
R−Y51R−Y output
BLANK2 52 blanking/insertion input 2 (PIP)

32 CVBS positive/negative modulation

control switch input

35 bandgap decoupling

41 supply voltage 2 (+8 V)

47 chrominance output for TDA8395

O

1996 Jan 25 5

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

handbook, halfpage

SYST

BLANK1

CHROMA
CVBS

CVBS

DEC

COLOUR2
COLOUR1

R2
G2
B2

IDENT

BLANK

SW

R1
G1
B1

CLAMP

DEC

FT

EXT

GND1

V

P1

INT

DIG

i.c.
LOGIC2
LOGIC1

B
G
R

I

1
2
3
4
5
6
7
8

9
10
11
12
13

TDA8310A

14
15
16
17
18
19
20
21
22
23
24
25
26

MGD127

52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27

BLANK2
R−Y
B−Y
Y
SECAM
CHROMA
PLL
XTAL4
XTAL3
XTAL2
XTAL1
V

P2

SAND
HOUT
GND3
PH1LF
VOUT
DEC

BG

n.c.
n.c.
CVBS

SW

GND2
INTB
i.c.
HUE
R/W

TDA8310A

O

Fig.2 Pin configuration.

1996 Jan 25 6

Philips Semiconductors Product specification

PAL/NTSC colour processor
for PIP applications

FUNCTIONAL DESCRIPTION
CVBS switch

The circuit contains a 2 input CVBS switch and one of
the inputs can be switched between CVBS and Y/C.
The circuit contains an identification circuit which can
automatically switch between the CVBS and Y/C signals.
It is also possible to force the switch to CVBS or Y/C.

Synchronization circuit

The sync separator is preceded by a voltage controlled
amplifier which adjusts the sync pulse amplitude to a fixed
level. The sync pulses are fed to the slicing stage
(separator) which operates at 50% of the amplitude.

The separated sync pulses are fed to the first phase
detector and to the coincidence detector. The coincidence
detector is used to detect whether the line oscillator is
synchronized and for transmitter identification. The first
PLL has a very high static steepness this ensures that the
phase of the picture is independent of the line frequency.
The line oscillator operates at twice the line frequency.

The oscillator network is internal. Because of the spread of
internal components an automatic adjustment circuit has
been added to the IC.

The circuit compares the oscillator frequency with that of
the crystal oscillator in the colour decoder. This results in
a free-running frequency which deviates less than 2%
from the typical value.

TDA8310A

Integrated video filters

The circuit contains a chrominance bandpass and trap
circuit. The filters are realised by gyrator circuits that are
automatically tuned by comparing the tuning frequency
with the crystal frequency of the decoder. When a Y/C
signal is supplied to the input the chrominance trap is
automatically switched off by the Y/C detection circuit
however, it is also possible to force the filters in the CVBS
or Y/C position.

The luminance delay line is also realised by gyrator
circuits.

Colour decoder

The colour decoder contains an alignment-free crystal
oscillator, a colour killer circuit and colour difference
demodulators. The 90° phase shift for the reference signal
is achieved internally.

The colour decoder is very flexible. Together with the
SECAM decoder (TDA8395) an automatic multistandard
decoder can be designed but it is also possible to use it for
one standard when only one crystal is connected to the IC.
The decoder can be forced to one of the standards via the
‘forced mode’ pins. The crystal pins which are not used
must be connected to the positive supply line via a 8.2 kΩ
resistor. It is also possible to connect the non-used pins
with one resistor to the positive supply line. In this event
the resistor must have a value of 8.2 kΩ divided by the
number of pins.

The horizontal output pulse is derived from the horizontal
oscillator via a pulse shaper. The pulse width of the output
pulse is 5.4 µs, the front edge of this pulse coincides with
the front edge of the sync pulse at the input.

The vertical output pulse is generated by a count-down
circuit. The pulse width is approximately 380 µs. Both the
horizontal and vertical output pulses will always be
available at the outputs even when no input signal is
available.

In addition to the horizontal and vertical sync pulse outputs
the IC has a sandcastle pulse output which contains burst
key and blanking pulses.

1996 Jan 25 7

The chrominance output signal of the video switch is
externally available and must be used as an input signal
for the SECAM decoder.

RGB/YUV switch

The RGB/YUV switch is for switching between two RGB or
YUV video sources. The outputs of the switch can be set
to high-impedance state so that other switches can be
used in parallel.

The switch is controlled via pins 13 and 52. The details of
switch control are shown in Table 4.

Philips Semiconductors Product specification

PAL/NTSC colour processor

TDA8310A

for PIP applications

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

P

T

stg

T

amb

T

sld

T

j

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

CHARACTERISTICS

=8V; T

V

P

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

supply voltage − 9.0 V
storage temperature −25 +150 °C
operating ambient temperature −25 +70 °C
soldering temperature for 5 s − 260 °C
maximum operating junction temperature − 150 °C

thermal resistance from junction to ambient in free air ≤40 K/W

=25°C; unless otherwise specified.

amb

Supplies

V

P

I

P1

I

P2

P

tot

R

bias

supply voltage (pins 19 and 41) 7.2 8.0 8.8 V
supply current (pin 19) 45 65 80 mA
supply current (pin 41) 3 5 10 mA
total power dissipation − 560 − mW
value of resistor to be connected

between pin 30 and the positive
supply line

CVBS and Y/C switch

NTERNAL CVBS AND EXTERNAL CVBS/Y INPUTS (PINS 20 AND 17)

I
V

20,17(p-p)

CVBS/Y input voltage

notes 1 and 3 − 1 1.4 V

(peak-to-peak value)

I

20,17

V

clamp

I

clamp

input current − 46µA
top sync clamping voltage level − 3.3 − V

clamping input current 80 100 −µA
CHROMINANCE INPUT (PIN 16)
V

16(p-p)

chrominance input voltage

notes 1, 4 and 11 − 0.3 − V

(peak-to-peak value)
V

16(p-p)

input signal amplitude before clipping

note 2 1.0 −−V

occurs (peak-to-peak value)
R

I

C

I

chrominance input resistance 14 20 26 kΩ

chrominance input capacitance note 1 −−5pF

− 10 − kΩ

1996 Jan 25 8