Philips TDA8060TS-C1-S1, TDA8060TS-C1-R1, TDA8060TS-C1 Datasheet

DATA SH EET

Product specification
Supersedes data of 1999 Aug 30
File under Integrated Circuits, IC02

1999 Nov 11

INTEGRATED CIRCUITS

TDA8060TS

Satellite ZERO-IF QPSK
down-converter

1999 Nov 11 2

Philips Semiconductors Product specification

Satellite ZERO-IF QPSK down-converter TDA8060TS

FEATURES

• Direct conversion QPSK demodulation (Zero IF)

• 920 to 2200 MHz range

• On-chip loop-controlled 0 or 90° phase shifter

• Variable gain on RF input

• 60 MHz, at −1 dB, bandwidth for baseband

I and Q amplifiers

• Local oscillator output to PLL satellite or terrestrial

• 5 V supply voltage.

APPLICATIONS

• Direct Broadcasting Satellite (DBS) QPSK
demodulation

• Digital Video Broadcasting (DVB) QPSK demodulation.

GENERAL DESCRIPTION

The direct conversion QPSKdemodulator is the front-end
receiver dedicated to digital TV broadcasting, satisfying
both DVB and DBS TV standards.

The 920 to 2200 MHz wide range oscillator covers
American, European and Asian satellite bands as well as
the future SMA-TV US standard.

Accurate QPSK demodulation is ensured by the on-chip
loop-controlled phase shifter. The Zero-IF concept
discardstraditionalIFfilteringandintermediateconversion
techniques. It also simplifies the signal path.

The baseband I and Q signal bandwidth only depends, to
a certain extent, on the external filter used in the
application.

Optimum signal level is guaranteed by a gain-controlled
amplifier at the RF input. The GAIN pin sets the gain for
both I and Q channels, providing a 30 dB range.

The chip also offers a selectable internal LO prescaler
(divide-by-2) and buffer that has been designed to be
compatible with the input of a terrestrial or satellite
frequency synthesizer.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

CC

supply voltage 4.75 5.00 5.25 V
∆Φ quadrature error −−3 deg
f

osc

oscillator frequency 920 − 2200 MHz
V

o(p-p)

output voltage (peak-to-peak value) − 0.75 − V
T

amb

ambient temperature −20 − +85 °C

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA8060TS SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1

1999 Nov 11 3

Philips Semiconductors Product specification

Satellite ZERO-IF QPSK down-converter TDA8060TS

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BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MGM318

ASYM AMP

AMP

SYM

LNA

BASEBAND

STAGE

I CONVERTER

×

100 MHz

ASYMSYM

Q CONVERTER

×

100 MHz

CONVERSION STAGE

RFA 8

IBBOUT23

QBBOUT14

V

CC(BB1)

1

BBGND13

V

CC(BB2)

12

BBGND210

RFB 7

COMGAIN 4

PEN 5

QUADRATURE

GENERATOR

STABILIZED LO

PLL AND

AMPLIFIER

OSCILLATORDIVIDE-BY-2

TDA8060TS

11
QOUT

20
LOOUT21LOOUTC18TKA17TKB

V

CC(RF)

6

RFGND
9

V

CC(LO1)

16

LOGND1
15

V

CC(LO2)

19

LOGND2
22

13
QBBIN

IOUT2IBBIN

24

LOW-PASS

FILTER

LOW-PASS

FILTER

1999 Nov 11 4

Philips Semiconductors Product specification

Satellite ZERO-IF QPSK down-converter TDA8060TS

PINNING

SYMBOL PIN DESCRIPTION

V

CC(BB1)

1 supply voltage 1 for baseband

circuit (+5 V)
IOUT 2 ‘I’ output from demodulator
BBGND1 3 ground 1 for baseband circuit
COMGAIN 4 RF amplifier gain control input
PEN 5 prescaler enable
V

CC(RF)

6 supply voltage for RF circuit (+5 V)
RFB 7 RF signal input B
RFA 8 RF signal input A
RFGND 9 ground for RF circuit
BBGND2 10 ground 2 for baseband circuit
QOUT 11 ‘Q’ output from demodulator
V

CC(BB2)

12 supply voltage 2 for baseband

circuit (+5 V)
QBBIN 13 ‘Q’ baseband amplifier input
QBBOUT 14 ‘Q’ baseband amplifier output
LOGND1 15 ground 1 for local oscillator circuit
V

CC(LO1)

16 supply voltage 1 for local oscillator

circuit (+5 V)
TKB 17 tank circuit input B
TKA 18 tank circuit input A
V

CC(LO2)

19 supply voltage 2 for local oscillator

circuit (+5 V)
LOOUT 20 local oscillator output to

synthesizer divided or not

according to PEN voltage

LOOUTC 21

LOGND2 22 ground 2 for local oscillator circuit
IBBOUT 23 ‘I’ baseband amplifier output
IBBIN 24 ‘I’ baseband amplifier input

Fig.2 Pin configuration.

handbook, halfpage

V

CC(BB1)

IOUT

BBGND1

COMGAIN

PEN

V

CC(RF)

RFB
RFA

RFGND

BBGND2

QOUT

V

CC(BB2)

IBBIN
IBBOUT
LOGND2
LOOUTC

V

CC(LO2)

TKA

LOOUT

TKB
V

CC(LO1)

LOGND1
QBBOUT
QBBIN

1
2
3
4
5
6
7
8

9
10
11
12

24
23
22
21
20
19
18
17

16
15
14
13

TDA8060TS

MGM317

1999 Nov 11 5

Philips Semiconductors Product specification

Satellite ZERO-IF QPSK down-converter TDA8060TS

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.

THERMAL CHARACTERISTICS

DC CHARACTERISTICS

T

amb

=25°C; VCC= 5 V; unless otherwise specified.

SYMBOL PARAMETER MIN. MAX. UNIT

V

CC

supply voltage −0.3 +6.0 V

V

i(max)

maximum input voltage on all pins −0.3 V

CC

V

t

sc(max)

maximum short-circuit time − 10 s

T

amb

ambient temperature −20 +85 °C

T

stg

storage temperature −55 +150 °C

T

j

junction temperature − 150 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 120 K/W

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

supply voltage 4.75 5.00 5.25 V

I

CC

supply current PEN = 5 V 63 73 83 mA

PEN=0V 607080mA

Conversion stage

V

I(RFA)

DC input voltage on pin RFA − 0.9 − V

V

I(RFB)

DC input voltage on pin RFB − 0.9 − V

V

O(IOUT)

DC output voltage on pin IOUT − 2.0 − V

V

O(QOUT)

DC output voltage on pin QOUT − 2.0 − V

Quadrature generator

V

O(LOOUT)

DC output voltage on pin LOOUT − 4.7 − V

V

O(LOOUTC)

DC output voltage on pin LOOUTC − 4.7 − V

Baseband stage

V

I(IBBIN)

DC input voltage on pin IBBIN − 2.5 − V

V

I(QBBIN)

DC input voltage on pin QBBIN − 2.5 − V

V

O(IBBOUT)

DC output voltage on pin IBBOUT − 2.5 − V

V

O(QBBOUT)

DC output voltage on pin QBBOUT − 2.5 − V