Preliminary specification
File under Integrated Circuits, IC02
June 1994
Philips SemiconductorsPreliminary specification
Three gain control video pre-amplifier for OSDTDA4884
FEATURES
• 85 MHz video controller
• Fully DC controllable
• 3 separate video channels
• Input black level clamping
• White level adjustment for 3 channels
GENERAL DESCRIPTION
The TDA4884 is a monolithic integrated RGB amplifier for
colour monitor systems with super VGA performance,
intended for DC or AC coupling of the colour signals to the
cathodes of the CRT. With special advantages the circuit
can be used in conjunction with the TDA485x monitor
deflection IC family.
• Contrast control for all 3 channels simultaneously
• Cathode feedback to internal reference for cut-off
control, which allows unstabilized video supply voltage
• Current outputs for RGB signal currents
• RGB voltage outputs to external peaking circuits
• Blanking and switch-off input for screen protection
• Sync on green operation possible
• OSD application very easily.
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
P
I
P
V
l(b-w)
V
O(b-w)
positive supply voltage (pin 7)7.28.08.8V
supply current−48−mA
input voltage (black-to-white; pins 2, 5 and 8)−0.71.0V
output voltage (black-to-white; pins 19, 16 and 13)nominal contrast;
−0.79−V
pins 3, 1 and 11
open-circuit
I
O(b-w)
I
M
output current (black-to-white; pins 20, 17 and 14)−50−mA
peak output current (pins 20, 17 and 14)−− 100mA
Bbandwidth−3 dB7085−MHz
G
nom
nominal gain (pins 2, 5 and 8 to pins 19, 16 and 13) nominal contrast;
−1−dB
pins 3, 1 and 11
open-circuit
G
C
C
T
v
v
OSD
amb
gain control for all channels (relative to G
)−5−+2.6dB
nom
contrast controlV6= 1 to 6 V−22−+3.4dB
minimum contrast for OSDV6= 0.7 V−−40−dB
operating ambient temperature−20−+70°C
ORDERING INFORMATION
EXTENDED
TYPE NUMBER
PINSPIN POSITIONMATERIALCODE
PACKAGE
TDA488420DILplasticSOT146
Note
1. SOT146-1; 1996 November 22.
June 19942
(1)
Philips SemiconductorsPreliminary specification
Three gain control video pre-amplifier for OSDTDA4884
Fig.1 Block diagram and basic application circuit for DC and AC coupling.
June 19943
Philips SemiconductorsPreliminary specification
Three gain control video pre-amplifier for OSDTDA4884
PINNING
SYMBOLPINDESCRIPTION
G
C2
V
I1
G
C1
GND4ground
V
I2
C
C
V
P
V
I3
HBL9horizontal blanking, switch-off
CL10input clamping, vertical blanking, test
G
C3
FB
3
V
O3
I
O3
FB
2
V
O2
I
O2
FB
1
V
O1
I
O1
1gain control Channel 2
2signal input Channel 1
3gain control Channel 1
into the TDA4884 (pins 2, 5 and 8) from a low ohmic
source and are clamped to an internal DC voltage (artificial
black level). Composite signals will not disturb normal
operations because an internal clipping circuit cuts all
signal parts below black level. All channels have a
maximum total voltage gain of 7 dB (maximum contrast
and maximum individual channel gain). With the nominal
channel gain of 1 dB and nominal contrast setting the
nominal black-to-white output amplitude is 0.79 V
(p-p)
.
DC voltages are used for contrast and gain control.
Contrast control is achieved by a voltage at pin 6 and
affects the three channels simultaneously. To provide the
correct white point, an individual gain control (pins 3, 1
and 11) adjusts the signals of Channels 1, 2 and 3.
Each output stage provides a current output (pins 20, 17
and 14) and a voltage output (pins 19, 16 and 13). External
cascode transistors reduce power consumption of the IC
and prevent breakdown of the output transistors. Signal
June 19944
output currents and peaking characteristics are
determined by external components at the voltage outputs
and the video supply. The channels have separate internal
feedback loops which ensure large signal linearity and
marginal signal distortion in spite of output transistor
thermal V
variation.
BE
The clamping pulse (pin 10) is used for input clamping
only. The input signals have to be at black level during the
clamping pulse and are clamped to an internal artificial
black level. The coupling capacitors are used in this way
for black level storage. Because the threshold for the
clamping pulse is higher than that for vertical blanking (pin
10) the rise and fall times of the clamping pulse have to be
faster than 75 ns/V during transition from 1 V to 3.5 V.
The vertical blanking pulse will be detected if the input
voltage (pin 10) is higher than the threshold voltage for
approximately 320 ns but does not exceed the threshold
for the clamping pulse in the time between. During the
vertical blanking pulse the input clamping is disabled in
order to avoid misclamping in the event of composite input
signals.
Philips SemiconductorsPreliminary specification
Three gain control video pre-amplifier for OSDTDA4884
The input signal is blanked and the artificial black level is
inserted instead, thus the output signal is at reference
black level. The DC value of the reference black level will
be adjusted by cut-off stabilization (see below).
During horizontal blanking (pin 9) the output signal is set
to reference black level as previously described and
output clamping is activated. If the voltage at pin 9
exceeds the switch-off threshold the signal is blanked
and switched to ultra black level for screen protection and
spot suppression during V-flyback. Ultra black level is the
lowest possible output voltage (at voltage outputs) and
does not depend on cut-off stabilization.
For cut-off stabilization (DC coupling to the CRT)
respectively black level stabilization (AC coupling) the
video signal at the cathode or the coupling capacitor is
divided by an adjustable voltage divider and fed to the
feedback inputs (pins 18, 15 and 12). During the horizontal
blanking time this signal is compared with an internal DC
voltage of approximately 5.8 V. Any difference will lead to
a reference black level correction by charging or
discharging the integrated capacitor which stores the
reference black level information between the horizontal
blanking pulses.
For OSD fast switching of control pin 6 to less than 1 V
(e.g. 0.7 V) blanks the input signals. The OSD signals can
easily be inserted to the external cascode transistor (see
Fig.3).
During test mode (pins 9 and 10 connected to VP) the
black levels at the voltage outputs (pins 12, 16 and 13) are
internally set to typical 0.5 V (3 V DC at signal inputs (pins
2, 5 and 8)).
Fig.3 OSD application.
June 19945
Philips SemiconductorsPreliminary specification
Three gain control video pre-amplifier for OSDTDA4884
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERMIN.MAX.UNIT
V
V
V
I
I
P
T
T
T
V
P
I
ext
O
M
tot
stg
amb
j
ESD
supply voltage (pin 7)08.8V
input voltage (pins 2, 5 and 8)−0.1V
P
V
external DC voltage
pins 20, 17 and 14−0.1V
P
V
pins 19, 16 and 13no external voltages
pins 1, 3, 6 and 11−0.1V
pin 9−0.1V
pin 10−0.1V
P
+ 0.7V
P
+ 0.7V
P
V
average output current (pins 20, 17 and 14; note 1)050mA
peak output current (pins 20, 17 and 14)0100mA
total power dissipation−1200mW
storage temperature−25+150°C
operating ambient temperature−20+70°C
junction temperature−25+150°C
electrostatic handling for all pins (note 2)−500+500V
Notes to the limiting values
1. Signal amplitude of 50 mA black-to-white is possible if the average current (including blanking times and signal
variation against time) does not exceed 50 mA. The maximum power dissipation of 1200 mW has to be considered.
2. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL RESISTANCE
SYMBOLPARAMETERTHERMAL RESISTANCE
R
th j-a
from junction to ambient in free air65 K/W
June 19946
Philips SemiconductorsPreliminary specification
Three gain control video pre-amplifier for OSDTDA4884
CHARACTERISTICS
= 8.0 V; T
V
P
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
P
I
P
Video signal inputs (Channel 1: pin 2, Channel 2: pin 5 and Channel 3: pin 8)
V
I(b-w)
V
IC2,5,8
I
2,5,8
Contrast control (pin 6; note 2)
V
6
V
N6
I
6
C
v
V
M6
Trtracking of output signals of
t
dfC
t
drC
t
fC
t
rC
= +25 °C; all voltages measured to GND (pin 4); unless otherwise specified.
amb
positive supply voltage (pin 7)7.28.08.8V
supply current (pin 7)364860mA
input voltage (black-to-white value;
−0.71.0V
pins 2, 5 and 8)
DC voltage during input clamping
note 12.83.13.4V
(artificial black + VBE)
DC currentno clamping;
V
2,5,8=VIC2,5,8;
T
= −20 to +70 °C
amb
during clamping;
V
2,5,8=VIC2,5,8
± 0.7 V
−0.05+0.05+0.250µA
±50±75±120µA
input voltage1.0−6.0V
maximum input voltage−−V
−1V
P
input voltage for nominal contrastnote 3−4.3−V
input currentV6= 4.3 V−5−1−0.1µA
contrast relative to nominal contrastV6= 6.0 V; pins 3, 1 and
2.43.4−dB
11 open-circuit
V
= 1.0 V; pins 3, 1 and
6
−26−22−19dB
11 open-circuit
input voltage for minimum contrastpins 3, 1 and 11
−0.7−V
open-circuit
1 V < V
< 6 V; note 4−00.5dB
6
Channels 1, 2 and 3
delay between leading edges (falling)
of step in contrast voltage and output
signals at voltage outputs (pins 19,
V6= 4.3 V to 0.7 V;
input fall time at pin 6:
t
= 2 ns; note 5
fCC
−720ns
16 and 13)
delay between trailing edges (rising)
of step in contrast voltage and output
signals at voltage outputs (pins 19,
V6= 0.7 V to 4.3 V;
input rise time at pin 6:
t
= 2 ns; note 5
rCC
−1525ns
16 and 13)
fall time of output signals at voltage
outputs (pins 19, 16 and 13)
rise time of output signals at voltage
outputs (pins 19, 16 and 13)
90% to 10% amplitude;
input fall time at pin 6:
t
= 2 ns; note 5
fCC
10% to 90% amplitude;
input rise time at pin 6:
t
= 2 ns; note 5
rCC
−615ns
−615ns
June 19947
Philips SemiconductorsPreliminary specification
Three gain control video pre-amplifier for OSDTDA4884
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Gain control (pin 3 for Channel 1, pin 1 for Channel 2 and pin 11 for Channel 3; note 6)