Philips TDA4882 Service Manual

INTEGRATED CIRCUITS

DATA SH EET

TDA4882

Advanced monitor video controller for OSD

Preliminary speciﬁcation File under Integrated Circuits, IC02

Philips Semiconductors

December 1994

Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

FEA TURES

• 85 MHz video controller

• Fully DC controllable

• 3 separate video channels

• Input black level clamping

• White level adjustment for 2

channels only

• Brightness control with correct grey scale tracking

• Contrast control for all 3 channels simultaneously

• Cathode feedback to internal reference for cut-off control, which allows unstabilized video supply voltage

• Current outputs for RGB signal currents

• RGB voltage outputs to external peaking circuits

• Blanking and switch-off input for screen protection

• Sync on green operation possible

• OSD application very easily.

GENERAL DESCRIPTION

The TDA4882 is an RGB amplifier for colour monitor systems with super VGA performance, intended for DC or AC coupling of the colour signals to the cathodes of the CRT.

With special advantages the circuit can be used in conjunction with the TDA485X monitor deflection IC family.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V I

I(b-w)

positive supply voltage (pin 7) 7.2 8.0 8.8 V supply current − 48 − mA input voltage (black-to-white;

− 0.7 1.0 V

pins 2, 5 and 8)

O(b-w)

output voltage (black-to-white; pins 19, 16 and 13)

output current (black-to-white;

nominal contrast; pins 3 and 11 open-circuit

− 0.79 − V

− 50 − mA

pins 20, 17 and 14)

peak output current (pins 20,

−−100 mA

17 and 14) B bandwidth −3dB 70 85 − MHz G

nom

∆G gain control difference for

nominal gain (pins 2, 5 and 8

to pins 19, 16 and 13)

nominal contrast; pins 3 and 11 open-circuit

relative to G

nom

− 1 − dB

−5 − +2.6 dB

2 channels C C ∆V

c OSD

contrast control V6= 1 to 6 V −22 − +3.4 dB

minimum contrast for OSD V6= 0.7 V −−40 − dB

brightness control related to

−11 − +34 % nominal output signal amplitude

amb

operating ambient temperature −20 − +70 °C

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA4882 DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1

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Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

BLOCK DIAGRAM

handbook, full pagewidth

10 kΩ

brightness

control

signal

22 nF

input

75 Ω

10 MΩ

10 kΩ

gain control

signal

22 nF

input

75 Ω

10 MΩ

10 kΩ

contrast control

VP = 8 V

VOLTAGE

CONVERTER

CLAMP

CLIPPING

VOLTAGE

CONVERTER

CLAMP

CLIPPING

REF

GAIN

VOLTAGE

CONVERTER

CHANNEL 1

CHANNEL 2

TDA4882

6.2 V

current output

voltage output

33 Ω 33 Ω

feedback

current output

voltage output

33 Ω 33 Ω

feedback

BFQ235

1.5 kΩ

68 kΩ

6.8 kΩ

1.5 kΩ

BFQ236

1 kΩ

BFQ256

10 Ω

15 kΩ

10 Ω

BAV21

= 90 V

CRT

220 Ω

8 V

10 kΩ

cut-off control

= 90 V

CRT

BAV21

220 Ω

68 kΩ

15 kΩ

6.8 kΩ

40 MHz

8 V

10 kΩ cut-off

control

25 MHz

CRT

60 MHz

22 nF

10 MΩ

input clamping

blanking

CLAMP

CLIPPING

VOLTAGE

CONVERTER

PULSE

DECODER

CHANNEL 3

test mode ultra black

output clamping

5.8 V 11

signal input

75 Ω

horizontal blanking switch off

clamping pulse vertical blanking test mode

Fig.1 Block diagram and basic application circuit for DC and AC coupling.

December 1994 3

current output

voltage output

18 Ω

feedback

10 kΩ

18 Ω

gain control

BFQ235

860 Ω

10 Ω

1 kΩ

10 Ω

BFQ256

10 kΩ

horizontal blanking

BFQ236

47 nF

= 65 V

CRT

BAV21

100 Ω

93 kΩ

CRT

10 kΩ

cut-off control

MED910

Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

PINNING

SYMBOL PIN DESCRIPTION

GND 4 ground V

HBL 9 horizontal blanking, switch-off CL 10 input clamping, vertical blanking, test mode G

1 brightness control 2 signal input Channel 1 3 gain control Channel 1

5 signal input Channel 2 6 contrast control, OSD switch 7 supply voltage 8 signal input Channel 3

11 gain control Channel 3 12 feedback Channel 3 13 voltage output Channel 3 14 current output Channel 3 15 feedback Channel 2 16 voltage output Channel 2 17 current output Channel 2 18 feedback Channel 1 19 voltage output Channel 1 20 current output Channel 1

GND

HBL

TDA4882

10 11

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION

The RGB input signals 0.7 V (p-p) are capacitively coupled into the TDA4882 (pins 2, 5 and 8) from a low ohmic source and are clamped to an internal DC voltage (artificial black level). Composite signals will not disturb normal operations because an internal clipping circuit cuts all signal parts below black level. Channels 1 and 3 have a maximum total voltage gain of 7 dB (maximum contrast and maximum individual channel gain), Channel 2 of 4.4 dB (maximum contrast and nominal gain). With the nominal channel gain of 1 dB and nominal contrast setting the nominal black-to-white output amplitude is

0.79 V (p-p).

DC voltages are used for brightness, contrast and gain control.

Brightness control yields a simultaneous signal black level shift of the three channels relative to a reference black level. For nominal brightness (pin 1 open-circuit) the signal black level is equal to the reference black level. Contrast control is achieved by a voltage at pin 6 and affects the three channels simultaneously. To provide the correct white point, an individual gain control (pins 3 and 11) adjusts the signals of Channels 1 and 3 compared to the reference Channel 2. Gain setting changes contrast as well as brightness to achieve correct grey scale tracking.

Eachoutput stage provides a current output (pins 20, 17 and 14) and a voltage output (pins 19, 16 and 13). External cascode transistors reduce power consumption of the IC and prevent breakdown of the output transistors. Signal output currents and peaking characteristics are determined by external components at the voltage outputs and the video supply. The channels have separate internal feedback loops which ensure large signal linearity and marginal signal distortion in spite of output transistor thermal V

variation.

The clamping pulse (pin 10) is used for input clamping only. The input signals have to be at black level during the clamping pulse and are

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Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

clamped to an internal artificial black level. The coupling capacitors are used in this way for black level storage. Because the threshold for the clamping pulse is higher than that for vertical blanking (pin 10) the rise and fall times of the clamping pulse have to be faster than 75 ns/V during transition from 1 V to 3.5 V.

The vertical blanking pulse will be detected if the input voltage (pin 10) is higher than the threshold voltage for approximately 320 ns but does not exceed the threshold for the clamping pulse in the time between. During the vertical blanking pulse the input clamping is disabled in order to avoid misclamping in the event of composite input signals. The input signal is blanked and the artificial black level is inserted instead. Additionally the brightness is internally set to its nominal value, thus the output signal is at reference black

level. The DC value of the reference black level will be adjusted by cut-off stabilization (see below).

During horizontal blanking (pin 9) the output signal is set to reference black level as previously described and output clamping is activated. If the voltage at pin 9 exceeds the switch-off threshold the signal is blanked and switched to ultra black level for screen protection and spot suppression during V-flyback. Ultra black level is the lowest possible output voltage (at voltage outputs) and does not depend on cut-off stabilization.

For cut-off stabilization (DC coupling to the CRT) respectively black level stabilization (AC coupling) the video signal at the cathode or the coupling capacitor is divided by an adjustable voltage divider and fed to the feedback inputs

(pins 18, 15 and 12). During horizontal blanking time this signal is compared with an internal DC voltage of approximately 5.8 V. Any difference will lead to a reference black level correction by charging or discharging the integrated capacitor which stores the reference black level information between the horizontal blanking pulses.

For OSD fast switching of control pin 6 to less than 1 V (e.g. 0.7 V) blanks the input signals. The OSD signals can easily be inserted to the external cascode transistor (see Fig.3).

During test mode (pins 9 and 10 connected to VP) the black levels at the voltage outputs (pins 19, 16 and

13) are internally set to typical 0.5 V nominal brightness, 3 V DC at signal inputs (pins 2, 5 and 8).

OSD

fast blanking

1 kΩ

4.7 kΩ

100 pF

contrast

PH2222

Channel 1

Channel 2

current output

TDA4882

Fig.3 OSD application.

150 Ω

BFQ235

PH2222

Channel 3

220 Ω

depending on channel gain 1 kΩ to 10 kΩ

OSD signal input

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Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

ext

O(AV)

tot

stg

amb

ESD

supply voltage (pin 7) 0 8.8 V input voltage (pins 2, 5 and 8) −0.1 V

external DC voltage

pins 20, 17 and 14 −0.1 V

V pins 19, 16 and 13 no external voltages pins 1, 3, 6 and 11 −0.1 V pin 9 −0.1 V pin 10 −0.1 V

+ 0.7 V

average output current (pins 20, 17 and 14; note 1) 0 50 mA peak output current (pins 20, 17 and 14) 0 100 mA total power dissipation − 1200 mW storage temperature −25 +150 °C operating ambient temperature −20 +70 °C junction temperature −25 +150 °C electrostatic handling for all pins (note 2) −500 +500 V

Notes

1. Signal amplitude of 50 mA black-to-white is possible if the average current (including blanking times and signal variation against time) does not exceed 50 mA. The maximum power dissipation of 1200 mW has to be considered.

2. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

thj-a

thermal resistance from junction to ambient in free air 65 K/W

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Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

CHARACTERISTICS

= 8.0 V; T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Video signal inputs (Channel 1: pin 2, Channel 2: pin 5 and Channel 3: pin 8)

I(b-w)

I(cl)2, 5, 8

I2, 5, 8

Brightness control (pin 1); note 2; see Fig.5 V

1(nom)

∆V

= +25 °C; all voltages measured to GND (pin 4); note 1; see also Fig.4; unless otherwise speciﬁed.

amb

supply voltage (pin 7) 7.2 8.0 8.8 V supply current (pin 7) 36 48 60 mA

input voltage

− 0.7 1.0 V (black-to-white value; pins 2, 5 and 8)

DC voltage during input

2.8 3.1 3.4 V clamping (artiﬁcial black + VBE)

DC input current no clamping;

I2, 5, 8=VI(cl)2, 5, 8

= −20 to +70 °C

amb

during clamping; V

I2, 5, 8=VI(cl)2, 5, 8

;

± 0.7 V

−0.05 +0.05 +0.250 µA

±50 ±75 ±120 µA

input voltage 1.0 − 6.0 V input resistance 40 50 60 kΩ input voltage for nominal

pin 1 open-circuit 2.0 2.25 2.5 V

brightness black level voltage change

at voltage outputs referred to reference black level during output clamping

V1= 1.0 V −13 −11 −9.5 % V

=6.0V 303437%

pin 1 open-circuit −−0.8 %

(V9> 1.6 V) related to output signal amplitude with nominal 0.7 V (p-p) input signal and nominal contrast (V6= 4.3 V) for any gain setting

difference of ∆Vbl between

− 0 ±1.2 % any two channels

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Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Contrast control (pin 6); note 3; see Fig.6

6(max)

6(nom)

6(min)

dfC

drC

Gain control (pin 3 for Channel 1 and pin 11 for Channel 3); Fig.8; note 7 V

3, 11

3, 11(nom)

3, 11

∆G gain control difference

input voltage 1.0 − 6.0 V maximum input voltage −−V input voltage for nominal

note 4 − 4.3 − V

−1V

contrast input current V6= 4.3 V −5 −1 −0.1 µA contrast relative to nominal

contrast

V6= 6.0 V; pins 3 and 11 open-circuit

= 1.0 V; pins 3 and 11

2.4 3.4 − dB

−26 −22 −19 dB

open-circuit

input voltage for minimum

pins 3 and 11 open-circuit − 0.7 − V

contrast tracking of output signals

1V<V6<6 V; note 5 − 0 0.5 dB

of Channels 1, 2 and 3 delay between leading

edges (falling) of step in contrast voltage and output

V6= 4.3 V to 0.7 V; input fall time at pin 6: t

= 2 ns; Fig.7; note 6

fCC

− 720ns

signals at voltage outputs (pins 19, 16 and 13)

delay between trailing edges (rising) of step in contrast voltage and output

V6= 0.7 V to 4.3 V; input rise time at pin 6: t

= 2 ns; Fig.7; note 6

rCC

− 15 25 ns

signals at voltage outputs (pins 19, 16 and 13)

fall time of output signals at voltage outputs (pins 19, 16 and 13)

rise time of output signals at voltage outputs (pins 19, 16 and 13)

90% to 10% amplitude; input fall time at pin 6: t

= 2 ns; Fig.7; note 6

fCC

10% to 90% amplitude; input rise time at pin 6: t

= 2 ns; Fig.7; note 6

rCC

− 615ns

input voltage 1.0 − 6.0 V input voltage for nominal

pins 3 and 11 open-circuit 3.6 3.75 3.95 V

gain input resistance 44 55 66 kΩ

V relative to nominal gain (Channels 1 and 3 only)

= 4.3 V; V

= 6 V 2 2.6 3.3 dB

3, 11

=1V −5.5 −5 −4.5 dB

3, 11

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Philips Semiconductors Preliminary speciﬁcation

Advanced monitor video controller for OSD TDA4882

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Feedback input (Channel 1: pin 18, Channel 2: pin 15 and Channel 3: pin 12); Fig.9; note 8

ref

O18, 15, 12(max)

∆V

bl(CRT)

∆V

ref(T)

∆V

ref(VP)

Voltage outputs (Channel 1: pin 19, Channel 2: pin 16 and Channel 3: pin 13)

O(b-w)

blx(max)

bl(SO)

bl(TST)

S/N signal-to-noise ratio note 11 − 50 44 dB d

O(th)

∆V

bl(ﬂ)

off

∆V

O(b-w)(T)

Current outputs (Channel 1: pin 20, Channel 2: pin 17 and Channel 3: pin 14); note 14 I

O(b-w)

; V

20-19

14-13

bl(SO)

17-16

internal reference voltage 5.6 5.8 6.1 V maximum output current during output clamping;

18, 15, 12

=3V

−500 −100 −60 nA

black level variation at CRT note 9 0 40 200 mV variation of V

in the

ref

= −20 to +70 °C 0 20 50 mV

amb

temperature range variation of V

with supply

ref

7.2 V ≤ VP≤ 8.8 V 0 60 100 mV

voltage

nominal signal output voltage

pins 3 and 11 open-circuit;

V6= 4.3 V; V

I(b-w)

= 0.7 V

0.69 0.79 0.89 V

(black-to-white value) maximum adjustable black

level voltage black level voltage during

switch-off, equal to

during output clamping;

= −20 to +70 °C

amb

V9=VP; RO=33Ω;

= −20 to +70 °C

amb

1 1.2 1.4 V

30 45 100 mV

minimum adjustable black level voltage

black level voltage during test mode

output thermal distortion I black level variation

V9=VP; V10=VP; pin 1

0.3 0.7 1.2 V open-circuit; V

I2, 5, 8=VI(cl)2, 5, 8

= 50 mA; note 12 − 0.6 1 %

O(b-w)

; note 10

line frequency 30 kHz − 0.5 4.5 mV

between clamping pulses maximum offset during

sync clipping variation of nominal output

signal (black-to-white value) with temperature

output current (black-to-white value)

;

start of HF-saturation voltage of output transistors

output current during

I2, 5, 8

< V

I(cl)2, 5, 8

; Fig.10;

0 7 15 mV

note 13 pins 3 and 11 open-circuit;

V6= 4.3 V; V T

= −20 to +70 °C

amb

I(b-w)

= 0.7 V;

0 2.5 10 %

− 50 − mA with peaking −−100 mA IO=50mA −−2.0 V I

= 100 mA −−2.2 V

V9=VP; RO=33Ω 0 20 900 µA

switch-off

December 1994 9

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