Philips pcf8591 DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
PCF8591
8-bit A/D and D/A converter
Preliminary specification
File under Integrated Circuits, IC01
September 1991
Philips Semiconductors Preliminary specification
8-bit A/D and D/A converter PCF8591
FEATURES
• Single power supply
• Operating supply voltage 2,5 V to 6 V
• Low standby current
• Serial input/output via I2C bus
• Address by 3 hardware address pins
• Sampling rate given by I2C bus speed
• 4 analogue inputs programmable as single-ended or
differential inputs
• Auto-incremented channel selection
• Analogue voltage range from VSS to V
• On-chip track and hold circuit
• 8-bit successive approximation A/D conversion
• Multiplying DAC with one analogue output.
APPLICATIONS
Closed loop control systems; low power converter for
remote data acquisition; battery operated equipment;
acquisition of analogue values in automotive, audio and
TV applications.
DD
GENERAL DESCRIPTION
The PCF8591 is a single chip, single supply low power
8-bit CMOS data acquisition device with four analogue
inputs, one analogue output and a serial I2C bus interface.
Three address pins A0, A1 and A2 are used for
programming the hardware address, allowing the use of
up to eight devices connected to the I2C bus without
additional hardware. Address, control and data to and from
the device are transferred serially via the two-line
bidirectional bus (I2C).
The functions of the device include analogue input
multiplexing, on-chip track and hold function, 8-bit
analogue-to-digital conversion and an 8-bit
digital-to-analogue conversion. The maximum conversion
rate is given by the maximum speed of the I2C bus.
PACKAGE OUTLINES
PCF8591P:16-lead DIL; plastic (SOT38); SOT38-1; 1996 August 28.
PCF8591T:16-lead mini-pack; plastic (SO16L; SOT162A); SOT162-1; 1996 August 28.
September 1991 2
Philips Semiconductors Preliminary specification
8-bit A/D and D/A converter PCF8591
September 1991 3
Fig.1 Block diagram.
Philips Semiconductors Preliminary specification
8-bit A/D and D/A converter PCF8591
PINNING
1. AINO
2. AIN1
3. AIN2
4. AIN3
5. A0
7. A2
8. V
SS
9. SDA I
10. SCL I
11. OSC oscillator input/output
12. EXT external/internal switch for oscillator
13. AGND analogue ground
14. V
REF
15. AOUT analogue output (D/A converter)
16. V
DD
analogue inputs
(A/D converter)
hardware address6. A1
negative supply voltage
2
C bus data input/output
2
C bus clock input/output
input
voltage reference input
positive supply voltage
Fig.2 Pinning diagram.
September 1991 4
Philips Semiconductors Preliminary specification
8-bit A/D and D/A converter PCF8591
FUNCTIONAL DESCRIPTION
Addressing
2
Each PCF8591 device in an I
of a fixed part and a programmable part. The programmable part must be set according to the address pins A0, A1 and
A2. The address always has to be sent as the first byte after the start condition in the I2C bus protocol. The last bit of the
address byte is the read/write-bit which sets the direction of the following data transfer (see Figs 3, 11 and 12).
Control byte
C bus system is activated by sending a valid address to the device. The address consists
Fig.3 Address byte.
The second byte sent to a PCF8591 device will be stored in its control register and is required to control the device
function.
The upper nibble of the control register is used for enabling the analogue output, and for programming the analogue
inputs as single-ended or differential inputs. The lower nibble selects one of the analogue input channels defined by the
upper nibble (see Fig.4). If the auto-increment flag is set the channel number is incremented automatically after each A/D
conversion.
If the auto-increment mode is desired in applications where the internal oscillator is used, the analogue output enable
flag in the control byte (bit 6) should be set. This allows the internal oscillator to run continuously, thereby preventing
conversion errors resulting from oscillator start-up delay. The analogue output enable flag may be reset at other times to
reduce quiescent power consumption.
The selection of a non-existing input channel results in the highest available channel number being allocated. Therefore,
if the auto-increment flag is set, the next selected channel will be always channel 0. The most significant bits of both
nibbles are reserved for future functions and have to be set to 0. After a power-on reset condition all bits of the control
register are reset to 0. The D/A converter and the oscillator are disabled for power saving. The analogue output is
switched to a high impedance state.
September 1991 5
Philips Semiconductors Preliminary specification
8-bit A/D and D/A converter PCF8591
September 1991 6
Fig.4 Control byte.
Philips Semiconductors Preliminary specification
8-bit A/D and D/A converter PCF8591
D/A conversion
The third byte sent to a PCF8591 device is stored in the DAC data register and is converted to the corresponding
analogue voltage using the on-chip D/A converter. This D/A converter consists of a resistor divider chain connected to
the external reference voltage with 256 taps and selection switches. The tap-decoder switches one of these taps to the
DAC output line (see Fig.5).
The analogue output voltage is buffered by an auto-zeroed unity gain amplifier. This buffer amplifier may be switched on
or off by setting the analogue output enable flag of the control register. In the active state the output voltage is held until
a further data byte is sent.
The on-chip D/A converter is also used for successive approximation A/D conversion. In order to release the DAC for an
A/D conversion cycle the unity gain amplifier is equipped with a track and hold circuit. This circuit holds the output voltage
while executing the A/D conversion.
The output voltage supplied to the analogue output AOUT is given by the formula shown in Fig.6. The waveforms of a
D/A conversion sequence are shown in Fig.7.
September 1991 7
Fig.5 DAC resistor divider chain.
Philips Semiconductors Preliminary specification
8-bit A/D and D/A converter PCF8591
Fig.6 DAC data and d.c. conversion characteristics.
September 1991 8
Fig.7 D/A conversion sequence.
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