INTEGRATED CIRCUITS
DATA SH EET
PCD509x2/zuu/v family
Low cost; low power DECT
baseband controllers (ABC-PRO)
Objective specification
File under Integrated Circuits, IC17
1998 Apr 27
Philips Semiconductors Objective specification
Low cost; low power DECT baseband
controllers (ABC-PRO)
CONTENTS
1 FEATURES
2 GENERAL DESCRIPTION
3 ORDERING INFORMATION
4 BLOCK DIAGRAM
5 PINNING INFORMATION
5.1 Pinning
5.2 Pin description
6 FUNCTIONAL DESCRIPTION
6.1 DECT baseband controller system
7 PACKAGE OUTLINES
8 SOLDERING
8.1 Introduction
8.2 Reflow soldering
8.3 Wave soldering
8.4 Repairing soldered joints
9 DEFINITIONS
10 LIFE SUPPORT APPLICATIONS
11 PURCHASE OF PHILIPS I2C COMPONENTS
PCD509x2/zuu/v family
1998 Apr 27 2
Philips Semiconductors Objective specification
Low cost; low power DECT baseband
controllers (ABC-PRO)
1 FEATURES
• The PCD50912 is designed for GAP compatible DECT
handsets
• The PCD50922 is designed for GAP compatible DECT
base stations serving up to six handsets
• Fully static 80C51 microcontroller
• Emulation supported for 80C51 program development
• Four 8-bit ports (P0, P1, P2 and P3), 32 I/O lines
• Dedicated port pins for keyboard, I2C-bus, interrupt
sources and/or external memory
• Fifteen interrupt sources (including those from TICB,
BML and DSP) with two priority levels
2
C-bus interface
• I
• UART with IrDA-compatible Data Transmission Mode
• 256 bytes of microcontroller main RAM
• 3 kbytes of microcontroller AUX RAM
• 1 kbyte of shared System Data RAM
• 64 kbytes of mask programmable ROM
• 128 kbyte address space for external ROM access,
maximum 192 kbytes together with internal ROM
• 128 kbytes of external RAM addressable
• Embedded DSP with 6.912, 13.824 or 27.648 Mips
• Speech and IOM-2 interface
• BML for TDMA frame (de)multiplexing. Transmission or
reception can be programmed for any slot
• Ciphering, scrambling, CRC checking/generation,
protected B-fields
• Local call and B-field loop-back
• Automatic receiver delay adjustment programmable per
slot to correct for terminal mobility
• Phase error measurement and phase error correction by
hardware
• Serial interface to synthesizer for frequency
programming
• Programmable timing and polarity of radio-control
signals
• Easy interfacing with radio circuits, operating at different
supply voltages
• GMSK pulse shaper with two different pulse shapes
(BT = 0.5 and BT = 0.8)
PCD509x2/zuu/v family
• Comparator for use as bit-slicer
• 3 channel time-multiplexed 8-bit ADC for RSSI, battery
and general input voltage measurement
• Battery management supported by programmable
current source for temperature or charge current
measurement
• On-chip 8-bit DAC for various purposes
• Low power crystal oscillator at 13.824 MHz
• Programmable on-chip capacitors for frequency
adjustment to 13.824 MHz with large pulling range
• High performance DAC and ADC for dynamic earpiece
and dynamic or electret microphone
• Analog-to-digital path switchable sensitivity for
microphone or line interface input
• On-chip reference voltage and supply for electret
microphone
• Very low ohmic buzzer output
• Pulse density modulated or pulse width modulated
buzzer output signal
• Power-on-reset
• Low power operation optimized for 2 battery cells in
handset
• Long standby time due to reduced digital supply voltage
and reduced activity in idle-locked mode
• Flexible supply voltage concept due to use of level
shifters between each supply voltage domain
• Eight independent supply voltage domains:
– 1.8 to 3.6 V for digital core, microcontroller ports P0
and P2, and also P1 and P3
– 1.8 to 3.6 V for buzzer, oscillator and battery
– 2.7 to 3.6 V for RF interface and analog circuits
• CMOS technology
• Small and flat LQFP80 package.
1998 Apr 27 3
Philips Semiconductors Objective specification
Low cost; low power DECT baseband
controllers (ABC-PRO)
2 GENERAL DESCRIPTION
The PCD509x2 family is designed for low power GAP
compatible DECT handset (PP) and base station (FP)
applications. The circuit includes the audio interface, the
DSP, the microcontroller and the Burst Mode Logic, and
contains all functionality to convert speech and data
signals from/to the analog side (microphone and earpiece
or line interface circuit) to/from the radio side
(1.152 Mbits/s data).
This circuit is a member of the ABC family, where A stands
for ‘ADPCM codec’, B for ‘Burst Mode Logic’ and C for
‘microController’. The name ABC-PRO stands for
PROfessional ABC.
The PCD509x2/zuu/v contains on-chip ROM for the
embedded DSP code and on-chip ROM for the embedded
microcontroller code. It is these ROM codes that
differentiate between various chip derivatives. For each
DSP code a separate DSP user manual is published.
Please contact Philips Semiconductors for more
information.
PCD509x2/zuu/v family
This family specification contains the hardware description
that is independent of the used ROM codes.
The numerical digit ‘x’ in PCD509x2 determines the
intended application area (e.g. PCD50912 for use in
handsets or PCD50922 for use in simple base stations,
etc.). The last numerical digit ‘2’ is used to denote
hardware derivatives. The extension digits ‘z’ (A to Z) and
‘uu’ (00 to 99) denote the DSP and the microcontroller
software version, respectively. The extension ‘v’ denotes
the hardware version updates of the circuit.
Although the microcontroller ROM code is present on-chip,
an external program memory for the microcontroller code
can be used. This is not the case for the DSP ROM code
which is fixed by the chip version.
Throughout this family specification the term PCD509x2 is
used to cover all sub types and versions. If any specific
feature or parameter is connected to a certain sub type or
version this will be specifically written. Until otherwise
stated this family specification is valid for hardware
version 1 (v = 1).
3 ORDERING INFORMATION
TYPE
NUMBER
PCD50912H LQFP80 plastic low profile quad flat package; 80 leads; body 12 × 12 × 1.4 mm SOT315-1
PCD50922H
NAME DESCRIPTION VERSION
PACKAGE
1998 Apr 27 4
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1998 Apr 27 5
P0 P2 P3
ROM
(64 kBYTES)
BURST
MODE
LOGIC
(BML)
CLOCK
(CLG)
TIMING
CONTROL
BLOCK
(TICB)
TIMER
(WDT)
8
LEVEL SHIFTER
PORT 0
AB-MICROCONTROLLER
CONTROLLER
INTERFACE (ABCIF)
ISB BUS
8 8 8
LEVEL SHIFTER
PORT 2
ISB
(IBC)
GENERATOR
AUX-RAM
(3 kBYTES)
V
DDD
RESET
(RGE)
(1 kBYTE)
SYSTEM
DATA
RAM
(SDR)
DIGITAL
CONTROL
ANALOG
OF
(DCA)
MICROCONTROLLER-RAM
ANT_SW0
ANT_SW1
T_ENABLE
T_PWR
GPP
S_ENABLE
S_DATA
S_CLK
S_PWR
R_ENABLE
R_PWR
SLICE_CTR
REF_CLK
R_DATAP
R_DATAM
T_GSMK/
T_DATA
XTAL1
XTAL2
V
DD(P0, P2)
V
DD(RF)
V
DD(OSC)
ALE A16
PSEN
EA
LEVEL
DDD
AGM
SHIFTER
80CL51 CORE
V
DDD
LEVEL
SHIFTER
V
DDD
LEVEL
SHIFTER
GENERATOR
WATCHDOG
V
(1)
P1
LEVEL SHIFTER
PORT 1
(256 BYTES)
V
DDD
DIGITAL
SIGNAL
PROCESSOR
(DSP)
MEMORY
V
DD(BAT)
LEVEL
SHIFTER
k, full pagewidth
(1)
LEVEL SHIFTER
PORT 3
IB BUS
I2C-BUS UART
MICROCONTROLLER
V
DDD
LEVEL
SHIFTER
ANALOG VOLTAGE
REFERENCE
(AVR)
POWER-ON-RESET
(POR)
DIGITAL
DIGITAL
PULSE
PULSE
SHAPER
SHAPER
(DPS)
(DPS)
DIGITAL
NOISE
SHAPER
(DNS)
DIGITAL
DECIMATING
FILTER
(DDF)
V
DDA
ANALOG
VOLTAGE
SOURCE
(AVS)
RECEIVE
V
ref
V
DD(P1, P3)
DIGITAL
FILTER
(DRF)
AUXILIARY
ADC
(AAD)
V
DDD
SPEECH
INTERFACE
IOM
ADPCM
(SPI)
V
DD(BZ)
LEVEL
LEVEL
SHIFTER
SHIFTER
LEVEL
SHIFTER
V
ADJUSTABLE CURRENT SOURCE (ACS)
BUZZER BUFFER
(ABB)
1-BIT DAC (ARD)
CODEC
Σ ∆
1-BIT ADC
ATS
DDA
ANALOG SWITCH (ASW)
ANALOG SUBTRACTOR (ASU)
ANALOG RSSI TREATMENT (ART)
PCD509x2
AMP
digital pins
analog pins
supply pins
V
DDD
V
SSD
V
DD(P1, P3)
V
DD(P0, P2)
V
SS(P0, P2)
V
DD(BZ)
V
SS(BZ)
V
DD(RF)
V
SS(RF)
V
DDA
V
SSA
V
DD(OSC)
V
SS(OSC)
V
DD(BAT)
BZP
BZM
EARP
EARM
MICP/LIFM
MICM/LIFP
V
ref
V
DD(BAT)
RSSI_AN
VANLI
4 BLOCK DIAGRAM
Low cost; low power DECT baseband
controllers (ABC-PRO)
PCD509x2/zuu/v family
Philips Semiconductors Objective specification
(1) Ports 1 and 3 are shared with alternative functions.
M_RESET
VBGP
Fig.1 Block diagram.
VANLO
MGM858