• Two test inputs, one of which also serves as the external
interrupt input
• DTMF, modem, musical tone generator
• Reference for supply and temperature-independent
tone output
• Filtering for low output distortion (CEPT compatible)
• Melody output for ringer application
• Programmable DTMF clock divider
• Power-on-reset
• Stop and Idle modes
PCD3350A
• Supply voltage: 1.8 to 6 V (DTMF tone output and
EEPROM erase/write from 2.5 V)
• CPU clock frequency: 1 to 16 MHz (3.58 MHz or
10.74 MHz for DTMF)
• Operating ambient temperature: −25 to +70 °C
• Manufactured in silicon gate CMOS process.
2GENERAL DESCRIPTION
This data sheet details the specific properties of the
PCD3350A. The shared properties of the PCD33xxA
family of microcontrollers are described in the
data sheet, which should be read in conjunction
family”
with this publication.
The PCD3350A is a microcontroller designed primarily for
telephony applications. It includes 8 kbytes ROM,
256 bytes RAM, 34 I/O lines, and an on-chip generator for
dual tone multifrequency (DTMF), modem and musical
tones. In addition to dialling, the generated frequencies
can be made available as square waves for melody
generation, providing ringer operation.
The PCD3350A also incorporates 256 bytes of EEPROM,
permitting data storage without battery backup. The
EEPROM can be used for storing telephone numbers,
particularly for implementing redial functions.
Finally, the PCD3350A includes a low power 32 kHz
crystal oscillator with an EEPROM programmable
Real-Time Clock (RTC) working in standby mode.
The instruction set is similar to that of the MAB8048 and is
a sub-set of that listed in the
sheet.
1. Please refer to the Order Entry Form (OEF) for this device for the full type number to use when ordering. This type
number will also specify the required program and the ROM mask options.
1996 Dec 183
PACKAGE
SOT205-1
Philips SemiconductorsProduct specification
8-bit microcontroller with DTMF generator,
256 bytes EEPROM and real-time clock
4BLOCK DIAGRAM
WORD
STATUS
PROGRAM
LOWER
COUNTER
PROGRAM
HIGHER
COUNTER
PROGRAM
EVENT
TIMER/
COUNTER
32
T1
CONTROL
REGISTER
& MELODY
DTMF-CLOCK
LGF
REGISTER
HGF
REGISTER
6
88
8
58888
8
8
88
8
8
8
8
8
8
8
8
8
8
8
8
8
4
8
6
BUFFER
DER. PORT 0
DP0.0/RCO to DP0.5
8
PORT 0
BUFFER
P0.0 to P0.7
ROM
8 kbytes
RESIDENT
PCD3350A
PORT 1
BUFFER
P1.0 to P1.7/MDY
8
BUFFER
DER. PORT 1
DP1.0 to DP1.7/DCO
DTMF
f
TONE
FILTER
48
PORT 2
BUFFER
P2.0 to P2.3
FLIP-FLOP
DER. PORT 0
PORT 0
FLIP-FLOP
DECODE
PORT 1
FLIP-FLOP
FLIP-FLOP
DER. PORT 1
PORT 2
FLIP-FLOP
BANK
MEMORY
FLIP-FLOPS
FREQ.
CLOCK
INTERNAL
SINE WAVE
GENERATOR
30
REGISTER
FREQUENCY
ADJUSTMENT
CLOCK
CONTROL
REGISTER
REGISTER 0
REGISTER 1
REGISTER 2
MULTIPLEXER
RAM
ADDRESS
REGISTER
REGISTER 1
TEMPORARY
timer interrupt
ACCUMULATOR
LOGIC
INTERRUPT
DATA
EEPROM
TRANSFER
EEPROM
ADDRESS
REGISTER
EEPROM
CONTROL
REGISTER
TIMER 2
REGISTER
TIMER 2
RELOAD
REGISTER
REAL-TIME CLOCK
REGISTER 3
REGISTER 4
REGISTER 5
AND
REGISTER
INSTRUCTION
ARITHMETIC
interrupt
derivative
DIVIDER CHAIN
REGISTER 6
REGISTER 7
8 LEVEL STACK
(VARIABLE LENGTH)
DECOD
DECODER
LOGIC UNIT
REGISTER 2
TEMPORARY
EEPROM
REAL-TIME CLOCK
32 kHz OSCILLATOR
RTC1RTC2
DATA STORE
REGISTER BANK
OPTIONAL SECOND
E
FLAG
T1
CE/T0
TIMER
BRANCH
CONDITIONAL
ADJUST
DECIMAL
RTC interrupt
external interrupt
256 bytes
POR
V
POWER-ON-RESET
256 bytes
RESIDENT RAM ARRAY
TEST
ACC BIT
ACC
CARRY
LOGIC
XTAL2XTAL1RESET
CONTROL AND TIMING
CE/T0
IDLE
STOP
RESET
PCD3350A
MED263
OSCILLATOR
handbook, full pagewidth
Fig.1 Block diagram.
INTERRUPT INITIALIZE
1996 Dec 184
Philips SemiconductorsProduct specification
8-bit microcontroller with DTMF generator,
256 bytes EEPROM and real-time clock
5PINNING INFORMATION
5.1Pinning
handbook, full pagewidth
P1.6
P1.7/MDY
43
42
P1.5
P1.4
41
40
PCD3350AH
P2.1
P2.2
P2.3
DP0.0/RCO
DP0.1
DP0.2
DP0.3
DP0.4
DP0.5
RTC1
RTC2
P2.0
44
1
2
3
4
5
6
7
8
9
10
11
P1.3
39
PCD3350A
SS
DD
TONE
V
38
37
P1.1
V
P1.2
36
35
34
33
P1.0
P0.7
32
31
P0.6
30
P0.5
P0.4
29
28
XTAL2
XTAL1
27
P0.3
26
P0.2
25
24
P0.1
P0.0
23
12
13
14
15
16
T1
CE/T0
DP1.0
RESET
DP1.1
Fig.2 Pin configuration.
17
DP1.2
18
DP1.3
19
DP1.4
20
DP1.5
21
DP1.6
22
MED264
DP1.7/DCO
1996 Dec 185
Philips SemiconductorsProduct specification
8-bit microcontroller with DTMF generator,
PCD3350A
256 bytes EEPROM and real-time clock
5.2Pin description
Table 1 SOT205-1 package (for information on parallel I/O ports, see Chapter 14)
SYMBOLPINTYPEDESCRIPTION
P2.1 to P2.31 to 3I/O3 bits of Port 2: 4-bit quasi-bidirectional I/O port
DP0.0/RCO4I/O1 bit of Derivative Port 0: 6-bit quasi-bidirectional I/O port; or RTC output
DP0.1 to DP0.55 to 9I/O5 bits of Derivative Port 0: 6-bit quasi-bidirectional I/O port
RTC110IReal Time Clock 32 kHz oscillator input
RTC211OReal Time Clock 32 kHz oscillator output
CE/
T012IChip Enable or Test 0 input
T113ITest 1/count input of 8-bit Timer/event counter 1
RESET14Ireset input
DP1.0 to DP1.615 to 21I/O7 bits of Derivative Port 1: 8-bit quasi-bidirectional I/O port
DP1.7/DCO22I/O1 bit of Derivative Port 1: 8-bit quasi-bidirectional I/O port; or DTMF clock
output
P0.0 to P0.323 to 26I/O4 bits of Port 0: 8-bit quasi-bidirectional I/O port
XTAL127Icrystal oscillator/external clock input
XTAL228Ocrystal oscillator output
P0.4 to P0.729 to 32I/O4 bits of Port 0: 8-bit quasi-bidirectional I/O port
P1.0 to P1.233 to 35I/O3 bits of Port 1: 8-bit quasi-bidirectional I/O port
V
SS
TONE37ODTMF output
V
DD
P1.3 to P1.639 to 42I/O4 bits of Port 1: 8-bit quasi-bidirectional I/O port
P1.7/MDY43I/O1 bit of Port 1: 8-bit quasi-bidirectional I/O port; or melody output
P2.044I/O1 bit of Port 2: 4-bit quasi-bidirectional I/O port
36Pground
38Ppositive supply voltage
1996 Dec 186
Philips SemiconductorsProduct specification
8-bit microcontroller with DTMF generator,
PCD3350A
256 bytes EEPROM and real-time clock
6FREQUENCY GENERATOR
A versatile frequency generator section with built-in
programmable clock divider is provided (see Fig.3).
The clock divider allows the DTMF section to run either
with the main clock frequency (f
of it (f
DTMF
=1⁄3× f
) depending on the state of the divider
xtal
DTMF=fxtal
) or with a third
control bit DIV3 (see Table 4). The frequency generator
includes precision circuitry for dual tone multifrequency
(DTMF) signals, which is typically used for tone dialling
telephone sets.
6.1Frequency generator derivative registers
6.1.1H
IGH AND LOW GROUP FREQUENCY REGISTERS
Table 2 gives the addresses, symbols and access types of the High Group Frequency (HGF) and Low Group Frequency
(LGF) registers, used to set the frequency output.
Table 2 Hexadecimal addresses, symbols, access types and bit symbols of the frequency registers
REGISTER
ADDRESS
REGISTER
SYMBOL
ACCESS
TYPE
7 6 5 4 3 2 1 0
11HHGFWH7H6H5H4H3H2H1H0
12HLGFWL7L6L5L4L3L2L1L0
The TONE output can alternatively issue twelve modem
frequencies for data rates between 300 and 1200 bits/s.
In addition to DTMF and modem frequencies, two octaves
of musical scale in steps of semitones are available. Their
frequencies are provided either in purely sinusoidal form
on the TONE output or as a square wave on the port line
P1.7/MDY. The latter is typically for ringer applications in
telephone sets. If no frequency output is selected the
TONE output is in 3-state mode.
BIT SYMBOLS
6.1.2CLOCK AND MELODY CONTROL REGISTER (MDYCON)
Table 3 Clock and Melody Control Register, MDYCON (address 13H; access type R/W)
7 6 5 4 3 2 1 0
00000EDCODIV3EMO
Table 4 Description of MDYCON bits
BITSYMBOLDESCRIPTION
7to3−These bits are set to a logic 0.
2EDCOEnable DTMF clock output. If bit EDCO = 0, then DP1.7/DCO is a general purpose
derivative port line. If bit EDCO = 1, then DP1.7/DCO is the DTMF clock output.
EDCO = 1 does not inhibit the port instructions for DP1.7/DCO. Therefore the state of
both port line and flip-flop may be read in and the port flip-flop may be written by
derivative port instructions. However, the port flip-flop of DP1.7/DCO must remain set to
avoid conflicts between DTMF clock and port outputs.
1DIV3Enable DTMF clock divider. If bit DIV3 = 0, then the DTMF clock f
If bit DIV3 = 1, then f
DTMF
=1⁄3× f
xtal
.
DTMF=fxtal
.
0EMOEnable Melody Output. If bit EMO = 0, then P1.7/MDY is a standard port line.
If bit EMO = 1, then P1.7/MDY is the melody output. EMO = 1 does not inhibit the port
instructions for P1.7/MDY. Therefore the state of both port line and flip-flop may be read
in and the port flip-flop may be written by port instructions. However, the port flip-flop of
P1.7/MDY must remain set to avoid conflicts between melody and port outputs.
When the HGF contents are zero while EMO = 1, P1.7/MDY is in the HIGH state.
1996 Dec 187
Philips SemiconductorsProduct specification
8-bit microcontroller with DTMF generator,
256 bytes EEPROM and real-time clock
handbook, full pagewidth
8
8
8
INTERNAL BUS
8
f
xtal
CLOCK AND MELODY
CONTROL REGISTER
HGF REGISTER
LGF REGISTER
CLOCK
DIVIDER
DIGITAL
SINE WAVE
SYNTHESIZER
SWITCHED
CAPACITOR
BANDGAP
VOLTAGE
REFERENCE
DIGITAL
SINE WAVE
SYNTHESIZER
f
square wave
DAC
DAC
DTMF
SWITCHED
CAPACITOR
LOW-PASS
FILTER
PCD3350A
PORT/CLOCK
OUTPUT LOGIC
PORT/MELODY
OUTPUT LOGIC
RC LOW-PASS
FILTER
MGB782
DP1.7/
DCO
P1.7/
MDY
TONE
Fig.3Block diagram of the frequency generator, melody output (P1.7/MDY) and DTMF clock output
(DP1.7/DCO).
6.2Melody output (P1.7/MDY)
The melody output (P1.7/MDY) is very useful for
generating musical notes when a purely sinusoidal signal
is not required, such as for ringer applications.
The square wave (duty cycle =12⁄23 or 52%) will include
the attenuated harmonics of the base frequency, which is
defined by the contents of the HGF register (Table 2).
However, even higher frequency notes may be produced
since the low-pass filtering on the TONE output is not
applied to the P1.7/MDY output. This results in the
minimum decimal value x in the HGF register (see
equation in Section 6.4) being 2 for the P1.7/MDY output,
rather than 60 for the TONE output. A sinusoidal TONE
output is produced at the same time as the melody square
wave, but due to the filtering, the higher frequency sine
waves produced when x < 60 will not appear at the TONE
output.
Since the melody output is shared with P1.7, the port
flip-flop of P1.7 has to be set HIGH before using the
6.3DTMF clock divider and output (DP1.7/DCO)
The DTMF clock divider allows the DTMF part to run either
with the main clock frequency (f
of it (f
DTMF
=1⁄3× f
) depending on the state of the divider
xtal
DTMF=fxtal
control bit DIV3 in register MDYCON.
For low power applications, a 3.58 MHz quartz crystal or
PXE resonator can be chosen together with the
divide-by-one function of the clock divider.
For other applications a 10.74 MHz quartz crystal or PXE
resonator may be chosen together with the divide-by-three
function of the clock divider. This triples the program speed
of the microcontroller, thereby keeping the assumed
DTMF frequency of 3.58 MHz.
Since a 3.58 MHz clock is needed for peripheral telephony
circuits such as the analog voice scrambler/descrambler
PCD4440T, a switchable DTMF clock output is provided
depending on the state of the enable clock output bit
EDCO in register MDYCON.
melody output. This is to avoid conflicts between melody
and port outputs. The melody output drive depends on the
configuration of port P1.7/MDY, see Chapter 14, Table 27.
) or with a third
1996 Dec 188
Philips SemiconductorsProduct specification
-
8-bit microcontroller with DTMF generator,
256 bytes EEPROM and real-time clock
If EDCO = 1 and DIV3 = 1 in the MDYCON register: a
square wave with the frequency f
on the derivative port line DP1.7/DCO. If EDCO = 1 and
DIV3 = 0: a square wave with the frequency f
output on the derivative port line DP1.7/DCO.
The melody output drive depends on the configuration of
port P1.7/MDY, see Chapter 14, Table 27.
6.4Frequency registers
The two frequency registers HGF and LGF define two
frequencies. From these, the digital sine synthesizers
together with the Digital-to-Analog Converters (DACs)
construct two sine waves. Their amplitudes are precisely
scaled according to the bandgap voltage reference. This
ensures tone output levels independent of supply voltage
and temperature. The amplitude of the Low Group
Frequency sine wave is attenuated by 2 dB compared to
the amplitude of the High Group Frequency sine wave.
The two sine waves are summed and then filtered by an
on-chip switched capacitor and RC low-pass filters.
These guarantee that all DTMF tones generated fulfil the
CEPT recommendations with respect to amplitude,
frequency deviation, total harmonic distortion and
suppression of unwanted frequency components.
The value 00H in a frequency register stops the
corresponding digital sine synthesizer. If both frequency
registers contain 00H, the whole frequency generator is
shut off, resulting in lower power consumption.
The frequency ‘f’ of the sine wave generated from either of
the frequency registers is a function of the clock frequency
’ and the decimal value ‘x’ held in the register.
‘f
xtal
The equation relating these variables is:
f
f
=
The frequency limitation given by x ≥ 60 is due to the
low-pass filters which would attenuate higher frequency
sine waves.
6.5DTMF frequencies
Assuming an oscillator frequency f
DTMF standard frequencies can be implemented as
shown in Table 5.
xtal
-------------------------------23 x 2+()[]
; where 60 ≤ x ≤ 255.
=1⁄3× f
DTMF
= 3.58 MHz, the
xtal
is output
xtal
DTMF=fxtal
is
PCD3350A
The relationships between telephone keyboard symbols,
DTMF frequency pairs and the frequency register contents
are given in Table 6.
8-bit microcontroller with DTMF generator,
256 bytes EEPROM and real-time clock
6.6Modem frequencies
Again assuming an oscillator frequency f
the standard modem frequencies can be implemented as
in Table 7. It is suggested to define the frequency by the
HGF register while the LGF register contains 00H,
disabling Low Group Frequency generation.
Table 7 Standard modem frequencies and their
implementation
HGF
FREQUENCY (Hz) DEVIATION
VALUE
(HEX)
9D980
821180
8F1070
791270
801200
452200
761300
482100
5C1650
521850
4B2025
442225
MODEMGENERATED(%)(Hz)
(1)
(1)
(2)
(2)
(3)
(3)
(4)
(4)
(1)
(1)
(2)
(2)
978.82−0.12 −1.18
1179.03−0.08 −0.97
1073.330.313.33
1265.30−0.37 −4.70
1197.17−0.24 −2.83
2192.01−0.36 −7.99
1296.94−0.24 −3.06
2103.140.153.14
1655.660.345.66
1852.770.152.77
2021.20−0.19 −3.80
2223.32−0.08 −1.68
Notes
1. Standard is V.21.
2. Standard is Bell 103.
3. Standard is Bell 202.
4. Standard is V.23.
6.7Musical scale frequencies
= 3.58 MHz,
xtal
PCD3350A
Table 8 Musical scale frequencies and their
implementation
HGF
NOTE
VALUE
(HEX)
D#5F8622.3622.5
E5EA659.3659.5
F5DD698.5697.9
F#5D0740.0741.1
G5C5784.0782.1
G#5B9830.6832.3
A5AF880.0879.3
A#5A5923.3931.9
B59C987.8985.0
C6931046.51044.5
C#68A1108.71111.7
D6821174.71179.0
D#67B1244.51245.1
E6741318.51318.9
F66D1396.91402.1
F#6671480.01482.2
G6611568.01572.0
G#65C1661.21655.7
A6561760.01768.5
A#6511864.71875.1
B64D1975.51970.0
C7482093.02103.3
C#7442217.52223.3
D7402349.32358.1
D#73D2489.02470.4
FREQUENCY (Hz)
STANDARD
(1)
GENERATED
Finally, two octaves of musical scale in steps of semitones
can be realized, again assuming an oscillator frequency
f
= 3.58 MHz (Table 8). It is suggested to define the
xtal
frequency by the HGF register while the LGF contains
00H, disabling Low Group Frequency generation.
1996 Dec 1810
Note
1. Standard scale based on A4 @ 440 Hz.
Philips SemiconductorsProduct specification
8-bit microcontroller with DTMF generator,
256 bytes EEPROM and real-time clock
7EEPROM AND TIMER 2 ORGANIZATION
The PCD3350A has 256 bytes of Electrically Erasable
Programmable Read Only Memory (EEPROM). Such
non-volatile storage provides data retention without the
need for battery backup. In telecom applications, the
EEPROM is used for storing redial numbers and for short
dialling of frequently used numbers. More generally,
EEPROM may be used for customizing microcontrollers,
such as to include a PIN code or a country code, to define
trimming parameters, to select application features from
the range stored in ROM.
The most significant difference between a RAM and an
EEPROM is that a bit in EEPROM, once written to a
logic 1, cannot be cleared by a subsequent write
operation. Successive write accesses actually perform a
logical OR with the previously stored information.
Therefore, to clear a bit, the whole byte must be erased
and re-written with the particular bit cleared. Thus, an
erase-and-write operation is the EEPROM equivalent of a
RAM write operation.
PCD3350A
Whereas read access times to an EEPROM are
comparable to RAM access times, write and erase access
times are much slower at 5 ms each. To make these
operations more efficient, several provisions are available
in the PCD3350A.
First, the EEPROM array is structured into 64 four-byte
pages (see Fig.4) permitting access to 4 bytes in parallel
(write page, erase/write page and erase page). It is also
possible to erase and write individual bytes.
Finally, the EEPROM address register provides
auto-incrementing, allowing very efficient read and write
accesses to sequential bytes.
To simplify the erase and write timing, the derivative 8-bit
down-counter (Timer 2) with reload register is provided.
In addition to EEPROM timing, Timer 2 can be used for
general real-time tasks, such as for measuring signal
duration and for defining pulse widths.
1996 Dec 1811
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