Philips PCD3310AT, PCD3310P, PCD3310T, PCD3310AP Datasheet

INTEGRATED CIRCUITS

PCD3310; PCD3310A

Pulse and DTMF diallers with redial

Product specification

1996 Nov 21

Supersedes data of 1996 May 06

File under Integrated Circuits, IC03

Philips Semiconductors	Product specification
Pulse and DTMF diallers with redial	PCD3310; PCD3310A

CONTENTS

1FEATURES

2GENERAL DESCRIPTION

3QUICK REFERENCE DATA

4ORDERING INFORMATION

5BLOCK DIAGRAM

6PINNING

7FUNCTIONAL DESCRIPTION

7.1Power supply (VDD and VSS)

7.2Clock oscillator (OSCI and OSCO)

7.3Chip enable (CE)

7.4Mode selection (PD/DTMF)

7.4.1Pulse mode

7.4.2DTMF mode

7.4.3Mixed mode

7.5Keyboard inputs/outputs

7.6Flash duration control (FLD)

7.7TONE output (DTMF mode)

7.8Dial pulse and Flash output (DP/FLO)

7.9Mute output (M1)

7.10Mute output (M1)

7.11Muting output (M2)

8	DIALLING PROCEDURES

8.1Dialling

8.2Redialling

8.3Notepad

9HANDLING

10LIMITING VALUES

11CHARACTERISTICS

12TIMING CHARACTERISTICS

13APPLICATION INFORMATION

14PACKAGE OUTLINES

15SOLDERING

15.1Introduction

15.2DIP

15.2.1Soldering by dipping or by wave

15.2.2Repairing soldered joints

15.3SO

15.3.1Reflow soldering

15.3.2Wave soldering

15.3.3Repairing soldered joints

16DEFINITIONS

17LIFE SUPPORT APPLICATIONS

1996 Nov 21

2

Philips Semiconductors	Product specification
Pulse and DTMF diallers with redial	PCD3310; PCD3310A

1 FEATURES

∙Pulse, DTMF and ‘mixed mode’ dialling

∙Mixed mode dialling: start with pulse dial, end with DTMF dial (e.g. for control of DTMF user equipment via a pulse network)

∙23-digit memory stores last number dialled, or number noted during conversation (notepad)

∙Redial of both PABX and external calls

∙Supports 16 dial keys: 0 to 9, , # A, B, C, and D

∙Supports 4 function keys:

–Program (P) used to input notepad numbers

–Flash (FL) allows re-dialling without on-hook

–Redial (R) recalls and redialls stored number

–Change from pulse dial to DTMF dial in mixed mode (>)

∙DTMF timing:

–for manual dialling, maximum duration burst/pause intervals are user-determined, but at least minimum duration burst/pause intervals are ensured

–for redial, minimum duration burst/pause intervals are used

3 QUICK REFERENCE DATA

∙On-chip voltage reference for supply and temperature independent tone output

∙On-chip filtering for low output distortion (CEPT compatible)

∙On-chip oscillator uses low-cost 3.58 MHz (TV colour burst) crystal or piezo resonator

∙Uses standard single-contact or double-contact (common left open) keyboard

∙Keyboard entries fully debounced

∙Flash (register recall) output.

2 GENERAL DESCRIPTION

The PCD3310 and PCD3310A are single-chip silicon gate CMOS integrated circuits. They are dual-standard diallers for pulse or dual tone multi-frequency (DTMF) dialling, with on-chip oscillators suitable for use with 3.58 MHz crystals.

Input data is derived from any standard matrix keyboard for dialling in either the pulse or DTMF mode.

Numbers up to 23 digits can be retained in RAM for dialling/redialling.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VDD	operating supply voltage		2.5	−	6.0	V
Vstb	standby supply voltage		1.8	−	6.0	V
IDD(stb)	standby current (on hook)	Vstb = 1.8 V	−	1.4	4	μA
IDD(conv)	operating current in conversation mode	VDD = 3 V	−	−	150	μA
IDD(pulse)	operating current in pulse dialling mode	VDD = 3 V	−	−	200	μA
IDD(DTMF)	operating current in DTMF dialling mode	VDD = 3 V	−	0.6	0.9	mA
VHG(RMS)	DTMF output voltage level for HIGH group		−	192	−	mV
	(RMS value)
VLG(RMS)	DTMF output voltage level for LOW group		−	150	−	mV
	(RMS value)
Gv	voltage gain (pre-emphasis) of group		−	2.1	−	dB
THD	total harmonic distortion		−	−25	−	dB
Tamb	operating ambient temperature		−25	−	+70	°C

1996 Nov 21

3

	Philips Semiconductors				Product specification
	Pulse and DTMF diallers with redial			PCD3310; PCD3310A
	4 ORDERING INFORMATION
	Table 1 Package information
	TYPE		PACKAGE
	NUMBER	NAME	DESCRIPTION		VERSION
	PCD3310P	DIP20	plastic dual in-line package; 20 leads (300 mil)		SOT146-1
	PCD3310AP	DIP20	plastic dual in-line package; 20 leads (300 mil)		SOT146-1
	PCD3310T	SO28	plastic small outline package; 28 leads; body width 7.5 mm		SOT136-1
	PCD3310AT	SO28	plastic small outline package; 28 leads; body width 7.5 mm		SOT136-1
	Table 2 Functional options
	TYPE	PULSE DIAL; BREAK/MAKE TIME (see notes 1 and 2)			MARK-TO-SPACE
	NUMBER				RATIO
	PCD3310P		67, 33 ms		2 : 1
	PCD3310T		67, 33 ms		2 : 1
	PCD3310AP		60, 40 ms		3 : 2
	PCD3310AT		60, 40 ms		3 : 2

Notes

1.Pulse frequency 10 Hz, inter-digit pause (tid) = 840 ms.

2.Note that the PCD3310P; 10T and the PCD3310AP; 10AT differ only in the break/make ratio in pulse dialling. The break/make times equate to mark-to-space ratios of 2 : 1 and 3 : 2 respectively.

1996 Nov 21

4

21 Nov 1996

5

																		(21)
																		16
														PD AND FLASH LOGIC				DP/FLO
			PCD3310 FAMILY
															PD			(2)
														CODE CONVERTER				2
																		PD/DTMF
														TIMING CONTROLLER
			OUTPUT												DTMF
											DTMF HIGH GROUP					DTMF LOW GROUP
										COUNTER/CONTROLLER						COUNTER/CONTROLLER
							COUNTER											(27)
			MAIN		ADDRESS				VOLTAGE									19
							POINTER
		REGISTER		DECODING										DAC	+	DAC		VDD
							CONTROLLER		REFERENCE
										Vref			HIGH			LOW		(5)
																		4
OUTPUT							READ/											VSS
																		(3)
							WRITE
TEMPORARY																		3
																		TONE
REGISTER										POWER
										ON
	INPUT									RESET
			KEYPAD							CONTROL					TIME BASE
															RESET DELAY		OSCILLATOR
		INTERFACE/LOGIC								LOGIC
															COUNTER
(9)	(10)	(12)	(13)	(14)	(15)	(16)	(17)	(19)	(8)	(20)	(24)	(23)	(26)				(1)	(28)
6	7	8	9	10	11	12	13	14	5	15	17		18	(22)			1	20

ROW 5	ROW 3	ROW 1	COL 2	COL 4	FLD	M1	M1	CE M2	OSCI OSCO MGE490
ROW 4	ROW 2		COL 1	COL 3	CF/DMODE/FS

The pin numbers given in parenthesis refer to the PCD3310T.

Fig.1 Block diagram.

DIAGRAM BLOCK 5

redial with diallers DTMF and Pulse

PCD3310A PCD3310;

Semiconductors Philips

specification Product

Philips Semiconductors							Product specification
	Pulse and DTMF diallers with redial						PCD3310; PCD3310A
6 PINNING
			PINS
	SYMBOL				TYPE		DESCRIPTION
			PCD3310P	PCD3310T
			PCD3310AP	PCD3310AT
	OSCI		1	1	I		oscillator input
			2	2	I		select pin; pulse or DTMF dialling input
	PD/DTMF
	TONE		3	3	O		single or dual tone frequency output
	n.c.		−	4	−		not connected
	VSS		4	5	P		negative supply
	n.c.		−	6	−		not connected
	n.c.		−	7	−		not connected
	FLD		5	8	I/O		flash duration control input/output
	ROW 5		6	9	I/O		scanning row 5 keyboard input/output
	ROW 4		7	10	I/O		scanning row 4 keyboard input/output
	n.c.		−	11	−		not connected
	ROW 3		8	12	I/O		scanning row 3 keyboard input/output
	ROW 2		9	13	I/O		scanning row 2 keyboard input/output
	ROW 1		10	14	I/O		scanning row 1 keyboard input/output
	COL 1		11	15	I		sense column 1 keyboard input (with internal pull-up resistor)
	COL 2		12	16	I		sense column 2 keyboard input (with internal pull-up resistor)
	COL 3		13	17	I		sense column 3 keyboard input (with internal pull-up resistor)
	n.c.		−	18	−		not connected
	COL 4		14	19	I		sense column 4 keyboard input (with internal pull-up resistor)
	CF/DMODE/FS		15	20	O		confidence tone/dialling mode/frequency select outputs
	DP/FLO		16	21	O		dialling pulse and flash output
	M2		−	22	O		muting output 2
			−	23	O		muting output 1 (active LOW)
	M1
	M1		17	24	O		muting output 1
	n.c.		−	25	−		not connected
	CE		18	26	I		chip enable input
	VDD		19	27	P		positive supply voltage
OSCO			20	28	O		oscillator output

1996 Nov 21

6

Philips Semiconductors	Product specification
Pulse and DTMF diallers with redial	PCD3310; PCD3310A

handbook, halfpage
		OSCI	1				20	OSCO
PD/DTMF			2				19	VDD
		TONE	3				18	CE
		VSS	4				17	M1
		FLD	5	PCD3310P			16	DP/FLO
	ROW 5			PCD3310AP				CF/DMODE/FS
			6				15
	ROW 4							COL 4
			7				14
	ROW 3		8				13	COL 3
	ROW 2							COL 2
			9				12
	ROW 1							COL 1
			10				11
						MGE489

Fig.2 Pin configuration (DIP20 package).

handbook, halfpage
		OSCI	1				28	OSCO
PD/DTMF			2				27	VDD
		TONE						CE
			3				26
		n.c.						n.c.
			4				25
		VSS						M1
			5				24
		n.c.
			6				23	M1
		n.c.						M2
			7	PCD3310T			22
				PCD3310AT
		FLD	8				21	DP/FLO
	ROW 5							CF/DMODE/FS
			9				20
	ROW 4							COL 4
			10				19
		n.c.						n.c.
			11				18
	ROW 3							COL 3
			12				17
	ROW 2							COL 2
			13				16
	ROW 1		14				15	COL 1
					MGE488

Fig.3 Pin configuration (SO28 package).

7 FUNCTIONAL DESCRIPTION

References to ‘the device’ apply to both the PCD3310 and the PCD3310A.

7.1Power supply (VDD and VSS)

The positive supply of the device (VDD) must meet the voltage requirements as indicated in Chapter 11.

To avoid undefined states of the device at power-on, an internal reset circuit clears the control logic and counters. If VDD drops below the minimum standby supply voltage of 1.8 V the power-on reset circuit inhibits redialling after hook-off. The power-on reset signal has the highest priority; it blocks and resets the device without delay regardless of the state of chip enable input (CE).

7.2Clock oscillator (OSCI and OSCO)

The timebase for the device for both pulse and DTMF dialling is a crystal controlled on-chip oscillator which is completed by connecting a 3.58 MHz crystal or ceramic resonator between the OSCI and OSCO pins. Recommended resonator type:

∙ 3.58 MHz PXE - Murata; CSA 3.58MG310VA.

7.3Chip enable (CE)

The CE input enables the device and is used to initialize the device. When CE is LOW it provides the static standby condition. In this state the clock oscillator is disabled, all registers and logic are reset with the exception of the redial registers, Read Address Counter (RAC), Write Address Counter (WAC) and Temporary Write Address Counter (TWAC). The RAC points to the first digit of the last number dialled, the WAC and TWAC point to the last entered digits in the main and temporary registers

(see Fig.6). The keyboard input is inhibited, but data previously entered is saved in the redial registers provided VDD is higher than Vstb. The current drawn is Istb (standby current) and serves to retain data in the redial registers during hook-on.

When CE is HIGH it activates the clock oscillator and the device changes from static standby condition to the

conversation mode. The current consumption is IDD(conv) until the first digit is entered from the keyboard. Then a

dialling or redialling operation starts. The operating current

is IDD(pulse) if in the pulse dialling mode, or IDD(DTMF) if the DTMF dialling mode is selected.

1996 Nov 21

7

Philips Semiconductors	Product specification
Pulse and DTMF diallers with redial	PCD3310; PCD3310A

If the CE input is taken to a LOW level for longer than time period trd (see Figs 11 and 12 and Chapter 12) an internal reset pulse will be generated at the end of the trd period.

The system changes to the static standby state. Short CE pulses of < trd will not affect the operation of the device and reset pulses are not produced.

7.4Mode selection (PD/DTMF)

7.4.1PULSE MODE

If PD/DTMF = VSS the pulse mode is selected. Entries of non-numeric keys are neglected, they are neither stored in the redial register nor transmitted.

7.4.2DTMF MODE

If PD/DTMF = VDD the dual tone multi-frequency dialling mode is selected. Each non-function key activated corresponds to a combination of two tones, one of four LOW and one of four HIGH frequencies, corresponding to the key’s row and column in the keyboard matrix.

See Fig.4 and Table 3. The frequencies are transmitted with a constant amplitude, regardless of power supply variations. Harmonic content is filtered out thus meeting the CEPT recommendations.

The transmission time is calibrated for redial. In manual operation the duration of bursts and pauses is the actual key depression time, but not less than the minimum transmission time (tt) or minimum pause time (tp).

7.4.3MIXED MODE

When the PD/DTMF pin is open-circuit the mixed mode is selected. After activation of CE or FL (Flash) the device starts as a pulse dialler and remains in this state until a non-numeric dial key (A, B, C, D, , #) or the function key > is activated. Pressing a non-numeric dial key causes the corresponding DTMF tones to be output, and any subsequent dialling to be in DTMF mode. Pressing > causes no output tones, but any subsequent dialling is in DTMF mode. The > key should be used if the first DTMF output required is numeric. The device remains in DTMF dial mode until FL is activated or after a static standby condition when CE is re-activated.

A connection between the PD/DTMF pin and VDD also initiates DTMF dialling. Chip enable, FL or a connection of PD/DTMF pin to VSS sets the device back to pulse dialling.

7.5Keyboard inputs/outputs

The sense column inputs COL 1 to COL 4 and the scanning row outputs ROW 1 to ROW 5 of the device are connected to the keyboard as shown in Fig.4. All keyboard

entries are debounced on both the leading and trailing edges for approximately time period te as shown in Figs 11, 12, 13 and 14. Each entry is tested for validity.

When a key is depressed, keyboard scanning starts and only returns to the sense mode after release of that key.

handbook, halfpage				ROWS								COLUMNS
5		4		3		2		1		1		2			3			4
										1			2		3			A
										4			5		6			B
										7			8		9			C
													0		#			D
										P			FL		R			>
MGE491
												KEYBOARD

Fig.4 Keyboard organization.

ROW 5 of the keyboard contains the following function keys:

∙P = memory clear and programming (notepad)

∙FL = flash or register recall

∙R = redial

∙> = change of dial mode from pulse to DTMF in mixed dialling mode.

In the pulse dialling mode the valid keys are the

10 numeric dial keys (0 to 9). The non-numeric dial keys (A, B, C, D, , #) have no effect on the dialling or the redial storage. Valid function keys are P, R and FL.

In the DTMF mode all dial keys are valid. They are transmitted as a dual tone combination and at the same time stored in the redial register. Valid function keys are P, FL and R.

In the mixed mode all key entries are valid and executed accordingly.

1996 Nov 21

8

Philips Semiconductors	Product specification
Pulse and DTMF diallers with redial	PCD3310; PCD3310A

7.6Flash duration control (FLD)

Flash (or register recall) is activated by the FL key and can be used in DTMF and pulse dialling modes.

The FL key has the same effect as placing the telephone ‘on-hook’ for a calibrated time. Pressing the FL key will produce a timed line-break of 100 ms (min.) at the DP/FLO output. During the conversation mode pressing FL also acts as a chip enable. The flash pulse duration (tFL) is calibrated and can be prolonged with an external resistor and capacitor connected to the FLD input/output (see Fig.5). The flash pulse resets the Read Address Counter (RAC) to the address of the first entered digit of the last number dialled. Subsequent redial is possible (see Fig.9). The counter of the reset delay time is held for a period of tFL.

7.7TONE output (DTMF mode)

The single and dual tones which are provided at the TONE output are filtered by an on-chip switched capacitor filter, followed by an on-chip active RC low-pass filter. Hence, the total harmonic distortion of the DTMF tones meets the CEPT recommendations. The tone output has the following states:

·tone OFF; 3-state

·tone ON; the associated frequencies are superimposed on a DC level of 1¤2VDD.

When the DTMF mode is selected output tones are timed in manual dialling with a minimum duration of bursts and pauses, and in redial with a calibrated timing. Single tones may be generated for test purposes (CE = HIGH). Each row and column has one corresponding frequency.

High group frequencies are generated by connecting the column to VSS and LOW group frequencies are generated by forcing the row to VDD. The single tone frequency will be transmitted during activation time, but it is neither calibrated nor stored.

An on-chip reference voltage provides output tone levels independent of the supply voltage. Table 3 shows the frequency tolerance of the output tones for DTMF signalling.

dbook, full pagewidth
60	R
nA
	FLD
		FLO
	C	tFL	tFLRC
			MGE492
	(a)		(b)

(a)Flash duration control circuit.

(b)Flash pulse timing. tFLRC ≈ R × C.

Fig.5 Flash pulse duration setting.

1996 Nov 21

9