Philips N74F621N, N74F621D Datasheet

INTEGRATED CIRCUITS

74F621

Octal bus transceiver, non-inverting

(open collector)

Product specification

1996 Jan 05

IC15 Data Handbook

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Philips Semiconductors	Product specification
Octal bus transceiver, non-inverting (open collector)	74F621

FEATURES

•High-impedance NPN base inputs for reduced loading

(20μA in High and Low states)

•Octal bidirectional bus interface

•Open collector outputs sink 64mA

•Non-inverting

DESCRIPTION

The 74F621 is an octal transceiver featuring non-inverting open collector bus-compatible outputs in both send and receive directions. The outputs are capable of sinking 64mA, providing very good capacitive drive characteristics.

This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the Enable inputs (OEBA and OEAB). The Enable inputs can be used to disable the device so that the buses are effectively isolated.

The dual-enable configuration gives the 74F621 the capability to store data by the simultaneous enabling of OEBA and OEAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of the bus lines are at high impedance, both sets of bus lines (16 in all) will remain in their last states.

PIN CONFIGURATION

OEAB	1				20		VCC
A0	2				19		OEBA
							B0
A1	3				18
							B1
A2	4				17
							B2
A3	5				16
							B3
A4	6				15
							B4
A5	7				14
							B5
A6	8				13
							B6
A7	9				12
GND							B7
	10				11
				SF01135

		TYPICAL	TYPICAL SUPPLY CURRENT
	TYPE	PROPAGATION
			(TOTAL)
		DELAY
	74F621	8.0ns	105mA

ORDERING INFORMATION

		COMMERCIAL RANGE	PKG
	DESCRIPTION	VCC = 5V ±10%,
			DWG #
		Tamb = 0°C to +70°C
	20-pin plastic DIP	N74F621N	SOT146-1
	20-pin plastic SOL	N74F621D	SOT163-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

			PINS		DESCRIPTION	74F(U.L.)	LOAD VALUE
						HIGH/LOW	HIGH/LOW
	A0	- A7, B0 - B7		Data inputs		1.0/0.033	20μA/20μA
			OEAB	Output Enable inputs		1.0/0.033	20μA/20μA
	OEBA,
	A0	- A7		Data outputs		OC/40	OC/24mA
	B0	- B7		Data outputs		OC/106.7	OC/64mA

NOTE: One (1.0) FAST unit load is defined as: 20μA in the High state and 0.6mA in the Low state. OC = Open Collector.

1996 Jan 05

2

853±0380 16185

Philips Semiconductors	Product specification
Octal bus transceiver, non-inverting (open collector)	74F621

LOGIC SYMBOL																											LOGIC SYMBOL (IEEE/IEC)
																												19
																															EN1
			2				3			4			5			6		7		8		9					1
																															EN2
				A0			A1			A2			A3			A4		A5		A6		A7					2							18
																															1
1
				OEAB																									3		2				17
19				OEBA
																													4						16
				B0				B1		B2				B3		B4		B5			B6		B7
																													5
																																		15
																													6
																																			14
			18				17			16			15			14		13		12		11
																											7
																																			13
VCC	=		Pin 20
GND	=		Pin 10																			SF01126							8
																																		12
																											9
																																			11
																																		SF01137

LOGIC DIAGRAM
	19
	OEBA
	OEAB 1
	A0	2	18	B0
	A1	3	17	B1
	A2	4	16	B2
	A3	5	15	B3
	A4	6	14	B4
	A5	7	13	B5
	A6	8	12	B6
	A7	9	11	B7
VCC =	Pin 20		SF01130
GND =	Pin 10

FUNCTION TABLE

			INPUTS			OPERATING MODES
					OEAB
		OEBA
		L			L	B data to A bus
		H			H	A data to B bus
		H			L	OFF
		L			H	B data to A bus
						A data to B bus
H	=	High voltage level
L	=	Low voltage level
X	=	Don't care

OFF= High if pull-up resistor is connected to open collector output

1996 Jan 05

3