Philips N74F545N, N74F545D Datasheet

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74F545

Octal bidirectional transceiver (with 3-State inputs/outputs)

Product specification

1990 Mar 01

IC15 Data Handbook

m n r

Philips Semiconductors

Product specification

 

 

 

 

 

Octal bidirectional transceiver (with 3-State inputs/outputs)

74F545

 

 

 

 

 

 

FEATURES

High impedance NPN base inputs for reduced loading (70μA in High and Low states) output

8-bit bidirectional data flow reduces system package count

3-State inputs/outputs for interfacing with bus oriented systems

24mA and 64mA bus drive capability on A and B ports, respectively

Transmit/Receive and Output Enable simplify control logic

DESCRIPTION

The 74F545 is an 8-bit, 3-State, high speed transceiver. It provides bidirectional drive for the bus-oriented microprocessor and digital communications systems. Straight through bidirectional transceivers are featured, with 24mA bus drive capability on the A ports and 64mA bus drive capability on the B ports. One input, Transmit/Receive (T/R) determines the direction of logic signals through the bidirectional transceiver. Transmit enables data from A ports to B ports; Receive enables data from B ports to A ports. The Output Enable input disables both A and B ports by placing them in a 3-State condition. The 74F545 performs the same function as the

74F245, the only difference being package pin assignment.

PIN CONFIGURATION

 

A0

 

 

 

 

 

VCC

 

1

 

 

 

20

 

A1

 

 

 

 

 

B0

2

 

 

 

19

 

A2

 

 

 

 

 

 

 

 

 

3

 

 

 

18

B1

 

A3

 

 

 

 

 

 

 

 

 

4

 

 

 

17

B2

 

 

 

 

 

 

 

 

 

 

 

 

A4

5

 

 

 

16

B3

 

A5

 

 

 

 

 

B4

6

 

 

 

15

 

 

 

 

 

 

 

 

 

 

 

 

A6

7

 

 

 

14

B5

 

A7

 

 

 

 

 

 

 

 

8

 

 

 

13

B6

 

 

 

 

 

 

 

 

 

 

 

 

OE

9

 

 

 

12

B7

GND

 

 

 

 

 

 

 

 

10

 

 

 

11

T/R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SF01032

 

 

 

 

TYPICAL

TYPICAL SUPPLY

TYPE

CURRENT

PROPAGATION DELAY

 

(TOTAL)

 

 

 

 

 

74F545

4.0ns

87mA

 

 

 

 

 

 

 

 

 

ORDERING INFORMATION

 

 

 

 

 

 

 

DESCRIPTION

COMMERCIAL

PKG DWG #

 

 

 

 

 

 

 

RANGE

 

 

 

 

 

 

 

 

VCC = 5V ±10%,

 

 

 

 

 

 

 

 

Tamb = 0°C to +70°C

 

 

 

 

 

 

 

20-Pin Plastic DIP

N74F545N

SOT146-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20-Pin Plastic SOL

N74F545D

SOT163-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PINS

DESCRIPTION

74F(U.L.)

 

LOAD VALUE

 

 

 

 

HIGH/LOW

 

HIGH/LOW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0±A7, B0±B7

Data inputs

3.5/0.117

 

70μA/70μA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Enable input (active Low)

2.0/0.067

 

40μA/40μA

 

OE

 

 

 

 

 

 

 

 

 

 

 

 

 

Transmit/Receive input

2.0/0.067

 

40μA/40μA

 

T/R

 

 

 

 

 

 

 

 

A0 - A7

Port A 3-State outputs

150/40

 

3.0mA/24mA

 

 

 

 

 

 

 

B0 - B7

Port B 3-State outputs

750/107

 

15mA/64mA

 

 

 

 

 

 

 

 

 

 

NOTE: One (1.0) FAST Unit Load is defined as: 20μA in the High state and 0.6mA in the Low state.

1990 Mar 01

2

853±0375 98992

Philips N74F545N, N74F545D Datasheet

Philips Semiconductors

Product specification

 

 

 

Octal bidirectional transceiver (with 3-State inputs/outputs)

74F545

 

 

 

LOGIC SYMBOL

 

 

 

 

 

 

 

LOGIC SYMBOL (IEEE/IEC)

 

 

1

2

3

4

5

6

7

8

 

 

 

 

 

 

 

 

 

 

 

 

9

G3

 

 

 

 

 

 

 

 

 

 

 

3EN1

 

 

A0

A1

A2

A3

A4

A5

A6

A7

11

3EN2

 

9

OE

 

 

 

 

 

 

 

 

 

 

11

T/R

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

2

19

 

 

 

 

 

 

 

 

 

 

 

 

B0

B1

B2

B3

B4

B5

B6

B7

2

 

18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

17

VCC = Pin 20

19

18

17

16

15

14

13

12

4

 

16

GND = Pin 10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SF01033

5

 

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

14

 

 

 

 

 

 

 

 

 

7

 

13

 

 

 

 

 

 

 

 

 

8

 

12

SF01034

LOGIC DIAGRAM

 

 

A0

A1

A2

A3

A4

A5

A6

A7

 

 

1

2

3

4

5

6

7

8

OE

9

 

 

 

 

 

 

 

 

T/R

11

 

 

 

 

 

 

 

 

 

 

19

18

17

16

15

14

13

12

VCC =

Pin 20

B0

B1

B2

B3

B4

B5

B6

B7

GND =

Pin 10

 

 

 

 

 

 

 

SF01035

 

 

 

 

 

 

 

 

 

FUNCTION TABLE

 

 

 

 

INPUTS

 

 

 

OUTPUTS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

T/R

 

 

 

 

 

L

 

L

Bus B data to Bus A

 

 

 

 

 

 

 

 

 

 

L

 

H

Bus A data to Bus B

 

 

 

 

 

 

 

 

 

 

H

 

X

Z

H

=

High voltage level

 

L

=

Low voltage level

 

 

 

 

X

=

Don't care

 

 

 

 

Z

=

High impedance ªoffº state

 

1990 Mar 01

3

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