Philips N74F538N, N74F538D Datasheet

INTEGRATED CIRCUITS

74F538

1-of -8 decoder (3±state)

Product specification

1989 Apr 06

IC15 Data Handbook

m n r

Philips Semiconductors	Product specification
1-of-8 decoder (3-State)	74F538

DESCRIPTION

The 74F538 decoder/demultiplexer accepts three address (A0 - A2) input signals and decodes them to select one of eight mutually exclusive outputs. A Polarity control (P) input determines whether the outputs are active Low or active High. The 74F538 has 3-State outputs, and a High signal on the Output Enables (OEn) inputs will force all outputs to the high impedance state. Two active High (E2, E3) and two active Low (E0, E1) inputs are available for easy expansion to 1-of-32 decoding with four packages, or for data demultiplexing to 1-of-8 or 1-of-16 destinations.

		TYPICAL	TYPICAL SUPPLY
	TYPE		CURRENT
		PROPAGATION DELAY
			(TOTAL)
	74F538	8.5ns	35mA

ORDERING INFORMATION

	COMMERCIAL RANGE
DESCRIPTION	VCC = 5V ±10%,	PKG DWG #
	Tamb = 0°C to +70°C
20-Pin Plastic DIP	N74F538N	SOT146-1
20-Pin Plastic SOL	N74F538D	SOT163-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PIN CONFIGURATION

	Q2								VCC
			1				20
	Q1								Q3
			2				19
	Q0								Q4
			3				18
									A2
	OE0		4				17
	OE1		5				16		E0
	A0
			6				15		E1
	A1								E2
			7				14
	Q5								E3
			8				13
	Q6								P
			9				12
GND									Q7
			10				11
						SF00996

					PINS		DESCRIPTION	74F(U.L.)	LOAD VALUE
								HIGH/LOW	HIGH/LOW
	A0 - A2						Address inputs	1.0/1.0	20μA/0.6mA
							Enable inputs (active Low)	1.0/1.0	20μA/0.6mA
	E0, E1
	E2, E3						Enable inputs (active High)	1.0/1.0	20μA/0.6mA
	P						Polarity control input	1.0/1.0	20μA/0.6mA
							Output Enable inputs	1.0/1.0	20μA/0.6mA
	OE0, OE1
	Q0 - Q7						Data outputs	150/40	3.0mA/24mA

NOTE: One (1.0) FAST Unit Load is defined as: 20μA in the High state and 0.6mA in the Low state.

LOGIC SYMBOL																								LOGIC SYMBOL (IEEE/IEC)
							6			7					17
																								4			N8	DMUX
							A0				A1				A2
12			P																					5			&	EN	0,8	3
16			E0																											2
																								6					1,8
15			E1																								0
																														1
14			E2																						7			0	2,8
																											2 G
13			E3																					17				7	3,8	19
																														18
4			OE0																										4,8
																								13						8
5			OE1																								&		5,8
			Q0		Q1		Q2			Q3			Q4		Q5			Q6		Q7				14					6,8	9
																								15						11
																													7,8
																								16
VCC = Pin 20
			3		2		1			19			18		8			9		11
GND = Pin 10
																			SF00997												SF00998

1989 Apr 06

2

853±1273 96267

Philips Semiconductors	Product specification
1-of-8 decoder (3-State)	74F538

LOGIC DIAGRAM

	A2	17
	A1	7
	A0	6
	E0	16
		15
	E1
	E2	14
	E3	13
	P	12
	OE0	4
	OE1	5	3	2	1	19	18	8	9	11
VCC =			Q0	Q1	Q2	Q3	Q4	Q5	Q6	Q7
	Pin 20
GND =	Pin 10									SF00999
FUNCTION TABLE
	INPUTS				OUTPUTS

OPERATING MODE

OE

0

OE

1

E

0

E

1

E2

E3

A2

A1

A0

Q0

Q1

Q2 Q3 Q4 Q5 Q6 Q7

H

X

X

X

X

X

X

X

X

Z

Z

Z

Z

Z

Z

Z

Z

High Impedance

X

H

X

X

X

X

X

X

X

Z

Z

Z

Z

Z

Z

Z

Z

L

L

H

X

X

X

X

X

X

L

L

X

H

X

X

X

X

X

Outputs equal P input

Disable

L

L

X

X

L

X

X

X

X

L

L

X

X

X

L

X

X

X

L

L

L

L

H

H

L

L

L

H

L

L

L

L

L

L

L

L

L

L

L

H

H

L

L

H

L

H

L

L

L

L

L

L

L

L

L

L

H

H

L

H

L

L

L

H

L

L

L

L

L

L

L

L

L

H

H

L

H

H

L

L

L

H

L

L

L

L

Active High output

L

L

L

L

H

H

H

L

L

L

L

L

L

H

L

L

L

(P = L)

L

L

L

L

H

H

H

L

H

L

L

L

L

L

H

L

L

L

L

L

L

H

H

H

H

L

L

L

L

L

L

L

H

L

L

L

L

L

H

H

H

H

H

L

L

L

L

L

L

L

H

L

L

L

L

H

H

L

L

L

L

H

H

H

H

H

H

H

L

L

L

L

H

H

L

L

H

H

L

H

H

H

H

H

H

L

L

L

L

H

H

L

H

L

H

H

L

H

H

H

H

H

L

L

L

L

H

H

L

H

H

H

H

H

L

H

H

H

H

Active Low output

L

L

L

L

H

H

H

L

L

H

H

H

H

L

H

H

H

(P = H)

L

L

L

L

H

H

H

L

H

H

H

H

H

H

L

H

H

L

L

L

L

H

H

H

H

L

H

H

H

H

H

H

L

H

L

L

L

L

H

H

H

H

H

H

H

H

H

H

H

H

L

H

=

High voltage level

L

=

Low voltage level

X

=

Don't care

Z

=

High impedance ªoffº state

1989 Apr 06

3