Philips N74ALS646-1D, N74ALS646-1N, N74ALS646D, N74ALS646N, N74ALS648D Datasheet

INTEGRATED CIRCUITS

74ALS646/74ALS646±1

74ALS648/74ALS648±1

Transceiver/register

Product specification	1991 Feb 08
IC05 Data Handbook

m n r

Philips Semiconductors Product specification

	Transceiver/register		74ALS646/74ALS646-1
			74ALS648/74ALS648-1
	74ALS646/646-1	Octal transceiver/register, non-inverting (3-State)
	74ALS648/648-1	Octal transceiver/register, inverting (3-State)

FEATURES

•Combines 74ALS245 and two 74ALS374 type functions in one chip

•Independent registers for A and B buses

•Multiplexed real-time and stored data

•Choice of non-inverting and inverting data paths

•3-State outputs

•The -1 version sink 48mA IOL within the ±5% VCC range

DESCRIPTION

The 74ALS646/74ALS646-1 and 74ALS648/74ALS648-1 transceivers/registers consist of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output enable (OE) and direction (DIR) and select (SAB, SBA) pins are provided for bus management.

The 74ALS646-1 and 74ALS648-1 will sink 48mA if the VCC is limited to 5.0V ±0.25V.

		TYPICAL
TYPE	TYPICAL fMAX	SUPPLY CURRENT
		(TOTAL)
74ALS646/646-1	140MHz	48mA
74ALS648/648-1	140MHz	54mA

ORDERING INFORMATION

		ORDER CODE
			DRAWING
		COMMERCIAL RANGE
	DESCRIPTION	VCC = 5V ±10%,	NUMBER
		Tamb = 0°C to +70°C
	24-pin plastic DIP	74ALS646N, 74ALS646-1N,	SOT222-1
		74ALS648N, 74ALS648-1N
	24-pin plastic SOL	74ALS646D, 74ALS646-1D,	SOT137-1
		74ALS648D, 74ALS648-1D

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

	PINS				DESCRIPTION	74ALS (U.L.)	LOAD VALUE
						HIGH/LOW	HIGH/LOW
A0 ± A7					A inputs	1.0/1.0	20μA/0.1mA
B0 ± B7					B inputs	1.0/1.0	20μA/0.1mA
					A-to-B clock input	1.0/1.0	20μA/0.1mA
	CPAB
CPBA					B-to-A clock input	1.0/1.0	20μA/0.1mA
	SAB				A-to-B select input	1.0/1.0	20μA/0.1mA
	SBA				B-to-A select input	1.0/1.0	20μA/0.1mA
	DIR				Data flow directional control input	1.0/1.0	20μA/0.1mA
					Output enable input	1.0/1.0	20μA/0.1mA
		OE
A0 ± A7, B0 ± B7					Data outputs	750/240	15mA/24mA
A0 ± A7, B0 ± B7					Data outputs (-1 version)	750/480	15mA/48mA

NOTE: One (1.0) ALS unit load is defined as: 20μA in the High state and 0.1mA in the Low state.

1991 Feb 08

2

853±1408 01670

Philips Semiconductors Product specification

Transceiver/register																													74ALS646/74ALS646-1
																													74ALS648/74ALS648-1
PIN CONFIGURATION ± 74ALS646/646-1																								PIN CONFIGURATION ± 74ALS648/648-1
			CPAB		1										24		VCC										CPAB		1										24		VCC
			SAB		2										23		CPBA										SAB		2										23		CPBA
			DIR		3										22		SBA										DIR		3										22		SBA
			A0		4										21												A0		4										21
																	OE																								OE
			A1		5										20		B0										A1		5										20
																																									B0
			A2		6										19		B1										A2		6										19
																																									B1
			A3		7										18		B2										A3		7										18
																																									B2
			A4		8										17		B3										A4		8										17
																																									B3
			A5		9										16		B4										A5		9										16
																																									B4
			A6		10										15		B5										A6		10										15
																																									B5
			A7		11										14		B6										A7		11										14
																																									B6
			GND		12										13		B7										GND		12										13
																																									B7
																						SC00118																							SC00119
LOGIC SYMBOL ± 74ALS646/646-1																								LOGIC SYMBOL ± 74ALS648/648-1
			4		5		6		7		8		9		10			11									4		5		6		7		8		9		10			11
			A0		A1		A2		A3		A4		A5		A6			A7									A0		A1		A2		A3		A4		A5		A6			A7
1			CPAB																					1			CPAB
2			SAB
																								2			SAB
3			DIR
																								3			DIR
23			SPBA
																								23			SPBA
22			SBA
																								22			SBA
21			OE
																								21			OE
			B0		B1		B2		B3		B4		B5		B6			B7
																											B0		B1		B2		B3		B4		B5		B6			B7
VCC = Pin 24			20		19		18		17		16		15		14			13						VCC = Pin 24
																											20		19		18		17 16				15		14			13
GND = Pin 12																						SC00120		GND = Pin 12																					SC00121

IEC/IEEE SYMBOL ± 74ALS646/646-1

	21	G3
	3
		3 EN1 [BA]
	23	3 EN2 [AB]
		C4
	22
		G5
	1	C6
	2
		G7
	4	1	5	20
				4D
		1	5	1
		6D	7	1
		1	7	2
	5			19
	6			18
	7			17
	8			16
	9			15
	10			14
	11			13

SC00122

IEC/IEEE SYMBOL ± 74ALS648/648-1

	21	G3
	3
		3 EN1 [BA]
	23	3 EN2 [AB]
		C4
	22
		G5
	1	C6
	2
		G7
	4	1	5	20
				4D
		1	5	1
		6D	7	1
		1	7	2
	5			19
	6			18
	7			17
	8			16
	9			15
	10			14
	11			13

SC00123

1991 Feb 08

3

Philips Semiconductors Product specification

Transceiver/register			74ALS646/74ALS646-1
			74ALS648/74ALS648-1
BUS MANAGEMENT FUNCTIONS
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ALS646/646-1 and 74ALS648/648-1.
The select pins determine whether data is stored or transferred
through the device in real time.
The DIR determines which bus will receive data when the OE pin is
Low.
REAL TIME BUS TRANSFER	REAL TIME BUS TRANSFER	STORAGE FROM	TRANSFER STORED DATA
BUS B TO BUS A	BUS A TO BUS B	A, B, OR A AND B	TO A AND/OR B

BUS A

BUS B

BUS A

BUS B

BUS A

BUS B

BUS A

BUS B

OE

DIR CPAB CPBA SAB

SBA

OE DIR CPAB CPBA SAB

SBA

OE DIR CPAB CPBA SAB

SBA

OE DIR CPAB CPBA SAB

SBA

L L

X

X

X

L

L H

X

X

L

X

X

X

↑

X

X

X

L

L

X H or L X

H

X

X

X

↑

X

X

L

H H or L X

H

X

H X

↑

↑

X

X

SF00392

1991 Feb 08

4