INTEGRATED CIRCUITS
74ALS645A/74ALS645A±1
Octal transceiver (3±State)
Product specification |
1991 Jun 03 |
IC05 Data Handbook |
|
m n r
Philips Semiconductors |
Product specification |
|
|
|
|
|
|
|
Octal transceiver (3-State) |
74ALS645A/74ALS645A-1 |
|
|
|
|
|
|
|
FEATURES
•Octal bidirectional bus interface
•3-State buffer outputs sink 24mA and source 15mA
•Outputs are placed in high impedance state during power-off conditions
•The -1 version sinks 48mA IOL within the +5% VCC range
DESCRIPTION
The 74ALS645A is an octal transceiver featuring non-inverting 3-State bus compatible outputs in both transmit and receive
directions. The device features an output enable (OE) input for easy cascading and transmit/receive (R/T) input for direction control.
The 74ALS645A-1 is the same as the 74ALS645A except that both ports sink 48mA within the ±5% VCC range.
|
TYPICAL |
TYPICAL |
TYPE |
PROPAGATION |
SUPPLY CURRENT |
|
DELAY |
(TOTAL) |
|
|
|
74ALS645A |
7.0ns |
34mA |
|
|
|
74ALS645A-1 |
7.0ns |
34mA |
|
|
|
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PIN CONFIGURATION
|
|
|
1 |
|
20 |
VCC |
||
T/R |
|
|
||||||
|
|
|
|
|
|
|
|
|
A0 |
2 |
|
19 |
|
OE |
|
||
|
|
|
|
|
|
|
|
|
A1 |
3 |
|
18 |
B0 |
||||
|
|
|
|
|
|
|
|
|
A2 |
4 |
|
17 |
B1 |
||||
|
|
|
|
|
|
|
|
|
A3 |
5 |
|
16 |
B2 |
||||
|
|
|
|
|
|
|
|
|
A4 |
6 |
|
15 |
B3 |
||||
|
|
|
|
|
|
|
|
|
A5 |
7 |
|
14 |
B4 |
||||
|
|
|
|
|
|
|
|
|
A6 |
8 |
|
13 |
B5 |
||||
|
|
|
|
|
|
|
|
|
A7 |
9 |
|
12 |
B6 |
||||
|
|
|
|
|
|
|
|
|
GND |
10 |
|
11 |
B7 |
||||
|
|
|
SF00198 |
|
ORDERING INFORMATION |
|
|
||
|
|
|
||
|
ORDER CODE |
|
||
|
|
DRAWING |
||
DESCRIPTION |
COMMERCIAL RANGE |
|||
VCC = 5V |
± |
NUMBER |
||
|
10%, |
|
||
|
Tamb = 0°C to +70°C |
|
||
20-pin plastic DIP |
74ALS645AN, |
SOT146-1 |
||
74ALS645A-1N |
||||
|
|
|||
|
|
|
||
20-pin plastic SOL |
74ALS645AD, |
SOT163-1 |
||
744ALS645A-1D |
||||
|
|
|||
PINS |
DESCRIPTION |
74ALS (U.L.) |
LOAD VALUE |
|||||
HIGH/LOW |
HIGH/LOW |
|||||||
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
A0 ± A7, B0 ± B7 |
Data inputs |
1.0/1.0 |
20μA/0.1mA |
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Output Enable input (active-Low) |
1.0/1.0 |
20μA/0.1mA |
|
|
OE |
|||||||
|
|
|
|
|
Transmit/receive input |
1.0/1.0 |
20μA/0.1mA |
|
T/R |
||||||||
A0 ± A7 |
A port outputs |
750/240 |
15mA/24mA |
|||||
|
|
|
|
|||||
B0 ± B7 |
B port outputs |
750/240 |
15mA/24mA |
|||||
|
|
|
|
|||||
A0 ± A7 |
A port outputs (-1 version) |
750/480 |
15mA/48mA |
|||||
|
|
|
|
|||||
B0 ± B7 |
B port outputs (-1 version) |
750/480 |
15mA/48mA |
|||||
|
|
|
|
|
|
|
|
|
NOTE: One (1.0) ALS unit load is defined as: 20μA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL |
|
|
|
|
|
|
IEC/IEEE SYMBOL |
|
|
|
|
2 |
3 |
4 |
|
|
|
|
19 |
G3 |
|
|
5 |
6 |
7 |
8 |
9 |
|
||||
|
3EN1 [BA] |
|
||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1 |
3EN2 [AB] |
|
|
|
|
|
|
|
|
|
|
|
|
|
A0 |
A1 |
A2 |
A3 |
A4 |
A5 |
A6 |
A7 |
1 |
|
19 |
OE |
|
|
|
|
|
|
2 |
2 |
18 |
|
|
|
|
|
|
|
|
|||
1 |
T/R |
|
|
|
|
|
|
3 |
|
17 |
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
4 |
|
16 |
|
B0 |
B1 |
B2 |
B3 |
B4 |
B5 |
B6 |
B7 |
|
|
|
|
|
|
|
|
|
|
5 |
|
15 |
|
|
|
|
|
|
|
|
6 |
|
14 |
|
|
|
|
|
|
|
|
7 |
|
13 |
|
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
|
|
|
|
|
|
|
|
|
|
8 |
|
12 |
VCC = Pin 20 |
|
|
|
|
|
|
|
9 |
|
11 |
GND = Pin 10 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SF00199 |
|
SC00097 |
1991 Jun 03 |
2 |
853±0597 02709 |
Philips Semiconductors |
Product specification |
|
|
|
|
Octal transceiver (3-State) |
74ALS645A/74ALS645A-1 |
|
|
|
|
LOGIC DIAGRAM
|
A0 |
A1 |
A2 |
A3 |
A4 |
A5 |
A6 |
A7 |
|
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
OE |
19 |
|
|
|
|
|
|
|
T/R |
1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VCC = Pin 20 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
B0 |
B1 |
B2 |
B3 |
B4 |
B5 |
B6 |
B7 |
|
GND = Pin 10 |
|
|
|
|
|
|
|
SF00201 |
|
|
|
|
|
|
|
|
FUNCTION TABLE
|
|
|
|
INPUTS |
|
|
|
|
OUTPUTS |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
OE |
|
|
T/R |
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
L |
|
L |
|
Bus B data to Bus A |
|||
|
|
|
|
|
|
|
|
|||
|
|
|
L |
|
H |
|
Bus A data to Bus B |
|||
|
|
|
|
|
|
|
|
|||
|
|
|
H |
|
X |
|
Z |
|||
|
|
|
|
|
|
|
|
|
|
|
H |
= |
High voltage level |
|
|||||||
L |
= |
Low voltage level |
|
|||||||
X |
= |
Don't care |
|
|
|
|
|
|||
Z |
= |
High impedance ªoffº state |
|
|||||||
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL |
PARAMETER |
RATING |
UNIT |
||
|
|
|
|
|
|
VCC |
Supply voltage |
±0.5 to +7.0 |
V |
||
VIN |
Input voltage |
±0.5 to +7.0 |
V |
||
IIN |
Input current |
±30 to +5 |
mA |
||
VOUT |
Voltage applied to output in High output state |
±0.5 to VCC |
V |
||
IOUT |
Current applied to output in Low output state |
All versions |
48 |
mA |
|
|
|
|
|||
-1 version |
96 |
mA |
|||
|
|
||||
|
|
|
|
|
|
Tamb |
Operating free-air temperature range |
0 to +70 |
°C |
||
Tstg |
Storage temperature range |
±65 to +150 |
°C |
||
RECOMMENDED OPERATING CONDITIONS
SYMBOL |
PARAMETER |
|
|
LIMITS |
|
UNIT |
|
|
|
|
|||
|
MIN |
NOM |
MAX |
|||
|
|
|
|
|||
|
|
|
|
|
|
|
VCC |
Supply voltage |
|
4.5 |
5.0 |
5.5 |
V |
VIH |
High-level input voltage |
|
2.0 |
|
|
V |
VIL |
Low-level input voltage |
|
|
|
0.8 |
V |
IIK |
Input clamp current |
|
|
|
±18 |
mA |
IOH |
High-level output current |
|
|
|
±15 |
mA |
IOL |
Low-level output current |
All versions |
|
|
24 |
mA |
|
|
|
|
|
||
-1 version |
|
|
48 1 |
mA |
||
|
|
|
|
|||
Tamb |
Operating free-air temperature range |
|
0 |
|
+70 |
° |
|
|
|
C |
NOTES:
1. The 48mA limit applies only under the condition of VCC = 5.0V ± 5%.
1991 Jun 03 |
3 |
Loading...