Philips N74ALS153D, N74ALS153DB, N74ALS153N Datasheet

INTEGRATED CIRCUITS

74ALS153

Dual 4-input multiplexer

Product specification

1991 Feb 08

IC05 Data Handbook

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Philips Semiconductors	Product specification
Dual 4-input multiplexer	74ALS153

FEATURES

•Non±inverting outputs

•Common select outputs

•Separate enable for each section

•See 74ALS253 for 3±State version

DESCRIPTION

The 74ALS153 has two identical 4±input multiplexer with 3±State outputs which selects two bits of data from four sources by using common select inputs (S0, S1). The two 4±input multiplexer circuits have individual active±Low enables (Ea, Eb) which can be used to strobe the outputs independently. Outputs (Ya, Yb) are forced Low when the corresponding enable is high.

The 74ALS153 is the logic implementation of a 2±pole, 4±position switch where the position of the switch is determined by the logic levels supplied to the common select inputs.

		TYPICAL	TYPICAL
	TYPE		SUPPLY CURRENT
		PROPAGATION DELAY
			(TOTAL)
	74ALS153	7.0ns	6.5mA

PIN CONFIGURATION

	Ea		1		16	VCC
S1
			2		15		Eb
I3a						S0
			3		14
I2a						I3b
			4		13
I1a						I2b
			5		12
I0a						I1b
			6		11
	Ya					I0b
			7		10
GND						Yb
			8		9

SF00146

ORDERING INFORMATION

		ORDER CODE
			DRAWING
	DESCRIPTION	COMMERCIAL RANGE
		VCC = 5V ±10%,	NUMBER
		Tamb = 0°C to +70°C
	16-pin plastic DIP	74ALS153N	SOT38-4
	16-pin plastic SO	74ALS153D	SOT109-1
	16-pin plastic SSOP	74ALS153DB	SOT338-1
	Type II

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS									DESCRIPTION																74ALS (U.L.)									LOAD VALUE
																									HIGH/LOW									HIGH/LOW
Ioa ± I3a									Port A data inputs																	1.0/1.0								20μA/0.1mA
Iob ± I3b									Port B data inputs																	1.0/1.0								20μA/0.1mA
S0, S1									Common select inputs																	1.0/1.0								20μA/0.1mA
									Port A enable input																	1.0/1.0								20μA/0.1mA
			Ea
									Port B enable input																	1.0/1.0								20μA/0.1mA
			Eb
Ya, Yb									Data outputs																	130/240								2.6mA/24mA
NOTE: One (1.0) ALS unit load is defined as: 20μA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL																							IEC/IEEE SYMBOL
					6		5		4		3		10		11		12		13						14
																												0
																							2							G	0
																												1			3
					I0a		I1a		I2a		I3a		I0b		I1b		I2b		I3b
																							1					EN		MUX
14					S0																				6
																												0						7
2					S1																				5
																												1
1					Ea																				4
																												2
																									3
15					Eb																							3
									Ya				Yb
																									15
																									10									9
																									11
																							12
VCC = Pin 16									7				9										13
GND = Pin 8																					SF00147														SF00148

1991 Feb 08

2

853±1376 01670

Philips Semiconductors	Product specification
Dual 4-input multiplexer	74ALS153

LOGIC DIAGRAM

Ea	I0a	I1a	I2a	I3a	S1	S2	I0b	I0b	I2b	I3b	Eb
1	6	5	4	3	2	14	10	11	12	13	15

		7		9
VCC = Pin 16	Ya		Yb
GND = Pin 8

SF00149A

FUNCTION TABLE

			INPUTS						OUTPUT
S0	S1	I0n	I1n	I2n	I3n				Yn
							En
L	L	L	X	X	X		L		L
L	L	H	X	X	X		L		H
H	L	X	L	X	X		L		L
H	L	X	H	X	X		L		H
L	H	X	X	L	X		L		L
L	H	X	X	H	X		L		H
H	H	X	X	X	L		L		L
H	H	X	X	X	H		L		H

H = High voltage level

L = Low voltage level

X = Don't care

1991 Feb 08

3