INTEGRATED CIRCUITS
74LV03
Quad 2-input NAND gate
Product specification
Supersedes data of 1997 Mar 28
IC24 Data Handbook
1998 Apr 20
Philips Semiconductors Product specification
Quad 2-input NAND gate
FEA TURES
•Wide operating voltage: 1.0 to 5.5V
•Optimized for Low Voltage applications: 1.0 to 3.6V
•Accepts TTL input levels between V
•Typical V
T
amb
•Typical V
T
amb
(output ground bounce) 0.8V @ VCC = 3.3V,
OLP
= 25°C
(output VOH undershoot) 2V @ VCC = 3.3V,
OHV
= 25°C
•Level shifter capability
•Output capability: standard (open drain)
•I
category: SSI
CC
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PZL/tPLZ
C
I
C
PD
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1C
PD
= CPD V
P
D
f
= input frequency in MHz; CL = output load capacitance in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
2 The condition is V
3 The given value of CPD is obtained with : CL = 0 pF and RL = ∞
= 25°C; tr =tf 2.5 ns
amb
CC
2
V
L
fo) = sum of the outputs.
CC
Propagation delay
nA, nB to nY
Input capacitance 3.5 pF
Power dissipation capacitance per gate Notes 1, 2 4 pF
2
x fi (CL V
= GND to V
I
= 2.7V and VCC = 3.6V
CC
PARAMETER CONDITIONS TYPICAL UNIT
2
fo) where:
CC
CC
DESCRIPTION
The 74LV03 is a low–voltage Si–gate CMOS device and is pin and
function compatible with 74HC/HCT03.
The 74LV03 provides the 2–input NAND function.
The 74LV03 has open–drain N–transistor outputs, which are not
clamped by a diode connected to V
one input is LOW, the output may be pulled to any voltage between
GND and V
LOW–to–HIGH or HIGH–to–LOW level shifter. For digital operation
and OR–tied output applications, these devices must have a pull–up
resistor to establish a logic HIGH level.
CL = 15pF
VCC = 3.3V
. This allows the device to be used as a
Omax
. In the OFF–state, i.e. when
CC
8 ns
74L V03
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +125°C 74LV03 N 74LV03 N SOT27-1
14-Pin Plastic SO –40°C to +125°C 74LV03 D 74LV03 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C 74LV03 DB 74LV03 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C 74L V03 PW 74LV03PW DH SOT402-1
PIN DESCRIPTION
PIN
NUMBER
1, 4, 9, 12 1A to 4A Data inputs
2, 5, 10, 13 1B to 4B Data inputs
3, 6, 8, 11 1Y to 4Y Data outputs
7 GND Ground (0V)
14 V
SYMBOL FUNCTION
CC
Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUT
nA nB nY
L L Z
L H Z
H L Z
H H L
NOTES:
H = HIGH voltage level
L = LOW voltage level
Z = High impedance OFF-state
1998 Apr 20 853–1963 19257
2
Philips Semiconductors Product specification
74LV03Quad 2-input NAND gate
PIN CONFIGURATION
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
GND
LOGIC SYMBOL (IEEE/IEC)
1
2
&
14
V
13
4B
12
4A
11
4Y
3B
10
3A
9
3Y
87
SV00354
LOGIC SYMBOL
1A
1
CC
2
1B
4
2A
5
2B
9
3A
3B
10
12
4A
13
4B
1Y
2Y
3Y
4Y
SV00355
3
6
8
11
LOGIC DIAGRAM
Y
3
A
4
5
9
10
12
13
&
6
B
&
8
&
11
SV00356
GND
SV00357
1998 Apr 20
3
Philips Semiconductors Product specification
74LV03Quad 2-input NAND gate
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT
V
CC
V
V
T
amb
tr, t
NOTES:
1 The LV is guaranteed to function down to V
DC supply voltage See Note1 1.0 3.3 5.5 V
Input voltage 0 – V
I
Output voltage 0 – V
O
Operating ambient temperature range in free
air
Input rise and fall times
f
= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
CC
See DC and AC
characteristics
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V to 5.5V
–40
–40
–
–
–
–
–
–
–
CC
CC
+85
+125
500
200
100
50
V
V
°C
ns/V
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
±I
IK
±I
OK
±I
O
±I
GND
±I
CC
T
stg
P
TOT
DC supply voltage –0.5 to +7.0 V
DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
DC output source or sink current
– standard outputs
DC VCC or GND current for types with
,
–standard outputs 50
Storage temperature range –65 to +150 °C
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
–plastic shrink mini-pack (SSOP and TSSOP)
PARAMETER CONDITIONS RATING UNIT
–0.5V < VO < VCC + 0.5V
25
mA
mA
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2 The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 20
4