INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT688
8-bit magnitude comparator
Product specification |
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December 1990 |
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File under Integrated Circuits, IC06 |
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Philips Semiconductors |
Product specification |
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8-bit magnitude comparator |
74HC/HCT688 |
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FEATURES
·Compare two 8-bit words
·Output capability: standard
·ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT688 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT688 are 8-bit magnitude comparators. They perform comparison of two 8-bit binary or BCD words.
The output provides P = Q.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL |
PARAMETER |
CONDITIONS |
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TYPICAL |
UNIT |
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HC |
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HCT |
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tPHL/ tPLH |
propagation delay |
CL = 15 pF; VCC = 5 V |
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Pn, Qn to |
P = Q |
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17 |
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17 |
ns |
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E to |
P = Q |
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8 |
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12 |
ns |
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CI |
input capacitance |
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3.5 |
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3.5 |
pF |
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CPD |
power dissipation capacitance per package |
notes 1 and 2 |
30 |
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30 |
pF |
Notes
1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
å (CL ´ VCC2 ´ fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC - 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990 |
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Philips Semiconductors |
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Product specification |
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8-bit magnitude comparator |
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74HC/HCT688 |
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PIN DESCRIPTION |
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PIN NO. |
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SYMBOL |
NAME AND FUNCTION |
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1 |
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enable input (active LOW) |
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E |
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2, 4, 6, 8, 11, 13, 15, 17 |
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P0 to P7 |
word inputs |
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3, 5, 7, 9, 12, 14, 16, 18 |
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Q0 to Q7 |
word inputs |
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10 |
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GND |
ground (0 V) |
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19 |
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equal to output |
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P = Q |
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20 |
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VCC |
positive supply voltage |
Fig.1 Pin configuration. |
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Fig.2 Logic symbol. |
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Fig.3 IEC logic symbol. |
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December 1990 |
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