INTEGRATED CIRCUITS
74ABT377A
Octal D-type flip-flop with enable
Product specification
Replaces data sheet 74ABT377 of 1995 Sep 06
IC23 Data Handbook
1997 Feb 26
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
FEA TURES
•Ideal for addressable register applications
•8-bit positive edge-triggered register
•Enable for address and data synchronization applications
•Output capability: +64mA/-32mA
•Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Power-up reset
DESCRIPTION
The 74ABT377A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT377A has 8 edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered clock (CP)
input loads all flip-flops simultaneously when the Enable (E
Low.
The register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
The E
input must be stable one setup time prior to the Low-to-High
clock transition for predictable operation.
QUICK REFERENCE DATA
SYMBOL PARAMETER
t
PLH
t
PHL
C
I
CCH
IN
Propagation delay
CP to Qn
Input capacitance VI = 0V or V
Total current supply Outputs High; VCC = 5.5V 500 nA
CONDITIONS
= 25°C; GND = 0V
T
amb
CL = 50pF; VCC = 5V
CC
TYPICAL UNIT
3.1
3.6
4 pF
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic DIP –40°C to +85°C 74ABT377A N 74ABT377A N SOT146-1
20-Pin plastic SO –40°C to +85°C 74ABT377A D 74ABT377A D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT377A DB 74ABT377A DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT377A PW 74ABT377PWA DH SOT360-1
) input is
ns
PIN CONFIGURATION
E
1
2
Q0
3
D0
4
D1
5
Q1
6
Q2
7
D2
8
D3
9
Q3
GND
10 11
1997 Feb 26 853-1457 17800
20
V
CC
19
Q7
18
D7
17
D6
16
Q6
15
Q5
14
D5
13
D4
12
Q4
CP
SA00155
LOGIC SYMBOL
11
1
2
3478
D0 D1 D2 D3
CP
OE
Q0 Q1 Q296Q3
52
13 14 17 18
D4 D5 D6 D7
Q4 Q5 Q6
1512
Q7
1916
SA00152
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
LOGIC SYMBOL (IEEE/IEC)
1
G1
11
3
4
7
8
13
14
17
18
IC2
2D
LOGIC DIAGRAM
D0 D1 D2 D3
3478
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
1 E Enable input (active–Low)
3, 4, 7, 8, 13, 14,
17, 18
2, 5, 6, 9, 12, 15,
2
5
6
9
12
15
16
19
SA00157
16, 19
11 CP Clock Pulse input (active
10 GND Ground (0V)
20 V
D4 D5 D6 D7
13 14 17 18
D0-D7 Data inputs
Q0-Q7 Data outputs
rising edge)
CC
Positive supply voltage
CP
1
E
DQ
CP
11
D
CP
2 5 6 9 12 15 16 19
Q0 Q1 Q2 Q3
D
QQ
CP
DQ
CP
DQ
CP
D
CP
Q4 Q5 Q6 Q7
D
QQ
CP
DQ
CP
SA00158
1997 Feb 26
3
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
FUNCTION TABLE
INPUTS OUTPUTS OPERATING MODE
E CP Dn Qn
l ↑ h H Load “1”
l ↑ l L Load “0”
h
H
H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High clock transition
X = Don’t care
↑ = Low-to-High clock transition
↑
X
X
X
no change
no change
Hold (do nothing)
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C
PARAMETER CONDITIONS RATING UNIT
3
3
1, 2
–1.2 to +7.0 V
output in Off or High state –0.5 to +5.5 V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
MIN MAX
V
CC
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 0 5 ns/V
T
amb
DC supply voltage 4.5 5.5 V
Input voltage 0 V
I
High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
High-level output current –32 mA
Low-level output current 64 mA
Operating free-air temperature range –40 +85 °C
CC
V
1997 Feb 26
4