Panasonic PVDV-103 Schematic

NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES, REFER TO BEGINNING OF SCHEMATIC SECTION.
PV-DV103 / PV-DV203 / PV-DV103-K / PV-DV203-K
MAIN XI SCHEMATIC DIAGRAM
HRA5V
RF3V
REGD1.8V
TO M I
TO M VII TO M VII TO M VII TO M VII TO M VII TO M VII TO M VII TO M VII TO M VII TO M VII TO M VII
327
307 309 308 310 303 302 304 301 306 300 305
HA_OUT
RECCADJ
ATF_OUT
AGCCTL
RF_AGCOUT
HSE
RECCLK
EQHLD
RECCTL
HID2
PBH
RECI
(C,D)
L5001
100U
L5002
10U
C5001 10/6.3V
C5002
22/6.3V
C5006
PT
R5002
PT
R5010
6800
C5003
PT
C5005
0.01[KB]
C5007
0.01[KB]
REC VIDEO SIGNAL PB VIDEO SIGNAL REC AUDIO SIGNAL PB AUDIO SIGNAL
C5010
C5004 680P[KB]
1 2 3 4 5 6 7 8
9 10 11
PT
C5012
0.1
40
41
42
43
44
NC
PBOUT
AGCIN GND2(3V) AGCADJ AGCDET VCC2(3V) AGCOUT GAIN CTL 4TH RECIN 3RD RECIN 4TH CLKIN EQ HOLD
ENVCTL
HAMPOUT
(HEAD AMP)
NC13DGND14STAB15RCTL16HID217HID118PBH19RECI20VCC4(VDD)21AC3V22NC
12
0.01[KB]
C5011
37
38
39
GND
LPFOUT
GND1(4.8V)
IC5001
AN3732FJMEFV
1800
R5009
VWC
VCC1(4.8V)
35CA36
34
NC
AC2X
H2X
H2Y AC2Y AC1X
H1X
H1Y
HACTX
AC3X
H3X
H3Y
R5008
33 32 31 30 29 28 27 26
R5005
25 24 23
10K
10K
NOTE:
PARTS MARKED "PT" ARE NOT USED.
10KR5007 10KR5006
C5013
12P
C5014
C5015
12P
12P
TO M II
TO M VII
28
16
RA_STAB
HID1
R5011
0
C5009
0.1
118
NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES, REFER TO BEGINNING OF SCHEMATIC SECTION.
NOTE:
PARTS MARKED "PT" ARE NOT USED.
REC VIDEO SIGNAL PB VIDEO SIGNAL REC AUDIO SIGNAL PB AUDIO SIGNAL
COMPARISON CHART
OF MODELS & MARKS
MODEL
PV-DV103 PV-DV103-K PV-DV203 PV-DV203-K Not Used
MARK
A B C D PT
IC5001 IC- DETAIL BLOCK DIAGRAM
AC2X
H2X
H2Y AC2Y AC1X
H1X
H1Y
HACTX
AC3X
H3X
H3Y
44 43 42 41 40 39 38 37 36 35 34
1
2
R5008
10K
33 32 31
10KR5007
30
10KR5006
29 28 27 26
C5013
R5005
12P
10K
25 24 23
C5014
12P
C5015
12P
C5016
12P
FP5
12 GND 11 GND 10 GND
9
GND
8
GND
7
GND
6
GND
5
CH1F
4
CH1S
3
CH2S
2
CH2F
1
GND
CYLINDER UNIT
CH1 HEAD
CH2 HEAD
GND
3
4
VCC
5
(+3V)
6
7
8
9
10
11
AGC
12 13 14 15 16 17 18 19 20 21 22
AGC DET
LOGIC DRIVE GCA
GND
GND GND VCC
ENVE DET
AMP
LOGIC
LPF
(+5V)
VCC (+1.8V)
CH2
CH1
CH2
CH1
33
32
31
30
29
28
27
26
25
24
23
118
LINK TO VOLT AGE CHART
LSJB8226
MAIN XI SCHEMATIC DIAGRAM
PV-DV203/PV-DV203-K
NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES, REFER TO BEGINNING OF SCHEMATIC SECTION.
MAIN XII SCHEMATIC DIAGRAM
R1081 100K
TO M I
TO M I
BATT_T113
R1082 47K
BATT_D114
(C,D)
NOTE:
PARTS MARKED "PT" ARE NOT USED.
Do not use the part number on this diagram.
L1008 10U L1009 4R7U L1010 10U L1011 10U
LIGHT REG
UNREG POW
D1010 MAZ81000HL (10V)
R1086 100K
R1087
4.7K
Q1025
2SD2216J08
OVER VOLTAGE DET
Q1001
UNR9111 SWITCHING POWER ON-ON
R1005 4700
R1006 22K
R1010 4700
Q1003
UNR9115 (DRIVE)
R1015
R1012 1K
C1006 0.1
R1007 8200
C1003 100P
C1004 0.022
470
TP16
R1011 4700
C1001
0.033
C1013 PT
C1012
0.01
R1001
15K
R1002 22K
C1005
0.1
C1011 4700P
C1010 PT
L1001 J0JHC0000054
C1031 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C1032 10
IC1001
MB39A110PFT
(PWM CONTROL)
CS2
-INE2
FB2
DTC2
VCC
CTL
CTL1
CTL2
CTL3
CTL4
VREF
RT
CT
GND
CSCP
DTC3
FB3
-INE3
CS3
CS1
-INE1
FB1
DTC1
VCCO-P
OUT1-1
OUT1-2
OUT2-1
OUT2-2
GND01
GND02
OUT3
OUT4
VCCO-N
-INS
DTC4
FB4
-INE4
CS4
L1012 4R7U
L1002 LSLQJ05S100M
C1034 4R7
Q1004
B1ZBZ0000038
(+5V CONTROL)
R1003
R1004
12K
22K
38
37
C1015 PT
36
R1013
C1014
1K
0.01
35
34
C1007 1
33
32
31
30
29
28
27
26
C1008 1
25
24
23
C1017
R1014
4700P
150
22
C1016 PT
21
C1018
0.015
20
R1008
15K
R1009
22K
45
123
R1083
PT
Q1005
B1ZBZ0000038
(+3V CONTROL)
Q1010
PT
(+3V CONTROL)
Q1006
B1ZBZ0000038
+1.8V CONTROL
Q1011
PT +1.8V CONTROL
Q1007
B1DFCG000011
+15V CONTROL
123
123
C1043 680P
R1029 PT
C1045 PT
L1003 LSLQJ05S220M
45
R1084
PT
L1004 LSLQJ05S220M
45
R1085
PT
T1001
LSTP0112
1
2
3
4
SHORTCIRCUIT DETECT-ON
L1007
4R7U
R1024 9100
R1027 3K
R1028 33
8
7
6
5
Q1024
2SD2216
C1036 4R7
C1038 4R7
C1087
0.047 R1042
Q1008
XN09D61 CAP VM CONTROL
C1051 1
C1052 PT
0
C1046 1500P
C1048 2200P
D1002 MA2J111
D1003 MA2J111
D1009 MA2S111
6
1
C1053 1
C1056 1
L1016 4R7U L1015 10U L1014 10U L1013 4R7U
R1030 3900
R1033 3K
R1034 0
L1018 4R7U
L1017 4R7U
R1036 1500
R1039 3K
R1040 33
C1039 1
C1040 1
R1055 820K
L1005 LSLQJ05S330M
4
5
2
3
C1057 1
C1058 1
R1056 1M
C1037
0.01
D1004 PT
C1041 1
L1021
47U
C1062 1
C1064 1
C1075 1
C1070 1
C1050 1000P
R1046 3K
R1047 0
C1059 1
C1067 1
C1068 1
C1069 10/6.3V
L1019 47U
L1020 47U
R1043 33K
C1073 1
Q1009
XN09D61 CYL VM CONTROL
C1060 10/6.3V
C1088 10/6.3V
Q1014
2SB1462 SWITCHING ERROR VOLTAGE-ON
R1073
1K
R1077 3K
119
NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES, REFER TO BEGINNING OF SCHEMATIC SECTION.
PV-DV103 / PV-DV203 / PV-DV103-K / PV-DV203-K
C1046 1500P
C1048 2200P
D1002 MA2J111
D1003 MA2J111
D1009 MA2S111
6
1
C1053 1
C1056 1
L1016 4R7U L1015 10U L1014 10U L1013 4R7U
R1030 3900
R1033 3K
R1034 0
L1018 4R7U
L1017 4R7U
R1036 1500
R1039 3K
R1040 33
C1039 1
C1040 1
R1055 820K
L1005 LSLQJ05S330M
4
5
2
3
NOTE:
PARTS MARKED "PT" ARE NOT USED.
Q1020
B1ADNB000003
(+3.2V REGULATOR)
R1061 22
C1059 1
C1067 1
C1068 1
C1069 10/6.3V
L1019 47U
L1020 47U
R1043 33K
C1073 1
Q1009
XN09D61 CYL VM CONTROL
C1060 10/6.3V
C1088 10/6.3V
Q1014
2SB1462 SWITCHING ERROR VOLTAGE-ON
R1073
1K
R1077 3K
C1071 2R2
C1072 2R2
6
1
123
R1070 56
Q1016
2SD1819A
Q1022
2SD2216 OVER VOLTAGE DET
Q1018
2SB1462 OVER VOLTAGE DET
Q1019
2SB1218A
L1006 LSLQJ05S470M
4
5
2
3
C1057 1
C1058 1
R1056 1M
C1037
0.01
D1004 PT
C1041 1
L1021
47U
C1062 1
C1064 1
C1075 1
C1070 1
C1050 1000P
R1046 3K
R1047 0
C1082
123
45
C1065
0.01
R1072
2200
+12V REGULATOR
R1052 4700
R1058
R1059
22K
47K
C1042 1
1
45
C1086
0.01
IC1003
C0CBCAC00089
+2.5V REGULATOR
Q1013
2SC5592
R1071 10K
R1074
220
Q1015
XP4501 ERROR VOLTAGE DET
R1075 2200
D1006 MA8100-H (10V)
R1053 10K
R1054 4700
R1057 4700
R1060 1200
D1007 MA8068-M (6.8V)
-7.5V REGULATOR
Q1023
2SD2351
(+3V REGULATOR)
R1050 2200
D1005 MA2S111
IC1002
C0CBCBC00060
SHUNT REGULATOR
C1074 1
C1066 PT
+1.5V REGULATOR
R1076 2200
C1076 1
C1079 4700P
C1090
0.1
C1091
0.1
C1063 1
C1055 1
TP17
COMPARISON CHART
OF MODELS & MARKS
MODEL
TP1
P.ON_L 45 VBATT 111
POW_VREF 112 SYS UNREG UNREG DRIVE LCD 5V LCD BL5V AF 5V HRA5V
TP4
EVF/LCD 3V
TP3
TP5
CAM 3.2V REGA5V
TO M II TO M II TO M II
PV-DV103 PV-DV103-K PV-DV203 PV-DV203-K Not Used
MARK
A B C D PT
IC1001 IC- DETAIL BLOCK DIAGRAM
1
2
TRIWAVE
TP6
TP8
A3V RF3V SP3V REGD3V REGD2.5V REGA2.5V
323
TO M IX
3
4
VCC
5
6
7
ON/OFF
8
CONTROL
9
PWM CONTROL
PWM CONTROL
ERROR AMPERROR AMP
10
TP9
TP10
REGD1.8V
REGD1.5V
11
V-REF GND
TRIANGLE WAVE
12
OSCILLATOR
13
14
GND
SHORTCIRCUIT
15
PROTECT
PWM CONTROL
PWM CONTROL
DRIVE
DRIVE
16
TP12
TP11
LCD/EVF15V
CAMERA12V
17
ERROR AMP ERROR AMP
18
19
TP13
CAMERA-7.5V
TP14
LCD-15V CAP_VM 320
CAP_SW 321 CYL_VM 324 CYL_SW 322
TO M IX TO M IX TO M IX TO M IX
LINK TO VOLT AGE CHART
LSJB8226
MAIN XII SCHEMATIC DIAGRAM
PV-DV203/PV-DV203-K
DRIVE
DRIVE
DRIVE
DRIVE
VCC
GND
VCC
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
119
NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES, REFER TO BEGINNING OF SCHEMATIC SECTION.
PV-DV103 / PV-DV203 / PV-DV103-K / PV-DV203-K
MAIN XIII SCHEMATIC DIAGRAM
TO M I TO M I TO M I TO M I
TO M V TO M V TO M V
TO M V TO M V
328 329 330 331
253 252 251
246 245
EVF_M_COM
EVF_M_B EVF_M_G EVF_M_R
EVF/LCD 15V
EVF/LCD 3V
EVF_ROUT
EVF_GOUT
EVF_BOUT
VBLK
EVF/LCDHD
C901
0.1
R904 10K
Q902
2SD2216
OVER VOLT AGE DETECT
Q901
2SD2216
R901
(C,D)
+7V REGULATOR
L901
10U
C903 10/6.3V
R908
0
PT 0R902 0R903
R909
PT
C902
0.01
D901 MAZ80750ML
(7.5V) R910 3300
R911 5600
1C904 1C905 1C906 1C907
0.47C908
PTC909
VCC1
49
DSDOUT
50
NC
51
VREG
52
RIN
53
GIN
54
BIN
55
RESET
56
SYNCIN
57
VSEPTC
58
VDIN
59
HDIN
60
TEST1
61
TEST2
62
CLPIN
63
GND1
64
C921 1
1KR912 0R917 1KR913 1KR914 1KR915
0.47C916
0.47C917
44
43
FBG
0.47C918
41
42
FBB
GND2
GOUT
IC901
LV4149WM
EVF SIGNAL PROCESS
1C914
47
48
VCC2
SIGCENT
45
46
FBR
ROUT
40
BOUT
39
VCCCOM
37
38
COMOUT
GNDCOM
0.47C920
35
36
FBCOM
100R918 100R919 100R920
C910 PT
34
CSHO
C912 4R7/16V
33
SHIN
CSVO
VSS2
32
VD
31
ENB
30
XENB
29
CKV1
28
CKV2
27
STV
26
XSTV
25
DSG
24
XDSG
23
TEST7
22
TEST6
21
CKH1
20
CKH2
19
STH
18
XSTH
17
NOTE:
PARTS MARKED "PT" ARE NOT USED.
PB VIDEO SIGNALREC VIDEO SIGNAL
EVF_COM EVF_B EVF_G EVF_R EVF_DSD EVF_VDD
EVF_ENB EVF_XENB EVF_CKV1 EVF_CKV2 EVF_STV EVF_XSTV EVF_DSG EVF_XDSG
0R922
EVF_CKH1
0R923
EVF_CKH2 EVF_STH EVF_XSTH
TO M II TO M II TO M II
60 59 58
EVF_CS
EVF_DO
EVF_CLK
VDD12RPD3VSS14TEST45TEST56LOAD7DATA8SCLK9TEST810TEST311VDD212VDDO13BLSW14BLHD15HD16VSSO
1
C911
0.1
1KR905 1KR906 1KR907
C913 6800P
R916 10K
C915 1
C919 PT
R921
PT
EVF_BL_SW
Q903
UN9212
BACK LIGHT DRIVE
120
NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES, REFER TO BEGINNING OF SCHEMATIC SECTION.
NOTE:
PARTS MARKED "PT" ARE NOT USED.
COMPARISON CHART
OF MODELS & MARKS
MODEL
PV-DV103 PV-DV103-K PV-DV203 PV-DV203-K Not Used
MARK
A B C D PT
PB VIDEO SIGNALREC VIDEO SIGNAL
0R922 0R923
EVF_COM EVF_B EVF_G EVF_R EVF_DSD EVF_VDD
EVF_ENB EVF_XENB EVF_CKV1 EVF_CKV2 EVF_STV EVF_XSTV EVF_DSG EVF_XDSG
EVF_CKH1 EVF_CKH2 EVF_STH EVF_XSTH
TO M I332 333 TO M I 334 TO M I 335 TO M I 336 TO M I 337 TO M I
338 TO M I 339 TO M I 340 TO M I 341 TO M I 342 TO M I 343 TO M I 344 TO M I 345 TO M I
346 TO M I 347 TO M I 348 TO M I 349 TO M I
IC901 IC- DETAIL BLOCK DIAGRAM
47
CONTRAST CONTROL
SYNC SEPARATION
46 45 44 43
R G B VCC COM
DRIVE DRIVE DRIVE
INVERTER SW
SUB BRIGHTNESS CONTROL
BRIGHTNESS CONTROL
SAMPLING
V SYNC SEPARATION
& HOLD
GAMMA CORRECTION
SUB CONTRAST CONTROL
SUB CONTRAST CONTROL
41
42
GNDVCC
40
49
50
51
52
53
54
55
56
57
58
59
60
61
48
VCC
BUFFER
NC
V-REG
CLAMP
CLAMP
CLAMP
RESET
TEST 1
39 38
DRIVE
V-COM CONTROL
36 35 34 33
37
GND
RVS(L/R) CONTROL
RVS(U/D) CONTROL
EVF LCD PANEL DRIVE OUTPUT
GND
V DRIVE PULSE
ENABLE PULSE
INV. ENABLE PULSE
V LOCK PULSE 1
V LOCK PULSE 2
V START PULSE
INV. V START PULSE
TIMING PULSE
INV. TIMING PULSE
TEST 7
TEST 6
H CLOCK PULSE 1
32
31
30
29
28
27
26
25
24
23
22
21
20
R921
PT
120
EVF_BL_SW
Q903
UN9212
BACK LIGHT DRIVE
350 TO M I
62
63
64
TEST 2
VCOD/A CONVERTER
GND
SERIAL I/F
VDD GND VDD VDD GND
1 2 3 4 5 6 7 8 9 10 11 12
TEST 8 TEST 3
13 14 15 16
LINK TO VOLT AGE CHART
MAIN XIII SCHEMATIC DIAGRAM
H CLOCK PULSE 2
H START PULSE
INV. H START PULSE
BACKLIGHT CONTROL PULSE
BACKLIGHT DRIVE PULSE
H DRIVE PULSE
LSJB8226
PV-DV203/PV-DV203-K
19
18
17
NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES, REFER TO BEGINNING OF SCHEMATIC SECTION.
MAIN XIV SCHEMATIC DIAGRAM
(C,D)
NOTE:
PARTS MARKED "PT" ARE NOT USED.
Do not use the part number on this diagram.
REC VIDEO SIGNAL
TO M V TO M V TO M V TO M V TO M V TO M V TO M V TO M V TO M V TO M V
TO M III
TO M III TO M III TO M III TO M III
TO M III
183 184 185 186 187 188 189 190 191 192
172
174 173 170 171
178
ADIN[0] ADIN[1] ADIN[2] ADIN[3] ADIN[4] ADIN[5] ADIN[6] ADIN[7] ADIN[8] ADIN[9]
ADCLK1
PBLK
CPOB
DS1 DS2
CCDOUT
R502 PT
R503 0
R501
100
C501 PT
C502
0.1
C506
0.1
13 14 15 16 17 18 19 20 21 22 23 24
NC
VDD VSS VSS ADCLK VDD
C503 1
IC501
C1AB00001744
CAMERA SIGNAL PROCESS
1000PC505
R504 33K
C504 0.1
VDD PBLK CPOB SHP SHD NC VSS
AVSS26AVSS27AVDD28BYP129BYP230CCDIN31BLKC32BYP433AVDD34AUX2IN35AVSS36ADCIN
25
1
2D03D14D25D36D47D58D69D710D811D912
NC
SCLK
48
SDATA
47
LOAD
46
VSS
45
VDD
44 43
VDD
OE
42
VSS
41
NC
VRB
VRT
VRM
40 39 38 37
C509 10/6.3V
C507 PT
C508 PT
C514 1
C511 PT
C513
0.1
C510 PT
1C512
IC502
XC62FP2902MR
(REGULATOR)
3
REG.
GND
12
C515 1
L501
0
C516 PT
121
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