Page 1
– 11–1 –
11. CIRCUIT DIAGRAM
11.1. Circuit Diagram of Baseband and Memory
VCORE
BBCLK
ACC_INT
TP104
TD0
TP103
TDI
C100
0.1U
ADD[0..22]
R100
X100
10M
MC-146
BB
RINGTONE
BB
BB
GPIO18
GPIO19
GPIO20
GPIO21
BB
BB
BB
C120
NR ESET
E2RDY
18P
GPIO0
GPIO1
GPIO3
ADD0
H4
ADD1
ADD2
ADD3
ADD4
ADD5
ADD6
ADD7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
ADD15
ADD16
ADD17
ADD18
ADD19
ADD20
ADD21 NROM CS
ADD22
KEYROW0 0
KEYROW1 1
KEYROW2 2
KEYROW3 3
KEYROW4 4
KEYCOL0
KEYCOL1
KEYCOL2
KEYCOL3
KEYCOL4
CLKON
RF
DBBON
US C 0
US C 1
US C 2
US C 3
US C 4
US C 5
US C 6
BB
BB
BB
BB
GPIO8
BB
GPIO9
BB
PWRON
BB
GPIO11
BB
DBL3
BB
GPIO13
BB
GPIO14
BB
GPIO15
BB
GPIO16
BB
GPIO17
BB
GPIO18
BB
GPIO19
BB
GPIO20
BB
GPIO21
BB
JTAGEN
BB
GPIO32
ADD0
J3
ADD1
J2
ADD2
J4
ADD3
K3
ADD4
K2
ADD5
K4
ADD6
L4
ADD7
L1
ADD8
L3
ADD9
L5
ADD10
M1
ADD11
M2
ADD12
N1
ADD13
P1
ADD14
N2
ADD15
P2
ADD16
N3
ADD17
M3
ADD18
P4
ADD19
N4
ADD20
M4
ADD21
P5
ADD22/DISPLAYCS
A6
KEYPADROW0
F4
KEYPADROW1
D4
KEYPADROW2
B5
KEYPADROW3
A5
KEYPADROW4
C4
KEYPADCOL0
E4
KEYPADCOL1
B4
KEYPADCOL2
A4
KEYPADCOL3
C3
KEYPADCOL4
L12
CLKIN
G14
CLKON
B3
OSCOUT
A3
OSCIN
B2
PWRON
N14
RESET
C14
USC0
D12
USC1
A14
USC2
A13
USC3
E11
USC4
C12
USC5
B13
USC6
D11
GPIO_0
D10
GPIO_1
B12
GPIO_2
C11
GPIO_3
D9
GPIO_4
B11
GPIO_5
A11
GPIO_6
C10
GPIO_7
D8
GPIO_8
A10
GPIO_9
C9
GPIO_10
C7
GPIO_11
B9
GPIO_12
A9
GPIO_13
ADD[0..22]
KEYROW[0..4]
KEYCOL[0..4]
L120 2.2U
RF
C121
68P
NRESET
USC[0..6]
R114
0R
SIMDECT
GPIO7
TP102
TP101
TMS
TCK
TP105
JTAGEN
JTAGEN
C101
0.1U
K14
C8
VCC1H1VCC2P7VCC3
VCC4
GPIO_14B8GPIO_15A8GPIO_16D6GPIO_17B7GPIO_18
H14
H13
GPIO_19
GPIO_20
J12
J11
L9
VSIM
GPIO_21
JTAGEN
K11
VMEM
N13
VMEM1L2VMEM2N5VMEM3N9VMEM4
AD6525
U100
GPIO_32(WAIT)
GND1J1GND2K1GND3P3GND4L6GND5L8GND6
L14
C102
0.1U
P12
GND7
L11
VEXT VRTCVSIM
B14
VEXT1
GND8
C13
C103
0.1U
B10
D5
VEXT2
VEXT3C6VEXT4
GND9
GND10D7GND11B6VSSRTC
A12
VCORE
E3
VPEG1
(BACKLIGHT0)GPO_22
(BACKLIGHT1)GPO_23
A7
C5
D3
C104
0.1U
A2
DATA0
DATA1
DATA2
VDDRTC
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
ROMCS
RAMCS
GPCS0
GPCS1
(TXPA)GPO_2
(PA_NEGBIAS)GPO_4
(TXPHASE)GPO_7
(DCS_SW_SYNC)GPO_8
(DCS_SW_DRV)GPO_9
GSM_SW_SYNC)GPO_10
(GSM_SW_DRV)GPO_11
(TX_GSM)GPO_16
ADD23(TX_DCS)GPO_17
(OTH_EN)GPO_18
(OTH_VLO_EN)GPO_19
(OTH_DATA)GPO_20
(OTH_CLK)GPO_21
(RXON)GPO_0
(TXON)GPO_1
GPO_3
CLKOUT
CLKOUT_GATE
(VBCRESET)GPO_24
(ARSM)GPO_5
(ATSM)GPO_6
ADD23
BSOFS
SIMDATAOP
SIMCLK
(SIMRESET)GPIO_23
(SIMSUPPLY)GPIO_24
(SIMVPROG)GPIO_22
J13
L10
J14
K12
K13
BB
DBL1
BB
DBL2
R102
100R
C106
0.1U
RD
HWR
LWR
WE
ASDI
ASDO
ASFS
BSDO
BSDI
BSIFS
VSDI
VSDO
VSFS
BAT101
POLY
+
DATA[0..15]
DATA0
N6
DATA1
P6
DATA2
M6
DATA3
N7
DATA4
M7
DATA5
L7
DATA6
P8
DATA7
N8
DATA8
M8
DATA9
P9
DATA10
M9
DATA11
P10
DATA12
N10
DATA13
M10
DATA14
P11
DATA15
N11
NR D
M11
NH WR
N12
N LWR
P13
NWR
P14
M13
NRA M C S
M14
M12
NGP C S 1
L13
LCD_NRST
G13
H12
F14
F13
H11
F12
E14
E13
G11
E12
D14
D13
F11
B1
C2
G12
D1
D2
E1
A1
C1
E2
F1
F2
M5
F3
G4
G2
G1
G3
H3
H2
BB
SIMDATA
BB
SIMCLK
BB
SIMRST
BB
BB
BB
BB
BB
BB
BB
RF
RF
RF
RF
RF
RF
RF
RF
RF
RF
RF
RXEN
RF
BB
CLKOU T_GATE
VBCR ESET
ARSM
ASDI
ASDO
ASFS
ADD23
BB
BSDO
BSOFS
BSDI
BSIFS
VSDI
VSDO
VSFS
NR D
NH WR
N LWR
NGP CS0
NGP CS1
GPO2
RXEN1
VCTRL
TRSW2
TRSW1
TRSW3
TRSW4
TXEN1
SXEN
LE
DATA
CLK
TXEN
CLKO U T
NWR
BB
DATA[0..15]
E2RDY
NGP CS1
NR D
NWR
NH WR
N LWR
NRESET
NRA MCS
NROM CS
NGP CS1
ADD[0..22]
BB
BB
BB
BB
BB
AD D 1
AD D 2
AD D 3
AD D 4
AD D 5
AD D 6
AD D 7
AD D 8
AD D 9
AD D10
AD D11
AD D12
AD D13
AD D14
AD D15
AD D16
AD D17
AD D18
AD D19
AD D20
AD D21
AD D22
AD D 2
AD D 3
NR D
NWR
NGP C S 1
NR D
NWR
NH WR
N LWR
R11 0
TBD
A10
G2
A0
F2
A1
E2
A2
D2
A3
F3
A4
E3
A5
D3
A6
C3
A7
C7
A8
E7
A9
F7
A10
C8
A11
D8
A12
E8
A13
F8
A14
D9
A15
G9
A16
F4
A17
E4
A18
D7
A19
E6
A20
E9
A21
J1
ALE
H1
CLE
C1
RY/BYn
D1
REn
K1
WEn
E1
CEn
E5
RY/BYf
H3
OE
C6
WE
D4
UB
C4
LB
D5
RESET
D6
CE2ps
J2
CE1ps
H2
CEf
F5
CEf2(T)
F9
CEf2(A)
A5
A6
A7
A8
A9
NCA6
NCA7
NCA8
NCA9
NCA10
This part is combined
Toshiba:
THPV056702/03AABD
TH50VSF3680/3681AASB
TH50VSF3680/3681AASB
Fujitsu:
MB84VD2218XEC
TH50VPF5782/83
NCC10
NCD10
NCE10
NCF6
F6
G6
E10
C10
D10
B10
A1
A2
A3
A4
NCA1
NCA2
NCA3
NCA4
NCA5
NCG6
NCB10
ZABCDEFGHJK L MN
1
2
3
4
5
6
7
8
9
10
NCG8
NCH10
NCJ10
NCK9K9NCK10
G8
J10
K10
H10
R113
TBD
VMEM
M10
B1
B2
B3
B4
B5
B6
B7
B8
B9
NCB1
NCB2
NCB3
NCB4
NCB5
NCB6
NCB7
NCB8
NCB9
NCM10
NCL1L1NCL2L2NCL3L3NCL4L4NCL5L5NCL6L6NCL7L7NCL8L8NCL9L9NCL10
L10
M7
M8
M9
NCM7
NCM8
NCM9
NCM1M1NCM2M2NCM3M3NCM4
M4
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
ACC/WP
WPn
VCCn
VCCn
VCCf
VCCps
VCCf(128)
CIOf
CIOs
VSS
VSS
VSS
VSS
NCC9
NCC2
NCM6
NCM5
H8
K8
H7
J7
K5
J4
H4
K3
J8
G7
K7
H6
H5
K4
G4
J3
C5
K2
F10
F1
J5
J6
G5
H9
K6
J9
G1
G10
G3
C9
C2
M6
M5
DATA[0..15]
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA9
DATA8
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
R111
10K
VMEM
C110
0.1U
Page 2
– 11–2 –
11.2. Circuit Diagram of Voiceband
BB
VTCXO
VRTC
VCORE
VMEM
VEXT
VABB
VCTXO
VSIM
C205
2.2U
C206
10U
NRESET
NRESET
KEYROW4
C207
1U
BB
C208
4.7U
C209
0.1U
DBBON
PWRON
C202
0.1U
BB
2.2U
U201
DAN222
2.2U
C204
C203
R210
200K
C200
10U
CLKON
CLKOUT_GATE
VBCRESET
CLKOUT
ACC_INT
RINGTONE
RXEN
TXEN
ARSM
VSDI
VSDO
VSFS
BSDI
BSIFS
BSDO
BSOFS
ASDI
ASDO
ASFS
BB
KEYON
ABL1
ABL2
ABL3
C201
10U
RF
BB
BB
BB
VBAT
E15
F16
R6
N1
H16
D16
R1
E16
M1
C16
A16
D1
C2
D2
G1
G2
H1
H2
R7
T14
T13
L16
M15
M16
N15
R8
T16
L15
A11
B16
P1
A4
B4
A2
K1
K2
E1
F2
E2
F1
T4
T7
T2
T3
T6
J2
L1
J1
L2
T1
T8
N2
NC(VUSB)
NC(VAPP)
NC(VBACK)
VRTCIN
VRTC
VCORE
VCORE
VMEM
VMEM
VEXT
VEXT
VABB
VVCXO
VSIM
CRST
VCXOEN
NC(VAPPGATE)
MCLKEN
ABBRESET
REFEN
REFEN
MCLK
INT
GPI
RXON
TXON
ASM
ASDO
ASDI
ASFS
BSDO
BSOFS
BSDI
BSIFS
CSDO
CSDI
CSFS
RESET
DBBON
KEYON
KEYOUT
LIGHT1
LIGHT2
LIGHT3
LGND
SGND
SGND
AGND4
AGND3
AGND2
AGND1
F15
P2
R2
VMEMIN
VMEMIN
VCOREIN
NC(VUSBIN)
A3
B3
R5
VBAT3
VBAT5R4VBAT4
G15
H15
VBAT3
VBAT2
R10
C15
VBAT1
VBAT2
U200
AD6537
T10
SPWR
SPWR
BB
G16
T12
T5
R12
R3
LDOEN
NC_R12
VMEMSEL
NC(VBACKSEL)
LDOEN
C1
B1
A1
TDI
TDO
NC_G16
B2
TMS
B14
TCK
A15
A13
A12
B12
IP
IN
PA
AFCDAC
REFOUT
REFBB
CHGOSC
GATEDRIVE
CHGDACREF
ISENSE
VBATSENSE
REFCHG
BATTYPE
AUXADC1
AUXADC2
AOUT2P
AOUT2P
AOUT2N
AOUT2N
AOUT1P
AOUT1N
AOUT3P(L)
AOUT3N(R)
AIN3P(L)
AIN3N(R)
A14
QP
QN
REF
IBIAS
VCHG
TEMP1
TEMP2
VMIC
AIN1P
AIN1N
AIN2P
AIN2N
DGND
VREFOUT
B11
A10
B15
T15
B5
A5
A6
B7
A7
B8
D15
B6
B9
A8
B10
A9
R11
T11
R9
T9
J15
K15
J16
K16
R13
R14
N16
P16
R16
P15
R15
M2
R201 430R
RF
RF
RF
RF
VREFBB
BB
C215 0.1U
BB
BB
BB
BB
R212 TBD
R211 TBD
BB
BB
BB
R206
TBD
IP
IN
QP
QN
BB
VCHG
GATEDRIVE
BB
ISENSE
BB
VBATSENSE
BATTYPE
TEMP
AUXADC1
AUXADC2
VOICEP
VOICEN
AUXVOICEOUT
R207
TBD
C211 4.7U
C212 4.7U
C213 4.7U
R200 TBD
C214 10N
BB
LDSPKP
BB
LDSPKN
C216 0R
R208
TBD
BB
BB
AUXVOICEINP
BB
AUXVOICEINN
C218 0R
C219 0R
C220 0R
C221 0.1U
R209
TBD
RF
RF
REFCHG
AFC
RAMP
VREFOUT
R202
200K
NTC
R203 216
BB
MICP
BB
MICN
BB
AUXMIC
C223
0.1U
R204 2.2K
R205 TBD
VMIC
C222
0.1U
BB
AUXMICN
AGND0
AGND0M5AGND0M6AGND0M7AGND0
B13
M10
M11
AGND0L5AGND0L6AGND0L7AGND0
AGND0
AGND0
M12
L10
L11
AGND0K5AGND0K6AGND0K7AGND0
AGND0
AGND0
L12
K10
K11
AGND0G5AGND0G6AGND0G7AGND0
AGND0
AGND0
K12
AGND0
AGND0
G10
G11
G12
AGND0F5AGND0F6AGND0F7AGND0
AGND0
AGND0
F10
F11
F12
AGND0E5AGND0E6AGND0E7AGND0
AGND0
AGND0
E10
E11
E12
Page 3
– 11–3 –
11.3. Circuit Diagram of Others
Page 4
– 1–4 –
11.4. Circuit Diagram of RF Baseband-1
PDET
PDVCC
AN1161
PCSRX
DCSRX
TRSW3
TRSW1
TRSW2
GSMRX
BB
BB
BB
C1143
5p6
L1144
NM
L1142
NM
C1142
33p
L1162
NM
C1145
18p
C1146
18p
C1173
10p
L1146
18n
C1161
JP/0402
MM8430-2600
L1161
NM
C1171
10p
U1141
54CA-141
1
Tx D/P
2
Vc3(D/P Tx)
3
Rx-P
4
Vc1(P-rx)
5
Rx D
2
1
OUT
GND
GND
GND
GND
IN
C1141
39p
J1161
GND
6
12
R1153
33k/1%
6
5
4
3
TX G
GND
ANT
Vc2(G-tx)
RX G
GND
R1152
3k3/1%
C1153
33p/2%
11
10
9
8
7
24
R1151
3k3/1%
R1132
51/1%
U1131
7
G/O
6
G
5
D/O
LDC21897M19D
-078
C1172
33p
U1151
HSMS2825
3 1
C1151
33p/2%
8
CPL
G/I
G
D/I
ISO
4
R1131
22/1%
C1152
33p/2%
1
2
3
C1111
1p
C1105
NM/0402
C1108
NM/0805
L1101
4n7
C1107
100p/0402
L1102
3N9
C1104
NM/0402
C1106
22p/0402
C1110
NM
C1184
2U
B1101
BEAD/0603
10
GND
11
VCC
12
GND
C1112
10n
C1185
2U2
L1103
10n/0402
C1102
33p
9
GSM OUT
DCS/PCS OUT
13
7
GND8GND
GND14GND15VCC
C1113
33p
C1183
2U2
1 2
5
6
U1101
VCC
DCS/PCS IN
Vcmos
VAPC
GSM I N
CX77314
1
16
1 2
7
8
Vdd
CE1
Vout11Vout22Vout33GND
3
3
6
BS
5
CE2
4
4
4
3
2
4
CE3
R1104
JP
C1109
10U
C1116
R1105
2k2
R1103
JP
R1182
33k
U1181
NCP4523
C1101
150U
C1115
NM
33p
R1102
820/1%
C1117
1n/5%
R1181
10k/1%
R1101
JP
C1181
1U
DCSTX
VBAT
DCSEN
VAPC
GSMTX
C1182
NM
VTCXO
BB
VSYN
VTX
VRF
Page 5
– 11–5 –
11.5. Circuit Diagram of RF Bbaseband-2
VRF
VTX
GSMTX
DCSTX
VMEM
RXEN1
TXEN1
DCSEN
PDVCC
PDET
VRF
GSMRX
DCSRX
PCSRX
VAPC
RAMP
BB
BB
BB
U1261
4
G
IN1G
SAFSE942MAL0T05
BB
R1209
NM
R1210
JP
OUT
4
R1205
510
3
2
U1271
G
IN1G
B7744
U1281
4
L1241
27n
C1203
2.2n
R1204
390
OUT
G
OUT
IN1G
B7740
R1202
510/1%
C1205
100p
C1261
15p
3
2
3
2
C1249
NM
C1202
39p
R1206
51
220/1%
L1261
C1271
1p
R1203
8n2
L1271
2n2
C1248
33p
C1281
6p8
C1247
10p
L1201
180n/0603
C1262
15p
C1250
2p7
C1204
39p
C1282
15p
L1281
3n3
1
RXENA
2
TXENA
3
PCO
4
VCXO_EN
5
PDETVCC
6
VCC1
7
TXCPO
8
TXINP
9
LNA900IN
10
GNDLNA900
11
LNA1800IN
12
PDET
13
LNA1900IN
14
NC
15
NC
C1246
100n
C1211
22p
C1206
33p
R1208
110k
C1207
47p
56
16
L1211
82n
C1245
22p
55
TXVCOTUNE
TX1800/TX1900
PAVAPC
BBVAPC
17
51
53
54
TX900
VCCTXVCO
TXIP18TXIN19TXQ P20TXQ N21TXIFP22TXIFN23VCC224CAPIP25CAPIN26CAPQP27CAPQN
C1212
NM
52
VCC4
50
RXIP
RXIN
49
48
RXQP
C1214
470p
C1213
NM
46
47
VCC3
RXQN
VCCUHF
C1241
100n
44
45
UHFBYP
UHFTUNE
C1215
470p
R1214 JP
VDDBB
XTALTUNE
SXENA
VCCFN_CP
UHFCPO
GNDFN
XTALBUF
LPFADJ
CX74063
28
R1212 JP
VCCD
GNDD
C1229
220p
LE
CLK
DATA
XTAL
VCCF
C1244
100n
U1201
43
42
41
40
39
38
37
36
35
34
C1253 10p
33
32
31
30
29
R1221
39k/1%
C1221
22p
C1222
100n
C1216
100n
R1213 JP
C1243
22p
R1225
5k6/1%
C1223
NM
C1252 NMC1251 NM
C1242
10u
C1227
680p
R1294
JP
R1296
NM
C1292
NM
C1225
NM
C1224
100n
R1211 JP
C1226
100n
B1241
BEAD
R1226
2k/1%
C1228
8n2
U1291
2
G
3
OUT
C1294
1n
2 4
U1292
J1201
10
R1222
10
AFC
VCC
NM
5
NC7SZU04
3
R1292
1M
BB
IP
BB
IN
BB
QP
BB
QN
B1222
BEAD/0402
C1293
33n/0402
B1294
100K
1
4
R1293 JP
C1299
NM
B1221
BEAD
BB
BB
BB
BB
BB
BB
BB
VRF
VSYN
AFC
LE
CLK
DATA
SXEN
C1298
33n
VTCXO
BBCLK
VRF
BB
QN
BB
QP
BB
IN
BB
IP
Page 6
– 12–1 –
12. LAYOUT DIAGRAMS
12.1. Main PCB
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