PWM Current−Mode
Controller for Universal
Off−Line Supplies Featuring
Low Standby Power
Housed in SOIC−8 or PDIP−8 package, the NCP1200A enhances
the previous NCP1200 series by offering a reduced optocoupler
current together with an increased drive capability. Due to its novel
concept, the circuit allows the implementation of complete off−line
AC−DC adapters, battery charger or a SMPS where standby power is a
key parameter.
With an internal structure operating at a fixed 40 kHz, 60 kHz or
100 kHz, the controller supplies itself from the high−voltage rail,
avoiding the need of an auxiliary winding. This feature naturally eases
the designer task in battery charger applications. Finally,
current−mode control provides an excellent audio−susceptibility and
inherent pulse−by−pulse control.
When the current setpoint falls below a given value, e.g. the output
power demand diminishes, the IC automatically enters the so−called
skip cycle mode and provides excellent efficiency at light loads.
Because this occurs at a user adjustable low peak current, no acoustic
noise takes place.
The NCP1200A features an efficient protective circuitry which, in
presence of an overcurrent condition, disables the output pulses while
the device enters a safe burst mode, trying to restart. Once the default
has gone, the device auto−recovers.
• Internally Fixed Frequency at 40 kHz, 60 kHz and 100 kHz
• Direct Optocoupler Connection
• SPICE Models A vailable for TRANsient and AC Analysis
• Pin to Pin Compatible with NCP1200
T ypical Applications
• AC−DC Adapters for Portable Devices
• Offline Battery Chargers
• Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
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MINIATURE PWM
CONTROLLER FOR HIGH
POWER AC−DC W ALL
ADAPTERS AND OFFLINE
BATTERY CHARGERS
MARKING
DIAGRAMS
8
1
HV
8
NC
7
V
6
Drv
5
8
200Ay
ALYW
1
1200APxxx
CC
SOIC−8
8
1
8
1
xxx= Specific Device Code
y= Specific Device Code
A= Assembly Location
WL, L= Wafer Lot
Y, YY= Year
W, WW = Work Week
GND
D SUFFIX
CASE 751
PDIP−8
P SUFFIX
CASE 626
(40, 60 or 100)
(4 for 40, 6 for 60, 1 for 100)
PIN CONNECTIONS
Adj
1
FB
2
CS
3
4
(Top View)
AWL
YYWW
Semiconductor Components Industries, LLC, 2004
October, 2004− Rev. 5
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
1Publication Order Number:
NCP1200A/D
NCP1200A
EMI
FILTER
UNIVERSAL
INPUT
*Please refer to the application information section
PIN FUNCTION DESCRIPTION
*
+
NCP1200A
Adj
FB
CS
GND
V
Drv
HV
CC
8
7
6
5
+
1
2
3
4
Figure 1. Typical Application Example
V
+
OUT
Pin No. Pin NameFunctionPin Description
1AdjAdjust the skipping peak currentThis pin lets you adjust the level at which the cycle skipping process takes
2FBSets the peak current setpointBy connecting an optocoupler to this pin, the peak current setpoint is
3CSCurrent sense inputThis pin senses the primary current and routes it to the internal comparator
4GNDThe IC ground−
5DrvDriving pulsesThe driver’s output to an external MOSFET.
6V
7NC−This unconnected pin ensures adequate creepage distance.
8HVGenerates the VCC from the lineConnected to the high−voltage rail, this pin injects a constant current into
CC
Supplies the ICThis pin is connected to an external bulk capacitor of typically 10 F.
place. Shorting this pin to ground, permanently disables the skip cycle
feature.
adjusted accordingly to the output power demand.
via an L.E.B.
the V
bulk capacitor.
CC
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2
NCP1200A
Adj
FB
CURRENT
SENSE
GROUND
HV
1
8
HV CURRENT
SOURCE
80 k
1.2 V
2
SKIP CYCLE
COMPARATOR
+
−
INTERNAL V
UVLO HIGH AND LOW
INTERNAL REGULATOR
CC
NC
7
24 k
Q FLIP−FLOP
DCmax = 80%
3
250 ns
L.E.B.
40−60−100 kHz
CLOCK
20 k57 k
V
4
REF
+
−
5 V
25 k
1 V
SET
RESET
+
−
OVERLOAD?
Q
±250 mA
V
6
Drv
5
CC
FAULT DURATION
Figure 2. Internal Circuit Architecture
MAXIMUM RATINGS
RatingSymbolValueUnit
Power Supply VoltageV
Thermal Resistance Junction−to−Air, PDIP−8 Version
Thermal Resistance Junction−to−Air, SOIC Version
Maximum Junction TemperatureT
CC
R
JA
R
JA
J(max)
Temperature Shutdown−145°C
Storage Temperature Range−−60 to +150°C
ESD Capability, HBM Model (All pins except VCC and HV)−2.0kV
ESD Capability, Machine Model−200V
Maximum Voltage on Pin 8 (HV), Pin 6 (VCC) Grounded−450V
Maximum Voltage on Pin 8 (HV), Pin 6 (VCC) Decoupled to Ground with 10 F−500V
Minimum Operating Voltage on Pin 8 (HV)−40V
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
16V
100
178
°C/W
°C/W
150°C
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3
NCP1200A
ELECTRICAL CHARACTERISTICS (For typical values T
V
= 11 V unless otherwise noted.)
CC
Characteristic
= 25°C, for min/max values TJ = 0°C to +125°C, Max TJ = 150°C,
J
SymbolPinMinTypMaxUnit
Dynamic Self−Supply (All frequency versions, otherwise noted)
V
Increasing Level at which the Current Source Turns−OffV
CC
VCC Decreasing Level at which the Current Source Turns−OnV
VCC Decreasing Level at which the Latchoff Phase EndsV
CC(off)
CC(on)
CC(latch)
611.212.113.1V
69.01011V
6−5.4−V
Internal IC Consumption, No Output Load on Pin 5ICC16−7501000
(Note 1)
Internal IC Consumption, 1.0 nF Output Load on Pin 5, F
= 40 kHzICC26−1.21.4
SW
(Note 2)
Internal IC Consumption, 1.0 nF Output Load on Pin 5, F
= 60 kHzICC26−1.41.6
SW
(Note 2)
Internal IC Consumption, 1.0 nF Output Load on Pin 5, F
= 100 kHzICC26−1.92.2
SW
(Note 2)
Internal IC Consumption, Latchoff PhaseICC36−350−A
Internal Startup Current Source(TJ > 0°C, pin 8 biased at 50 V)
High−Voltage Current Source, V
= 10 VIC184.07.0−mA
CC
High−Voltage Current Source, VCC = 0IC28−13−mA
Drive Output
Output Voltage Rise−Time @ CL = 1.0 nF, 10−90% of Output Signal
Output Voltage Fall−Time @ CL = 1.0 nF, 10−90% of Output SignalT
Source ResistanceR
Sink ResistanceR
T
OH
OL
r
f
5−67−ns
5−25−ns
5274061
55.01021
Current Comparator (Pin 5 unloaded unless otherwise noted)
Input Bias Current @ 1.0 V Input Level on Pin 3
Maximum Internal Current Setpoint (Note 3)I
Default Internal Current Setpoint for Skip Cycle OperationI
Propagation Delay from Current Detection to Gate OFF StateT
Leading Edge Blanking Duration (Note 3)T