ON Semiconductor NCP1200 Technical data

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NCP1200

PWM Current−Mode
Controller for Low−Power
Universal Off−Line Supplies

Housed in SOIC−8 or PDIP−8 package, the NCP1200 represents a
major leap toward ultra−compact Switchmode Power Supplies. Due to
a novel concept, the circuit allows the implementation of a complete
offline battery charger or a standby SMPS with few external
components. Furthermore, an integrated output short−circuit
protection lets the designer build an extremely low−cost AC−DC wall
adapter associated with a simplified feedback scheme.

With an internal structure operating at a fixed 40 kHz, 60 kHz or
100 kHz, the controller drives low gate−charge switching devices like
an IGBT or a MOSFET thus requiring a very small operating power.
Due to current−mode control, the NCP1200 drastically simplifies the
design of reliable and cheap offline converters with extremely low
acoustic generation and inherent pulse−by−pulse control.

When the current setpoint falls below a given value, e.g. the output
power demand diminishes, the IC automatically enters the skip cycle
mode and provides excellent efficiency at light loads. Because this
occurs at low peak current, no acoustic noise takes place.

Finally, the IC is self−supplied from the DC rail, eliminating the
need of an auxiliary winding. This feature ensures operation in
presence of low output voltage or shorts.

Features

• No Auxiliary Winding Operation

• Internal Output Short−Circuit Protection

• Extremely Low No−Load Standby Power

• Current−Mode with Skip−Cycle Capability

• Internal Leading Edge Blanking

• 250 mA Peak Current Source/Sink Capability

• Internally Fixed Frequency at 40 kHz, 60 kHz and 100 kHz

• Direct Optocoupler Connection

• Built−in Frequency Jittering for Lower EMI

• SPICE Models Available for TRANsient and AC Analysis

• Internal Temperature Shutdown

• Pb−Free Packages are Available

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SOIC−8

8

8

1

xxx = Device Code: 40, 60 or 100
y = Device Code:

A = Assembly Location
L = Wafer Lot
Y, YY = Year
W, WW = Work Week

D SUFFIX
CASE 751

1

PDIP−8

P SUFFIX

CASE 626

4 for 40
6 for 60
1 for 100

PIN CONNECTIONS

Adj

18

FB

2

3

CS

GND

4

(Top View)

MARKING

DIAGRAMS

8

200Dy
ALYW

1

8

1200Pxxx

YYWW

1

HV

7

NC
V

6

CC

Drv

5

AWL

T ypical Applications

• AC−DC Adapters

• Offline Battery Chargers

• Auxiliary/Ancillary Power Supplies (USB, Appliances, TVs, etc.)

 Semiconductor Components Industries, LLC, 2004

December, 2004 − Rev. 13

1 Publication Order Number:

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.

NCP1200/D

NCP1200

Á

Á

Á

Á

Á

Á

Á

Á

C3

+

10 F
400 V

EMI

Filter

Universal Input

*Please refer to the application information section

PIN FUNCTION DESCRIPTION

Pin No.

ÁÁ

ÁÁ

1

2

3

4
5
6
7
8

Pin Name

Adj

ÁÁ

FB

CS

ÁÁ

GND

Drv

V

CC

NC
HV

Function

Adjust the Skipping Peak Current

БББББББ

Sets the Peak Current Setpoint

Current Sense Input

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The IC Ground
Driving Pulses
Supplies the IC
No Connection
Generates the VCC from the Line

*

HV

V

NC

CC

Drv

8
7
6
5

1

Adj

2

FB

3

CS
GND

4

+

C5

10 F

R

sense

Figure 1. T ypical Application

This pin lets you adjust the level at which the cycle skipping process takes
place.

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By connecting an Optocoupler to this pin, the peak current setpoint is ad­justed accordingly to the output power demand.

This pin senses the primary current and routes it to the internal comparator
via an L.E.B.

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The driver’s output to an external MOSFET.
This pin is connected to an external bulk capacitor of typically 10 F.
This un−connected pin ensures adequate creepage distance.
Connected to the high−voltage rail, this pin injects a constant current into

the V

bulk capacitor.

CC

1N5819

M1
MTD1N60E

Description

D2

+

Rf
470

D8
5 V1

C2
470 F/10 V

6.5 V @ 600 mA

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2

NCP1200

Á

Á

Á

Á

Adj

FB

Current

Sense

Ground

1

HV Current

8

HV

Source

75.5 k

1.4 V

2

Skip Cycle

Comparator

+

−

Internal

V

CC

UVLO

High and Low

Internal Regulator

7

NC

29 k

Q Flip−Flop

Set

3

250 ns

L.E.B.

40, 60 or
100 kHz

Clock

4

+

V

ref

−

5.2 V

60 k8 k

20 k

+

−

1 V

DCmax = 80%

Reset

Q

6

V

CC

5

Drv

±110 mA

Overload?

Fault Duration

Figure 2. Internal Circuit Architecture

MAXIMUM RATINGS

Rating

Power Supply Voltage
Thermal Resistance Junction−to−Air, PDIP−8 version

Thermal Resistance Junction−to−Air, SOIC version

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Maximum Junction Temperature
Typical Temperature Shutdown

Storage Temperature Range
ESD Capability, HBM Model (All Pins except VCC and HV)
ESD Capability, Machine Model
Maximum Voltage on Pin 8 (HV), pin 6 (VCC) Grounded
Maximum Voltage on Pin 8 (HV), Pin 6 (VCC) Decoupled to Ground with 10 F
Minimum Operating Voltage on Pin 8 (HV)

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.

Symbol

V

CC

R



JA

R



JA

ÁÁÁ

T

Jmax

−

T

stg

−

−

−

−

−

Value

16

100
178

ÁÁÁÁ

150
140

−60 to +150

2.0
200
450
500

30

Units

V

°C/W

ÁÁ

°C

°C

kV

V
V
V
V

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3

NCP1200

ELECTRICAL CHARACTERISTICS (For typical values T

V

= 11 V unless otherwise noted)

CC

Rating

= +25°C, for min/max values TJ = −25°C to +125°C, Max TJ = 150°C,

J

Pin Symbol Min Typ Max Unit

DYNAMIC SELF−SUPPLY (All Frequency Versions, Otherwise Noted)

VCC Increasing Level at Which the Current Source Turns−off 6 V
VCC Decreasing Level at Which the Current Source Turns−on 6 V
VCC Decreasing Level at Which the Latchoff Phase Ends 6 V
Internal IC Consumption, No Output Load on Pin 5 6 I

CCOFF

CCON

CClatch

CC1

10.3 11.4 12.5 V

8.8 9.8 11 V

− 6.3 − V

− 710 880
Note 1

Internal IC Consumption, 1 nF Output Load on Pin 5, FSW = 40 kHz 6 I

CC2

− 1.2 1.4
Note 2

Internal IC Consumption, 1 nF Output Load on Pin 5, FSW = 60 kHz 6 I

CC2

− 1.4 1.6
Note 2

Internal IC Consumption, 1 nF Output Load on Pin 5, FSW = 100 kHz 6 I

CC2

− 1.9 2.2
Note 2

Internal IC Consumption, Latchoff Phase 6 I

CC3

− 350 − A

INTERNAL CURRENT SOURCE

High−voltage Current Source, VCC = 10 V 8 I
High−voltage Current Source, VCC = 0 V 8 I

C1
C2

2.8 4.0 − mA

− 4.9 − mA

DRIVE OUTPUT

Output Voltage Rise−time @ CL = 1 nF, 10−90% of Output Signal
Output Voltage Fall−time @ CL = 1 nF, 10−90% of Output Signal 5 T
Source Resistance (drive = 0, Vgate = V

− 1 V) 5 R

CCHMAX

Sink Resistance (drive = 11 V, Vgate = 1 V) 5 R

5 T

OH
OL

r

f

− 67 − ns

− 28 − ns

27 40 61 

5 12 25 

CURRENT COMPARATOR (Pin 5 Un−loaded)

Input Bias Current @ 1 V Input Level on Pin 3 3 I
Maximum internal Current Setpoint 3 I
Default Internal Current Setpoint for Skip Cycle Operation 3 I
Propagation Delay from Current Detection to Gate OFF State 3 T
Leading Edge Blanking Duration 3 T

IB

Limit

Lskip

DEL
LEB

− 0.02 − A

0.8 0.9 1.0 V

− 350 − mV

− 100 160 ns

− 230 − ns

INTERNAL OSCILLATOR (VCC = 11 V, Pin 5 Loaded by 1 k)

Oscillation Frequency, 40 kHz Version − f
Oscillation Frequency, 60 kHz Version − f
Oscillation Frequency, 100 kHz Version − f
Built−in Frequency Jittering, FSW = 40 kHz − f
Built−in Frequency Jittering, FSW = 60 kHz − f
Built−in Frequency Jittering, FSW = 100 kHz − f

OSC
OSC
OSC

jitter
jitter
jitter

36 42 48 kHz
52 61 70 kHz
86 103 116 kHz

− 300 − Hz/V

− 450 − Hz/V

− 620 − Hz/V

Maximum Duty Cycle − Dmax 74 80 87 %

FEEDBACK SECTION (VCC = 11 V, Pin 5 Loaded by 1 k)

Internal Pullup Resistor 2 Rup − 8.0 − k
Pin 3 to Current Setpoint Division Ratio − Iratio − 4.0 − −

SKIP CYCLE GENERATION

Default skip mode level 1 Vskip 1.1 1.4 1.6 V
Pin 1 internal output impedance 1 Zout − 25 − k

1. Max value @ TJ = −25°C.

2. Max value @ T

= 25°C, please see characterization curves.

J

A

mA

mA

mA

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NCP1200

60

50

40

30

20

LEAKAGE (A)

10

0

−25

9.85

9.80

9.75

9.70

(V)

9.65

CCON

V

9.60

9.55

9.50

9.45

−25 755025 100 1250

11.70

11.60

11.50

(V)

11.40

CCOFF

V

11.30

11.20

0 −25 755025 100 1250

TEMPERATURE (°C)

5025

75

100 125

11.10

Figure 3. HV Pin Leakage Current vs.

Temperature

100 kHz

60 kHz

40 kHz

TEMPERATURE (°C)

900

850

800

(A)

750

CC1

I

700

650

600

−25 755025 100 1250

100 kHz

60 kHz

40 kHz

TEMPERATURE (°C)

Figure 4. VCC OFF vs. Temperature

100 kHz

60 kHz

40 kHz

TEMPERATURE (°C)

2.10

1.90

1.70

(mA)

1.50

CC2

I

1.30

1.10

0.90

−25 755025 100 1250

Figure 5. VCC ON vs. Temperature

100 kHz

60 kHz

40 kHz

TEMPERATURE (°C)

Figure 7. I

vs. Temperature

CC2

110
104

98
92
86
80

(kHz)

74

SW

68

F

62
56
50
44
38

−25 755025 100 1250

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5

Figure 6. I

TEMPERATURE (°C)

vs. Temperature

CC1

100 kHz

60 kHz

40 kHz

Figure 8. Switching Frequency vs. T

J

NCP1200

6.50

6.45

6.40

(V)

6.35

CCLATCHOFF

6.30

V

6.25

6.20

−25

60

50

40



30

20

10

460
430
400
370
340

(A)

310

CC3

I

280
250
220

250

TEMPERATURE (°C)

50 75 100

125

190

TEMPERATURE (°C)

Figure 9. VCC Latchoff vs. Temperature Figure 10. I

1.00

Source

Sink

0.96

0.92

0.88

0.84

CURRENT SETPOINT (V)

50 75250 100−25 125

vs. Temperature

CC3

1.34

1.33

1.32

(V)

1.31

skip

V

1.30

1.29

1.28

0

TEMPERATURE (°C)

Figure 11. DRV Source/Sink Resistances

50 75250 100−25 125

TEMPERATURE (°C)

Figure 13. V

vs. Temperature

skip

0.80

TEMPERATURE (°C)

50 75250 100−25 12550 75250 100−25 125

Figure 12. Current Sense Limit vs. Temperature

86.0

84.0

82.0

80.0

78.0

DUTY−MAX (%)

76.0

74.0

TEMPERATURE (°C)

50 75250 100−25 125

Figure 14. Max Duty Cycle vs. T emperature

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