MC33501, MC33503
l
l
l
l
s
1.0 V, Rail−to−Rail, Single
Operational Amplifiers
The MC33501/503 operational amplifier provides rail−to−rail
operation on both the input and output. The output can swing within 50
mV of each rail. This rail−to−rail operation enables the user to make
full use of the entire supply voltage range available. It is designed to
work at very low supply voltages (1.0 V and ground), yet can operate
with a supply of up to 7.0 V and ground. Output current boosting
techniques provide high output current capability while keeping the
drain current of the amplifier to a minimum.
Features
• Low Voltage, Single Supply Operation (1.0 V and Ground to 7.0 V
and Ground)
• High Input Impedance: Typically 40 fA Input Bias Current
• Typical Unity Gain Bandwidth @ 5.0 V = 4.0 MHz,
@ 1.0 V = 3.0 MHz
• High Output Current (I
• Output Voltage Swings within 50 mV of Both Rails @ 1.0 V
• Input Voltage Range Includes Both Supply Rails
• High Voltage Gain: 100 dB Typical @ 1.0 V
• No Phase Reversal on the Output for Over−Driven Input Signals
• Typical Input Offset of 0.5 mV
• Low Supply Current (I
• 600 W Drive Capability
• Extended Operating Temperature Range (−40 to 105°C)
• Pb−Free Packages are Available
Applications
• Single Cell NiCd/Ni MH Powered Systems
• Interface to DSP
• Portable Communication Devices
• Low Voltage Active Filters
• Telephone Circuits
• Instrumentation Amplifiers
• Audio Applications
• Power Supply Monitor and Control
• Transistor Count: 98
= 40 mA @ 5.0 V, 13 mA @ 1.0 V)
SC
= 1.2 mA/per Amplifier, Typical)
D
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MARKING
DIAGRAM
SOT23−5
5
1
(Note: Microdot may be in either location)
Output
Non−Inverting
Input
Output
Non−Inverting
Input
Device Package Shipping
MC33501SNT1 SOT23−5 3000 Tape & Ree
MC33501SNT1G SOT23−5
MC33503SNT1 SOT23−5 3000 Tape & Ree
SN SUFFIX
CASE 483
xxx = AAA; MC33501
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
V
CC
V
EE
ORDERING INFORMATION
AAB; MC33503
PIN CONNECTIONS
MC33501
1
2
+−
3
(Top View)
MC33503
1
2
+−
3
(Top View)
(Pb−Free)
5
xxx AYWG
G
1
5
V
EE
4
Inverting Input
5
V
CC
4
Inverting Input
†
3000 Tape & Ree
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 10
MC33503SNT1G SOT23−5
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD801 1/D.
1 Publication Order Number:
3000 Tape & Ree
MC33501/D
MC33501, MC33503
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Á
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Base
Current
Boost
Inputs
Input
Stage
Buffer with 0 V
Level Shift
Output
Stage
Outputs
Saturation
Offset
Voltage
Trim
Detector
Base
Current
Boost
This device contains 98 active transistors per amplifier.
Figure 1. Simplified Block Diagram
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (V
ESD Protection Voltage at any Pin
Human Body Model
БББББББББББББББББ
Voltage at Any Device Pin
Input Differential Voltage Range
Common Mode Input Voltage Range
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature Range
Maximum Power Dissipation
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Opera t i n g Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Power dissipation must be considered to ensure maximum junction temperature (T
2. ESD data available upon request.
CC
to VEE)
V
S
V
БББББ
ESD
V
DP
V
IDR
V
CM
t
S
T
J
T
stg
P
D
) is not exceeded.
J
7.0
2000
БББББ
V
±0.3
S
VCC to V
VCC to V
EE
EE
Note 1
150
−65 to 150
Note 1
V
V
Á
V
V
V
s
°C
°C
mW
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2
MC33501, MC33503
DC ELECTRICAL CHARACTERISTICS (V
= 5.0 V, VEE = 0 V, VCM = VO = VCC/2, RL to VCC/2, TA = 25°C, unless
CC
otherwise noted.)
Input Offset Voltage (V
Characteristic
= 0 to VCC)
CM
Symbol Min Typ Max Unit
V
IO
VCC = 1.0 V
T
= 25°C −5.0 0.5 5.0
A
TA = −40° to 105°C −7.0 − 7.0
VCC = 3.0 V
T
= 25°C −5.0 0.5 5.0
A
TA = −40° to 105°C −7.0 − 7.0
VCC = 5.0 V
T
= 25°C −5.0 0.5 5.0
A
TA = −40° to 105°C −7.0 − 7.0
Input Offset Voltage Temperature Coefficient (RS = 50 W)
DVIO/DT
−
8.0
TA = −40° to 105°C
Input Bias Current (VCC = 1.0 to 5.0 V)
Common Mode Input Voltage Range
Large Signal Voltage Gain
V
= 1.0 V (TA = 25°C)
CC
RL = 10 kW
RL = 1.0 kW
V
= 3.0 V (TA = 25°C)
CC
RL = 10 kW
RL = 1.0 kW
V
= 5.0 V (TA = 25°C)
CC
RL = 10 kW
RL = 1.0 kW
Output Voltage Swing, High (VID = ±0.2 V)
V
= 1.0 V (TA = 25°C)
CC
R
= 10 kW
L
RL = 600 W
I I
V
A
V
IB
ICR
VOL
OH
I
−
V
EE
0.00004
−
25 100 −
5.0 50 −
50 500 −
25 100 −
50 500 −
25 200 −
0.9 0.95 −
0.85 0.88 −
VCC = 1.0 V (TA = −40° to 105°C)
R
L
= 10 kW
0.85 − −
V
1.0
−
CC
mV
mV/°C
nA
V
kV/V
V
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3
MC33501, MC33503
DC ELECTRICAL CHARACTERISTICS (continued) (V
= 5.0 V, VEE = 0 V, VCM = VO = VCC/2, RL to VCC/2, TA = 25°C, unless
CC
otherwise noted.)
Characteristic UnitMaxTypMinSymbol
Output Voltage Swing, Low (VID = ±0.2 V)
V
= 1.0 V (TA = 25°C)
CC
R
= 10 kW
L
RL = 600 W
V
OL
0.05 0.02 −
0.1 0.05 −
VCC = 1.0 V (TA = −40° to 105°C)
R
= 10 kW
L
RL = 600 W
V
= 3.0 V (TA = 25°C)
CC
R
= 10 kW
L
RL = 600 W
0.1 − −
0.15 − −
0.05 0.02 −
0.1 0.08 −
VCC = 3.0 V (TA = −40° to 105°C)
R
= 10 kW
L
RL = 600 W
V
= 5.0 V (TA = 25°C)
CC
R
= 10 kW
L
RL = 600 W
0.1 − −
0.15 − −
0.05 0.02 −
0.15 0.1 −
VCC = 5.0 V (TA = −40° to 105°C)
R
= 10 kW
L
RL = 600 W
Common Mode Rejection (V
Power Supply Rejection
= 0 to 5.0 V) CMR 60 75 − dB
in
PSR
0.1 − −
0.2 − −
60
75
VCC/VEE = 5.0 V/Ground to 3.0 V/Ground
Output Short Circuit Current (Vin Diff = ±1.0 V)
I
SC
VCC = 1.0 V
Source 6.0 13 26
Sink 10 13 26
VCC = 3.0 V
Source 15 32 60
Sink 40 64 140
VCC = 5.0 V
Source 20 40 140
Sink 40 70 140
Power Supply Current (Per Amplifier, VO = 0 V)
I
D
VCC = 1.0 V − 1.2 1.75
VCC = 3.0 V − 1.5 2.0
VCC = 5.0 V − 1.65 2.25
VCC = 1.0 V (TA = −40 to 105°C) − − 2.0
VCC = 3.0 V (TA = −40 to 105°C) − − 2.25
VCC = 5.0 V (TA = −40 to 105°C) − − 2.5
V
−
dB
mA
mA
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MC33501, MC33503
AC ELECTRICAL CHARACTERISTICS (V
Characteristic
Slew Rate (VS = ±2.5 V, VO = −2.0 to 2.0 V, RL = 2.0 kW, AV = 1.0)
= 5.0 V, VEE = 0 V, VCM = VO = VCC/2, TA = 25°C, unless otherwise noted.)
CC
Symbol Min Typ Max Unit
SR
Positive Slope 1.8 3.0 6.0
Negative Slope 1.8 3.0 6.0
Gain Bandwidth Product (f = 100 kHz)
GBW
VCC = 0.5 V, VEE = −0.5 V 2.0 3.0 6.0
VCC = 1.5 V, VEE = −1.5 V 2.5 3.5 7.0
VCC = 2.5 V, VEE = −2.5 V 3.0 4.0 8.0
Gain Margin (RL =10 kW, CL = 0 pF)
Phase Margin (RL = 10 kW, CL = 0 pF)
Channel Separation (f = 1.0 Hz to 20 kHz, RL = 600 W)
Power Bandwidth (VO = 4.0 Vpp, RL = 1.0 kW, THD ≤1.0%)
Total Harmonic Distortion (V
= 4.5 Vpp, RL = 600 W, AV = 1.0)
O
Am
f
m
CS
BW
THD
P
−
−
−
−
6.5
60
120
200
f = 1.0 kHz − 0.004 −
f = 10 kHz − 0.01 −
Differential Input Resistance (VCM = 0 V)
Differential Input Capacitance (VCM = 0 V)
Equivalent Input Noise Voltage (VCC = 1.0 V, VCM = 0 V, VEE = GND,
R
in
C
in
e
n
−
−
>1.0
2.0
RS = 100 W)
f = 1.0 kHz − 30 −
V/ms
MHz
−
−
−
−
dB
Deg
dB
kHz
%
−
−
terraW
pF
nV/√Hz
IN−
V
CC
IN+
Offset
Voltage
Trim
V
CC
V
CC
Output
Voltage
Saturation
Clamp
V
CC
Out
Detector
Body
Bias
Figure 2. Representative Block Diagram
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5
MC33501, MC33503
General Information
The MC33501/503 dual operational amplifier is unique in
its ability to provide 1.0 V rail−to−rail performance on both
the input and output by using a SMARTMOSt process. The
amplifier output swings within 50 mV of both rails and is
able to provide 50 mA of output drive current with a 5.0 V
supply, and 10 mA with a 1.0 V supply. A 5.0 MHz
bandwidth and a slew rate of 3.0 V/ms is achieved with high
speed depletion mode NMOS (DNMOS) and vertical PNP
transistors. This device is characterized over a temperature
range of −40°C to 105°C.
Circuit Information
Input Stage
One volt rail−to−rail performance is achieved in the
MC33501/503 at the input by using a single pair of depletion
mode NMOS devices (DNMOS) to form a differential
amplifier with a very low input current of 40 fA. The normal
input common mode range of a DNMOS device, with an ion
implanted negative threshold, includes ground and relies on
the body effect to dynamically shift the threshold to a
positive value as the gates are moved from ground towards
the positive supply. Because the device is manufactured in
a p−well process, the body effect coefficient is sufficiently
large to ensure that the input stage will remain substantially
saturated when the inputs are at the positive rail. This also
applies at very low supply voltages. The 1.0 V rail−to−rail
input stage consists of a DNMOS differential amplifier, a
folded cascode, and a low voltage balanced mirror. The l ow
voltage cascaded balanced mirror provides high 1st stage
gain and base current cancellation without sacrificing signal
integrity. A common mode feedback path is also employed
to enable the offset voltage to track over the input common
mode voltage. The total operational amplifier quiescent
current drop is 1.3 mA/amp.
Output Stage
An additional feature of this device is an “on demand”
base current cancellation amplifier. This feature provides
base drive to the output power devices by making use of a
buffer amplifier to perform a voltage−to−current
conversion. This is done in direct proportion to the load
conditions. This “on demand” feature allows these
amplifiers to consume only a few micro−amps of current
when the output stage is in its quiescent mode. Yet it
provides high output current when required by the load. The
rail−to−rail output stage current boost circuit provides
50 mA of output current with a 5.0 V supply (For a 1.0 V
supply output stage will do 10 mA) enabling the operational
amplifier to drive a 600 W load. A buffer is necessary to
isolate the load current effects in the output stage from the
input stage. Because of the low voltage conditions, a
DNMOS follower is used to provide an essentially zero
voltage level shift. This buffer isolates any load current
changes on the output stage from loading the input stage. A
high speed vertical PNP transistor provides excellent
frequency performance while sourcing current. The
operational amplifier is also internally compensated to
provide a phase margin of 60 degrees. It has a unity gain of
5.0 MHz with a 5.0 V supply and 4.0 MHz with a 1.0 V
supply.
Low Voltage Operation
The MC33501/503 will operate at supply voltages from
0.9 to 7.0 V and ground. When using the MC33501/503 at
supply voltages of less than 1.2 V, input of fset voltage may
increase slightly as the input signal swings within
approximately 5 0 m V o f the p ositive s upply r ail. This effect
occurs only for supply voltages below 1.2 V, due to the input
depletion mode MOSFET s starting to transition between the
saturated to linear region, and should be considered when
designing high side dc sensing applications operating at the
positive supply rail. Since the device is rail−to−rail on both
input and output, high dynamic range single battery cell
applications are now possible.
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6
MC33501, MC33503
0
200
400
600
600
400
200
OUTPUT SATURATION VOLTAGE (mV)
sat,
V
0
100
1.0 k
1000
100
10
1.0
0.1
0.01
, INPUT CURRENT (pA)
IB
I
0.001
0
25
VCC = 5.0 V
V
= 0 V
EE
R
to VCC/2
L
10 k
100 k
RL, LOAD RESISTANCE (W)
Figure 3. Output Saturation
versus Load Resistance
50
T
, AMBIENT TEMPERATURE (°C)
A
75
1.0 M
100
0
OUTPUT SATURATION VOLTAGE (V)
sat,
V
−0.5
−1.0
1.0
0.5
Source
Saturation
Sink
Saturation
0
VCC − VEE = 5.0 V
TA = 125°C
TA = −55°C
8.00 4.0 12 16 20 24
V
CC
V
EE
10 M
TA = −55°C
TA = 25°C
TA = 25°C
V
TA = 125°C
V
CC
EE
IO, OUTPUT CURRENT (mA)
Figure 4. Drive Output Source/Sink Saturation
Voltage versus Load Current
100
0
45
90
135
, EXCESS PHASE (DEGREES)
m
φ
180
125
80
60
, GAIN (dB)
40
VOL
A
20
0
1.0
Gain
Phase
Phase Margin = 60°
V
= 2.5 V
CC
V
= −2.5 V
EE
R
= 10 k
L
10 100 1.0 k 10 k 100 k 1.0 M 10 M
f, FREQUENCY (Hz)
Figure 5. Input Current versus Temperature Figure 6. Gain and Phase versus Frequency
VCC = 0.5 V
VEE = −0.5 V
A
= 1.0
CL
C
= 10 pF
L
R
20 mV/DIV
= 10 k
L
TA = 25°C
1.0 V/DIV (mV)
VCC = 2.5 V
VEE = −2.5 V
A
= 1.0
CL
C
= 10 pF
L
= 600 W
R
L
T
= 25°C
A
t, TIME (1.0 ms/DIV)t, TIME (500 ms/DIV)
Figure 7. Transient Response Figure 8. Slew Rate
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7
MC33501, MC33503
1600
1400
1200
1000
SO−8 Pkg
DIP Pkg
800
600
400
200
MAXIMUM POWER DISSIPATION (mW)
max,
0
−55 −25 0 25 50 75 100 125
PD
TA, AMBIENT TEMPERATURE (°C)
Figure 9. Maximum Power Dissipation
versus Temperature
8.0
7.0
)
pp
6.0
5.0
4.0
VCC = 2.5 V
3.0
VEE = −2.5 V
A
= 1.0
2.0
1.0
0
10
V
= 600 W
R
L
TA = 25°C
100
1.0 k 10 k 100 k 1.0 M
f, FREQUENCY (Hz)
, OUTPUT VOLTAGE (V
O
V
120
110
100
90
80
70
60
, OPEN LOOP GAIN (dB)
VOL
ΔA
50
40
VCC = 2.5 V
V
= −2.5 V
EE
= 600 W
R
L
30
20
−55 −25 50 75 100 125
025
, AMBIENT TEMPERATURE (°C)
T
A
Figure 10. Open Loop Voltage Gain
versus Temperature
120
100
80
60
40
VCC = 2.5 V
V
= −2.5 V
EE
20
T
= 25°C
A
CMR, COMMON MODE REJECTION (dB)
0
100 1.0 k 10 k 100 k10
f, FREQUENCY (Hz)
1.0 M
Figure 11. Output Voltage versus Frequency Figure 12. Common Mode Rejection
140
120
100
80
60
40
Either VCC or V
20
PSR, POWER SUPPLY REJECTION (dB)
TA = 25°C
0
VCC = 2.5 V
V
= −2.5 V
EE
VCC = 0.5 V
VEE = −0.5 V
EE
100 1.0 k 10 k10 100 k
Figure 13. Power Supply Rejection
versus Frequency
versus Frequency
100
VCC = 2.5 V
V
= −2.5 V
EE
80
T
= 25°C
A
Sink
60
40
Source
20
I, OUTPUT SHORT CIRCUIT CURRENT (mA)
0
SC
0 0.5 1.0 1.5 2.0 2.5
II
|VS| − |VO| (V)f, FREQUENCY (Hz)
Figure 14. Output Short Circuit Current
versus Output Voltage
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8
MC33501, MC33503
100
80
Sink
60
VCC = 2.5 V
V
= −2.5 V
EE
40
20
I, OUTPUT SHORT CIRCUIT CURRENT (mA)
0
SC
−55 −25 0 25 50 75 100 125
II
T
Source
, AMBIENT TEMPERATURE (°C)
A
Figure 15. Output Short Circuit Current
versus Temperature
50
VCC = 3.0 V
V
= 1.5 V
O
40
V
= 0 V
EE
60 Amplifiers Tested
from 2 Wafer Lots
30
2.5
2.0
1.5
1.0
0.5
SUPPLY CURRENT PER AMPLIFIER (mA)
CC,
0
I
±0.5 ±1.00
, |VEE|, SUPPLY VOLTAGE (V)
V
CC
Figure 16. Supply Current per Amplifier
versus Supply Voltage with No Load
50
VCC = 3.0 V
V
= 1.5 V
O
40
V
= 0 V
EE
T
= 25°C
A
60 Amplifiers Tested
30
from 2 Wafer Lots
TA = 25°C
TA = 125°C
TA = −55°C
±1.5 ±2.0
±2.5
20
10
PERCENTAGE OF AMPLIFIERS (%)
0
−50
−40 −30 −20 −10 0 10 20 30 40 50
TC
, INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (mV/°C)
VIO
Figure 17. Input Offset Voltage
Temperature Coefficient Distribution
10
AV = 1000
1.0
0.1
0.01
THD, TOTAL HARMONIC DISTORTION (%)
0.001
AV = 100
AV = 1.0
V
= 0.5 V
out
RL = 600 W
AV = 10
pp
100 1.0 k 10 k10
f, FREQUENCY (Hz)
VCC − VEE = 1.0 V
100 k
20
10
PERCENTAGE OF AMPLIFIERS (%)
0
−5.0
−4.0 −3.0 −2.0 −1.0 0 1.0 2.0 3.0 4.0 5.0
Figure 18. Input Offset Voltage Distribution
10
V
= 4.0 V
out
RL = 600 W
1.0
0.1
0.01
THD, TOTAL HARMONIC DISTORTION (%)
0.001
INPUT OFFSET VOLTAGE (mV)
pp
AV = 1000
AV = 100
AV = 10
AV = 1.0
100 1.0 k 10 k10
f, FREQUENCY (Hz)
VCC − VEE = 5.0 V
100 k
Figure 19. Total Harmonic Distortion
versus Frequency with 1.0 V Supply
Figure 20. Total Harmonic Distortion
versus Frequency with 5.0 V Supply
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9
MC33501, MC33503
4.0
V
− VEE = 1.0 V
CC
+ Slew Rate
V
− VEE = 5.0 V
CC
+ Slew Rate
3.0
V
− VEE = 5.0 V
2.0
V
− VEE = 1.0 V
CC
− Slew Rate
SR, SLEW RATE (V/ s)μ
1.0
0
−55 −25 0 25 50 75 100 125
, AMBIENT TEMPERATURE (°C)
T
A
CC
− Slew Rate
Figure 21. Slew Rate versus Temperature
60
V
− VEE = 5.0 V
V
− V
CC
40
20
= 1.0 V
EE
V
= 5.0 V
CC
− V
CC
EE
5.0
4.0
3.0
2.0
1.0
GBW, GAIN BANDWIDTH PRODUCT (MHz)
100
80
60
V
− VEE = 5.0 V
CC
f = 100 kHz
0
−55
−25 0 25 50 75 100 125
VCC − VEE = 5.0 V
= 600 W
R
L
C
= 100 pF
L
T
, AMBIENT TEMPERATURE (°C)
A
100
80
60
0
V
− VEE = 1.0 V
CC
−20
−40
10 k 100 k
f, FREQUENCY (Hz)
70
60
Phase Margin
40
20
0
10 1.0 k 1.0 M100 100 k10 k
R
, DIFFERENTIAL SOURCE RESISTANCE (W)
T
1.0 M 10 M
Gain Margin
40
20
0
−25 0 25 50 75 100 125−55
60
50
40
30
20
10
0
3.0 10 100 1000 300030 300
, CAPACITIVE LOAD (pF)
C
L
40
20
0
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10
MC33501, MC33503
120
AV = 100
100
AV = 10
80
60
40
20
CS, CHANNEL SEPARATION (dB)
V
− VEE = 5.0 V
CC
= 600 W
R
L
VO = 4.0 V
TA = 25°C
0
30 100 10 k 100 k 300 k300 30 k
pp
f, FREQUENCY (Hz)
Figure 27. Channel Separation
versus Frequency
70
60
50
40
30
20
10
0
10 1.0 k100 100 k
en, EQUIVALENT INPUT NOISE VOLTAGE (nV/ Hz)
f, FREQUENCY (Hz)
VCC − VEE = 5.0 V
TA = 25°C
10 k
8.0
6.0
RL= 600 W
T
= 25°C
A
)
pp
4.0
2.0
, OUTPUT VOLTAGE (V
O
V
0
0 ±0.5 ±1.0 ±1.5 ±2.0 ±2.5 ±3.0 ±3.5
, |VEE|, SUPPLY VOLTAGE (V)
V
CC
Figure 28. Output Voltage Swing
versus Supply Voltage
100
RL = 600 W
C
= 0
80
60
40
PHASE MARGIN (°)
m,
F
20
L
T
= 25°C
A
Phase Margin
Gain Margin
0
1234567
0
VCC − VEE, SUPPLY VOLTAGE (V)
100
80
60
40
, GAIN MARGIN (dB)
V
A
20
0
Figure 29. Equivalent Input Noise Voltage
versus Frequency
1.6
A
≥ 10 dB
VOL
= 600 W
R
1.2
L
0.8
0.4
, USEABLE SUPPLY VOLTAGE (V)
EE
−V
CC
V
0
−55 −25 0 25 50 75 100 125
T
, AMBIENT TEMPERATURE (°C)
A
Figure 31. Useable Supply Voltage
versus Temperature
Figure 30. Gain and Phase Margin
versus Supply Voltage
120
100
80
60
40
OPEN LOOP GAIN (dB)
VOL,
A
20
0
0 1.0 2.0 3.0 4.0
VCC − VEE, SUPPLY VOLTAGE (V)
Figure 32. Open Loop Gain
versus Supply Voltage
R
= 600 W
L
T
= 25°C
A
5.0 6.0
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11
MC33501, MC33503
R
T
470 k
1.0 V
C
T
1.0 nF
R
1a
V
CC
470 k
R
1b
470 k
−
+
R
2
470 k
f
O
1.0 kHz
f
O
+
RTCTIn
Figure 33. 1.0 V Oscillator
1.0 V
pp
1
2(R1a) R1b)
ƪ
R
2
ƫ
R
2
10 k
C
1
80 nF
R
10 k
1
C
f
400 pF
R
f
100 k
0.5 V
+
−
−0.5 V
A
f
V
O
Figure 34. 1.0 V Voiceband Filter
f
f
+
L
2 p R1C
f
+
H
2 p RfC
Af+ 1 )
L
1
1
R
f
R
2
f
H
[ 200 Hz
1
[ 4.0 kHz
f
+ 11
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12
MC33501, MC33503
FB
22 k
470 pF
15 V
15 13
2
3
1
MC34025
5
6
79
16
4
11
14
8
12
10
5.0 V
V
ref
Output A
Output B
4.7
+
MC33502
−
3320
100 k
1.0 k
4.7
0.1
From
Current Sense
1.0 k
Provides current sense
amplification and eliminates
leading edge spike.
Figure 35. Power Supply Application
I
O
V
O
R
sense
R
3
1.0 k
R
1
1.0 k
R
2
1.0 V
I
R
4
1.0 k
+
−
R
5
2.4 k
R
V
L
I
L
L
75
O
435 mA
212 mA
For best performance, use low tolerance resistors.
I
L
463 mA
492 mA
DIO/DI
−120 x 10
L
−6
3.3 k
Figure 36. 1.0 V Current Pump
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13
MC33501, MC33503
PACKAGE DIMENSIONS
SOT23−5
(TSOP−5, SC59−5)
SN SUFFIX
CASE 483−02
ISSUE E
0.05 (0.002)
S
H
D
54
123
L
G
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
B
J
C
K
M
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM MIN MAX MIN MAX
A 2.90 3.10 0.1142 0.1220
B 1.30 1.70 0.0512 0.0669
C 0.90 1.10 0.0354 0.0433
D 0.25 0.50 0.0098 0.0197
G 0.85 1.05 0.0335 0.0413
H 0.013 0.100 0.0005 0.0040
J 0.10 0.26 0.0040 0.0102
K 0.20 0.60 0.0079 0.0236
L 1.25 1.55 0.0493 0.0610
M 0 10 0 10
__ _ _
S 2.50 3.00 0.0985 0.1181
INCHESMILLIMETERS
SOLDERING FOOTPRINT*
1.9
0.95
0.037
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
ǒ
inches
mm
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SMARTMOS is a trademark of Motorola, Inc.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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MC33501/D
14
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