ON Semiconductor MC10LVEP16, MC100LVEP16 Technical data

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MC10LVEP16, MC100LVEP16
2.5V / 3.3VECL Differential Receiver/Driver
The MC10/100LVEP16 is a world class differential receiver/driver. The device is functionally equivalent to the EL16, EP16 and LVEL16 devices. With output transition times significantly faster than the EL16 and LVEL16, the LVEP16 is ideally suited for interfacing with high frequency and low voltage (2.5 V) sources. Singleended CLK input operation is limited to a VCC w 3.0 V in PECL mode, or VEE v −3.0 V in NECL mode.
The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple V and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.
The 100 Series contains temperature compensation.
BB
8
1
SOIC8
D SUFFIX
CASE 751
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MARKING DIAGRAMS*
8
HVP16
AYWWX
1
8
KVP16
AYWWX
1
240 ps Propagation Delay
Maximum Frequency > 4 GHz Typical
PECL Mode Operating Range: V
with VEE = 0 V
NECL Mode Operating Range: V
with VEE = 2.375 V to 3.8 V
V
Output
BB
= 2.375 V to 3.8 V
CC
= 0 V
CC
Open Input Default State
LVDS Input Compatible
PbFree Packages are Available
8
1
TSSOP8
DT SUFFIX
CASE 948R
H = MC10 K = MC100 A = Assembly Location
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
8
HU16
ALYW
1
8
KU16
ALYW
1
L = Wafer Lot Y = Year W = Work Week
Semiconductor Components Industries, LLC, 2005
February, 2005 Rev. 6
1 Publication Order Number:
MC10LVEP16/D
MC10LVEP16, MC100LVEP16
1
NC
2
D
3
45
V
BB
78Q
6
V
CC
QD
V
EE
Figure 1. 8−Lead Pinout (Top View) and Logic
Diagram
Table 2. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection Human Body Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 @ 0.125 in
Transistor Count 167 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 1. PIN DESCRIPTION
Pin Function
D*, D** ECL Data Inputs
Q, Q ECL Data Outputs
V
BB
V
CC
V
EE
NC No Connect
* Pins will default LOW when left open. **Pins will default to VCC/2 when left open.
Machine Model
Charged Device Model
Ref. Voltage Output
Positive Supply
Negative Supply
75 kW
37.5 kW
> 4 kV
> 200 V
> 2 kV
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
V
EE
V
I
I
out
I
BB
T
A
T
stg
q
JA
q
JC
q
JA
q
JC
T
sol
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
PECL Mode Power Supply VEE = 0 V 6 V
NECL Mode Power Supply VCC = 0 V −6 V
PECL Mode Input Voltage NECL Mode Input Voltage
Output Current Continuous
VEE = 0 V VCC = 0 V
Surge
VI v V VI w V
CC
EE
6
6
50
100
V V
mA mA
VBB Sink/Source ± 0.5 mA
Operating Temperature Range −40 to +85 °C
Storage Temperature Range −65 to +150 °C
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC8 SOIC8
190 130
°C/W °C/W
Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
TSSOP8 TSSOP8
185 140
°C/W °C/W
Thermal Resistance (Junction−to−Case) Standard Board TSSOP−8 41 to 44 °C/W
Wave Solder <2 to 3 sec @ 248°C 265 °C
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2
MC10LVEP16, MC100LVEP16
Table 4. 10EP DC CHARACTERISTICS, PECL V
= 2.5 V, VEE = 0 V (Note 2)
CC
40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
V
OH
V
OL
V
IHCMR
Power Supply Current 17 22 27 17 22 27 17 22 28 mA
Output HIGH Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV
Output LOW Voltage (Note 3) 565 740 865 630 805 930 690 865 990 mV
Input HIGH Voltage Common Mode
1.2 2.5 1.2 2.5 1.2 2.5 V Range (Differential Configuration) (Notes 4, 5)
I
IH
I
IL
Input HIGH Current 150 150 150
Input LOW Current DD0.5
150
0.5
150
0.5
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to 1.3 V.
3. All loading with 50 W to VCC 2.0 V.
4. Do not use VBB at VCC < 3.0 V. Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode.
5. V
Table 5. 10EP DC CHARACTERISTICS, PECL V
min varies 1:1 with VEE, V
IHCMR
input signal.
max varies 1:1 with VCC. The V
IHCMR
CC
range is referenced to the most positive side of the differential
IHCMR
= 3.3 V, VEE = 0 V (Note 6)
40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Power Supply Current 17 22 27 17 22 27 17 22 28 mA
Output HIGH Voltage (Note 7) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV
Output LOW Voltage (Note 7) 1365 1540 1665 1430 1605 1730 1490 1665 1790 mV
Input HIGH Voltage (Single Ended) 2090 2415 2155 2480 2215 2540 mV
Input LOW Voltage (Single Ended) 1365 1690 1430 1755 1490 1815 mV
Output Voltage Reference (Note 8) 1790 1890 1990 1855 1955 2055 1915 2015 2115 mV
Input HIGH Voltage Common Mode
1.2 3.3 1.2 3.3 1.2 3.3 V Range (Differential Configuration) (Note 9)
I
IH
I
IL
Input HIGH Current 150 150 150
Input LOW Current DD0.5
150
0.5
150
0.5
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
6. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to 0.5 V.
7. All loading with 50 W to VCC 2.0 V.
8. Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode.
9. V
min varies 1:1 with VEE, V
IHCMR
input signal.
max varies 1:1 with VCC. The V
IHCMR
range is referenced to the most positive side of the differential
IHCMR
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MC10LVEP16, MC100LVEP16
Table 6. 10EP DC CHARACTERISTICS, NECL V
= 0 V, VEE = −3.8 V to −2.375 V (Note 10)
CC
40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Ty p Max Min Typ Max Unit
I
EE
Power Supply Current 17 22 27 17 22 27 17 22 28 mA
VOH Output HIGH Voltage (Note 11) −1135 −1010 −885 −1070 −945 −820 −1010 −885 −760 mV
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Output LOW Voltage (Note 11) −1935 −1760 −1635 −1870 −1695 −1570 −1810 −1635 −1510 mV
Input HIGH Voltage (Single Ended) −1210 −885 −1145 −820 −1085 −760 mV
Input LOW Voltage (Single Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV
Output Voltage Reference (Note 12) −1510 −1410 −1310 −1445 −1345 −1245 −1385 −1285 −1185 mV
Input HIGH Voltage Common Mode
VEE+1.2 0.0 VEE+1.2 0.0 VEE+1.2 0.0 V Range (Differential Configuration) (Note 13)
I
IH
I
IL
Input HIGH Current 150 150 150
Input LOW Current DD0.5
150
0.5
150
0.5
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
10.Input and output parameters vary 1:1 with VCC.
11.All loading with 50 W to VCC 2.0 V.
12.Single ended input CLK pin operation is limited to VEE 3.0 V in NECL mode.
13.V
min varies 1:1 with VEE, V
IHCMR
input signal.
max varies 1:1 with VCC. The V
IHCMR
range is referenced to the most positive side of the differential
IHCMR
Table 7. 100EP DC CHARACTERISTICS, PECL V
= 2.5 V, VEE = 0 V (Note 14)
CC
40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
V
OH
V
OL
V
IHCMR
Power Supply Current 19 24 29 22 28 34 24 30 36 mA
Output HIGH Voltage (Note 15) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV
Output LOW Voltage (Note 15) 555 730 900 555 730 900 555 730 900 mV
Input HIGH Voltage Common Mode
1.2 3.3 1.2 3.3 1.2 3.3 V Range (Differential Configuration) (Notes 16, 17)
I
IH
I
IL
Input HIGH Current 150 150 150
Input LOW Current DD0.5
150
0.5
150
0.5
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
14.Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to 1.3 V.
15.All loading with 50 W to VCC 2.0 V.
16.Do not use VBB at VCC < 3.0 V. Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode.
17.V
min varies 1:1 with VEE, V
IHCMR
input signal.
max varies 1:1 with VCC. The V
IHCMR
range is referenced to the most positive side of the differential
IHCMR
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4
MC10LVEP16, MC100LVEP16
Table 8. 100EP DC CHARACTERISTICS, PECL V
= 3.3 V, VEE = 0 V (Note 18)
CC
40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Power Supply Current 19 24 29 22 28 34 24 30 36 mA
Output HIGH Voltage (Note 19) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV
Output LOW Voltage (Note 19) 1355 1530 1700 1355 1530 1700 1355 1530 1700 mV
Input HIGH Voltage (Single Ended) 2135 2420 2135 2420 2135 2420 mV
Input LOW Voltage (Single Ended) 1355 1700 1355 1700 1355 1700 mV
Output Voltage Reference (Note 20) 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV
Input HIGH Voltage Common Mode
1.2 3.3 1.2 3.3 1.2 3.3 V Range (Differential Configuration) (Note 21)
I
IH
I
IL
Input HIGH Current 150 150 150
Input LOW Current DD0.5
150
0.5
150
0.5
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
18.Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to 0.5 V.
19.All loading with 50 W to VCC 2.0 V.
20.Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode.
21.V
min varies 1:1 with VEE, V
IHCMR
input signal.
max varies 1:1 with VCC. The V
IHCMR
range is referenced to the most positive side of the differential
IHCMR
Table 9. 100EP DC CHARACTERISTICS, NECL V
= 0 V, VEE = −3.8 V to −2.375 V (Note 22)
CC
40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Ty p Max Min Typ Max Unit
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Power Supply Current 19 24 29 22 28 34 24 30 36 mA
Output HIGH Voltage (Note 23) −1145 1020 895 1145 1020 895 1145 1020 895 mV
Output LOW Voltage (Note 23) −1945 −1770 −1600 −1945 −1770 −1600 −1945 −1770 −1600 mV
Input HIGH Voltage (Single Ended) −1165 −880 −1165 −880 −1165 880 mV
Input LOW Voltage (Single Ended) −1945 −1600 −1945 −1600 −1945 −1600 mV
Output Voltage Reference (Note 24) −1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325 mV
Input HIGH Voltage Common Mode
VEE+1.2 0.0 VEE+1.2 0.0 VEE+1.2 0.0 V Range (Differential Configuration) (Note 25)
I
IH
I
IL
Input HIGH Current 150 150 150
Input LOW Current DD0.5
150
0.5
150
0.5
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
22.Input and output parameters vary 1:1 with VCC.
23.All loading with 50 W to VCC 2.0 V.
24.Single ended input CLK pin operation is limited to VEE 3.0 V in NECL mode.
25.V
min varies 1:1 with VEE, V
IHCMR
input signal.
max varies 1:1 with VCC. The V
IHCMR
range is referenced to the most positive side of the differential
IHCMR
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5
MC10LVEP16, MC100LVEP16
Table 10. AC CHARACTERISTICS V
= 0 V; VEE = −3.8 V to −2.375 V or VCC = 2.375 V to 3.8 V; V
CC
= 0 V (Note 26)
EE
40°C 25°C 85°C
Symbol Characteristic
f
max
t
PLH
t
PHL
t
SKEW
t
JITTER
V
PP
t
r
t
f
Maximum Frequency (See Figure 2. F
,
Propagation Delay to
max
/JITTER)
Output Differential
Duty Cycle Skew (Note 27) 5.0 20 5.0 20 5.0 20 ps
CLOCK Random Jitter (RMS) (See Figure 2. F
max
/JITTER)
Input Voltage Swing (Differential Configuration)
Output Rise/Fall Times Q, Q (20% 80%)
Min Ty p Max Min Typ Max Min Ty p Max
Unit
> 4 > 4 > 4 GHz
150 220 300 170 240 320 190 260 330 ps
0.2 < 1 0.2 < 1 0.2 < 1 ps
150 800 1200 150 800 1200 150 800 1200 mV
70 120 170 80 130 180 100 150 200 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
26.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
27.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs.
900
800
700
600
(mV)
500
OUTpp
V
400
300
200
100
0
(JITTER)
0 1000 2000 3000 4000 5000 6000
FREQUENCY (MHz)
Figure 2. F
max
/Jitter
9
8
7
6
5
4
3
2
1
ps (RMS)
OUT
JITTER
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6
MC10LVEP16, MC100LVEP16
Zo = 50 W
Zo = 50 W
50 W 50 W
V
VTT = VCC 2.0 V
TT
Receiver Device
Driver Device
QD
Q D
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device Package Shipping
MC10LVEP16D SOIC8 98 Units / Rail
MC10LVEP16DR2 SOIC8 2500 / Tape & Reel
MC10LVEP16DT TSSOP8 100 Units / Rail
MC10LVEP16DTR2 TSSOP8 2500 / Tape & Reel
MC100LVEP16D SOIC8 98 Units / Rail
MC100LVEP16DG SOIC8
(PbFree)
MC100LVEP16DR2 SOIC8 2500 / Tape & Reel
MC100LVEP16DT TSSOP8 100 Units / Rail
MC100LVEP16DTG TSSOP8
(PbFree)
MC100LVEP16DTR2 TSSOP8 2500 / Tape & Reel
MC100LVEP16DTR2G TSSOP8
(PbFree)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
98 Units / Rail
100 Units / Rail
2500 / Tape & Reel
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7
MC10LVEP16, MC100LVEP16
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1642/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
ECLinPSt I/O SPiCE Modeling Kit
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8
Y
Z
MC10LVEP16, MC100LVEP16
PACKAGE DIMENSIONS
SOIC8 NB
CASE 75107
ISSUE AE
X
B
H
A
58
1
4
G
D
0.25 (0.010) Z
M
S
Y
0.25 (0.010)
C
SEATING PLANE
SXS
M
0.10 (0.004)
M
Y
K
N
X 45
_
M
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW STANDARD IS 751−07.
MILLIMETERS
DIMAMIN MAX MIN MAX
4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8
____
N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244
INCHES
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
0.6
0.024
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
4.0
0.155
1.270
0.050
SCALE 6:1
ǒ
inches
mm
Ǔ
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9
MC10LVEP16, MC100LVEP16
PACKAGE DIMENSIONS
TSSOP8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R02
ISSUE A
0.10 (0.004)
T
SEATING PLANE
8x REFK
S
U0.15 (0.006) T
2X L/2
85
L
PIN 1 IDENT
S
U0.15 (0.006) T
0.10 (0.004) V
1
U
4
A
M
B
V
S
U
T
S
0.25 (0.010)
M
F
DETAIL E
C
D
G
DETAIL E
W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.
DIM MIN MAX MIN MAX
A 2.90 3.10 0.114 0.122 B 2.90 3.10 0.114 0.122 C 0.80 1.10 0.031 0.043 D 0.05 0.15 0.002 0.006 F 0.40 0.70 0.016 0.028
G 0.65 BSC 0.026 BSC
K 0.25 0.40 0.010 0.016 L 4.90 BSC 0.193 BSC
M 0 6 0 6
____
INCHESMILLIMETERS
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local Sales Representative.
MC10LVEP16/D
10
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