ON Semiconductor MC10EP57, MC100EP57 Technical data

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MC10EP57, MC100EP57

3.3V / 5VECL 4:1
Differential Multiplexer

The MC10/100EP57 is a fully differential 4:1 multiplexer. By
leaving the SEL1 line open (pulled LOW via the input pulldown
resistors) the device can also be used as a differential 2:1 multiplexer
with SEL0 input selecting between D0 and D1. The fully differential
architecture of the EP57 makes it ideal for use in low skew
applications such as clock distribution.

The SEL1 is the most significant select line. The binary number
applied to the select inputs will select the same numbered data input
(i.e., 00 selects D0).

Multiple V
generated voltage supply, is available to this device only. For
single−ended input conditions, the unused differential input is
connected to VBB as a switching reference voltage. VBB may also
rebias AC coupled inputs. When used, decouple VBB and VCC via a

0.01 F capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V

The 100 Series contains temperature compensation.

Features

• 375 ps Typical Propagation Delays

• Maximum Frequency > 2 GHz Typical

• PECL Mode Operating Range:

VCC = 3.0 V to 5.5 V with VEE = 0 V

• NECL Mode Operating Range:

VCC = 0 V with VEE = −3.0 V to −5.5 V

• Open Input Default State

• Safety Clamp on Inputs

• Q Output will default LOW with inputs open or at V

• V

Outputs

BB

• Useful as Either 4:1 or 2:1 Multiplexer

• These devices are manufactured with a Pb−Free external lead

finish only*.

outputs are provided. The VBB pin, an internally

BB

should be left open.

BB

EE

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TSSOP−20
DT SUFFIX

CASE 948E

MARKING DIAGRAMS

MC10

EP57

ALYW

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.

100

EP57

ALYW

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

 Semiconductor Components Industries, LLC, 2004

October, 2004 − Rev. 9

1 Publication Order Number:

MC10EP57/D

MC10EP57, MC100EP57

V

SEL1

CC

SEL0

1920

21

D0

CC

Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.

Figure 1. 20−Lead Package (Top View) and Logic Diagram

Table 1. PIN DESCRIPTION

PIN

D0−3*, D0−3
SEL0*, 1* ECL MUX Select Inputs
V

, V

BB1

BB2

Q, Q ECL Data Outputs
V

CC

V

EE

* Pins will default LOW when left open.

FUNCTION

*

ECL Diff. Data Inputs

ECL Reference Output Voltage

Positive Supply
Negative Supply

V

CC

Q V

Q

CC

V

BB1VBB2VEE

1718 16 15 14 13 12

4:1

43

56789

D1D1 D2D0

D2V

D3 V

Table 2. FUNCTION TABLE

L

L
H
H

L

H

L

H

D3

11

10

EE

DATA OUTSEL1 SEL0

D0, D0
D1, D1
D2, D2
D3, D3

Table 3. ATTRIBUTES

Characteristics Value

Internal Input Pulldown Resistor 75 k
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model

Machine Model

Charged Device Model

> 4 kV

> 100 V

> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 584 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

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MC10EP57, MC100EP57

Table 4. MAXIMUM RATINGS

Symbol Parameter Condition 1 Condition 2 Rating Unit

V

CC

V

EE

V

I

I

out

I

BB

T

A

T

stg



JA



JC

T

sol

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.

PECL Mode Power Supply VEE = 0 V 6 V
NECL Mode Power Supply VCC = 0 V −6 V
PECL Mode Input Voltage

NECL Mode Input Voltage
Output Current Continuous

VEE = 0 V
V

= 0 V

CC

Surge

VI  V
VI  V

CC
EE

6

−6
50

100

V
V

mA

mA
VBB Sink/Source ± 0.5 mA
Operating Temperature Range −40 to +85 °C
Storage Temperature Range −65 to +150 °C
Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

TSSOP−20
TSSOP−20

140
100

°C/W
°C/W

Thermal Resistance (Junction−to−Case) Standard Board TSSOP−20 23 to 41 °C/W
Wave Solder <2 to 3 sec @ 248°C 265 °C

Table 5. 10EP DC CHARACTERISTICS, PECL V

= 3.3 V, VEE = 0 V (Note 2)

CC

−40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

I

EE

V

OH

V

OL

V

IH

V

IL

V

BB

V

IHCMR

Power Supply Current 40 52 65 40 52 65 40 52 65 mA
Output HIGH Voltage (Note 3) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV
Output LOW Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV
Input HIGH Voltage (Single−Ended) 2090 2415 2155 2480 2215 2540 mV
Input LOW Voltage (Single−Ended) 1365 1690 1460 1755 1490 1815 mV
Output Voltage Reference 1790 1835 1990 1855 1900 2055 1915 1960 2115 mV
Input HIGH Voltage Common Mode

2.0 3.3 2.0 3.3 2.0 3.3 V
Range (Differential Configuration)
(Note 4)

I

IH

I

IL

Input HIGH Current 150 150 150 A
Input LOW Current 0.5 0.5 0.5 A

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.

2. Input and output parameters vary 1:1 with V

3. All loading with 50  to V

4. V

min varies 1:1 with VEE, V

IHCMR

input signal.

− 2.0 V.

CC

IHCMR

. VEE can vary +0.3 V to −2.2 V.

CC

max varies 1:1 with VCC. The V

range is referenced to the most positive side of the differential

IHCMR

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