The MC10/100EP57 is a fully differential 4:1 multiplexer. By
leaving the SEL1 line open (pulled LOW via the input pulldown
resistors) the device can also be used as a differential 2:1 multiplexer
with SEL0 input selecting between D0 and D1. The fully differential
architecture of the EP57 makes it ideal for use in low skew
applications such as clock distribution.
The SEL1 is the most significant select line. The binary number
applied to the select inputs will select the same numbered data input
(i.e., 00 selects D0).
Multiple V
generated voltage supply, is available to this device only. For
single−ended input conditions, the unused differential input is
connected to VBB as a switching reference voltage. VBB may also
rebias AC coupled inputs. When used, decouple VBB and VCC via a
0.01 F capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V
The 100 Series contains temperature compensation.
Features
• 375 ps Typical Propagation Delays
• Maximum Frequency > 2 GHz Typical
• PECL Mode Operating Range:
VCC = 3.0 V to 5.5 V with VEE = 0 V
• NECL Mode Operating Range:
VCC = 0 V with VEE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Q Output will default LOW with inputs open or at V
• V
Outputs
BB
• Useful as Either 4:1 or 2:1 Multiplexer
• These devices are manufactured with a Pb−Free external lead
finish only*.
outputs are provided. The VBB pin, an internally
BB
should be left open.
BB
EE
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TSSOP−20
DT SUFFIX
CASE 948E
MARKING DIAGRAMS
MC10
EP57
ALYW
A= Assembly Location
L= Wafer Lot
Y= Year
W= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
100
EP57
ALYW
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2004
October, 2004 − Rev. 9
1Publication Order Number:
MC10EP57/D
MC10EP57, MC100EP57
V
SEL1
CC
SEL0
1920
21
D0
CC
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. 20−Lead Package (Top View) and Logic Diagram
Table 1. PIN DESCRIPTION
PIN
D0−3*, D0−3
SEL0*, 1*ECL MUX Select Inputs
V
, V
BB1
BB2
Q, QECL Data Outputs
V
CC
V
EE
* Pins will default LOW when left open.
FUNCTION
*
ECL Diff. Data Inputs
ECL Reference Output Voltage
Positive Supply
Negative Supply
V
CC
QV
Q
CC
V
BB1VBB2VEE
17181615141312
4:1
43
56789
D1D1D2D0
D2V
D3V
Table 2. FUNCTION TABLE
L
L
H
H
L
H
L
H
D3
11
10
EE
DATA OUTSEL1SEL0
D0, D0
D1, D1
D2, D2
D3, D3
Table 3. ATTRIBUTES
CharacteristicsValue
Internal Input Pulldown Resistor75 k
Internal Input Pullup ResistorN/A
ESD ProtectionHuman Body Model
Machine Model
Charged Device Model
> 4 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)Level 1
Flammability RatingOxygen Index: 28 to 34UL 94 V−0 @ 0.125 in
Transistor Count584 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2
MC10EP57, MC100EP57
Table 4. MAXIMUM RATINGS
SymbolParameterCondition 1Condition 2RatingUnit
V
CC
V
EE
V
I
I
out
I
BB
T
A
T
stg
JA
JC
T
sol
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
PECL Mode Power SupplyVEE = 0 V6V
NECL Mode Power SupplyVCC = 0 V−6V
PECL Mode Input Voltage
NECL Mode Input Voltage
Output CurrentContinuous
VEE = 0 V
V
= 0 V
CC
Surge
VI V
VI V
CC
EE
6
−6
50
100
V
V
mA
mA
VBB Sink/Source± 0.5mA
Operating Temperature Range−40 to +85°C
Storage Temperature Range−65 to +150°C
Thermal Resistance (Junction−to−Ambient)0 lfpm
500 lfpm
TSSOP−20
TSSOP−20
140
100
°C/W
°C/W
Thermal Resistance (Junction−to−Case)Standard BoardTSSOP−2023 to 41°C/W
Wave Solder<2 to 3 sec @ 248°C265°C
Power Supply Current405265405265405265mA
Output HIGH Voltage (Note 3)216522902415223023552480229024152540mV
Output LOW Voltage (Note 3)136514901615143015551680149016151740mV
Input HIGH Voltage (Single−Ended)209024152155248022152540mV
Input LOW Voltage (Single−Ended)136516901460175514901815mV
Output Voltage Reference179018351990185519002055191519602115mV
Input HIGH Voltage Common Mode
2.03.32.03.32.03.3V
Range (Differential Configuration)
(Note 4)
I
IH
I
IL
Input HIGH Current150150150A
Input LOW Current0.50.50.5A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with V
3. All loading with 50 to V
4. V
min varies 1:1 with VEE, V
IHCMR
input signal.
− 2.0 V.
CC
IHCMR
. VEE can vary +0.3 V to −2.2 V.
CC
max varies 1:1 with VCC. The V
range is referenced to the most positive side of the differential
Power Supply Current405265405265405265mA
Output HIGH Voltage (Note 6)386539904115393040554180399041154240mV
Output LOW Voltage (Note 6)306531903315313032553380319033153440mV
Input HIGH Voltage (Single−Ended)379041153855418039154240mV
Input LOW Voltage (Single−Ended)306533903130345531903515mV
Output Voltage Reference349035353690355536003755368536603815mV
Input HIGH Voltage Common Mode
2.05.02.05.02.05.0V
Range (Differential Configuration)
(Note 7)
I
IH
I
IL
Input HIGH Current150150150A
Input LOW Current0.50.50.5A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with V
6. All loading with 50 to V
7. V
min varies 1:1 with VEE, V
IHCMR
input signal.
− 2.0 V.
CC
IHCMR
. VEE can vary +2.0 V to −0.5 V.
CC
max varies 1:1 with VCC. The V
range is referenced to the most positive side of the differential
VOHOutput HIGH Voltage (Note 9)−1135 −1010−885−1070−945−820−1010−885−760mV
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Output LOW Voltage (Note 9)−1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560mV
Input HIGH Voltage (Single−Ended)−1210−885−1145−820−1085−760mV
Input LOW Voltage (Single−Ended)−1935−1610 −1870−1545 −1810−1485mV
Output Voltage Reference−1510 −1465 −1310 −1445 −1400 −1245 −1385 −1340 −1185mV
Input HIGH Voltage Common Mode
VEE+2.00.0VEE+2.00.0VEE+2.00.0V
Range (Differential Configuration)
(Note 10)
I
IH
I
IL
Input HIGH Current150150150A
Input LOW Current0.50.50.5A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with V
9. All loading with 50 to V
10.V
min varies 1:1 with VEE, V
IHCMR
input signal.
− 2.0 V.
CC
IHCMR
.
CC
max varies 1:1 with VCC. The V
range is referenced to the most positive side of the differential
IHCMR
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4
MC10EP57, MC100EP57
Table 8. 100EP DC CHARACTERISTICS, PECLV
= 3.3 V, VEE = 0 V (Note 11)
CC
−40°C25°C85°C
SymbolCharacteristicMinTypMaxMinTypMaxMinTypMax
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Power Supply Current405265405265405265mA
Output HIGH Voltage (Note 12)215522802405215522802405215522802405mV
Output LOW Voltage (Note 12)135514801605135514801605135514801605mV
Input HIGH Voltage (Single−Ended)207524202075242020752420mV
Input LOW Voltage (Single−Ended)135516751355167513551675mV
Output Voltage Reference177518751975177518751975177518751975mV
Input HIGH Voltage Common Mode
2.03.32.03.32.03.3V
Range (Differential Configuration)
Unit
(Note 13)
I
IH
I
IL
Input HIGH Current150150150A
Input LOW Current0.50.50.5A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11.Input and output parameters vary 1:1 with V
12.All loading with 50 to V
13.V
min varies 1:1 with VEE, V
IHCMR
input signal.
− 2.0 V.
CC
IHCMR
. VEE can vary +0.3 V to −2.2 V.
CC
max varies 1:1 with VCC. The V
range is referenced to the most positive side of the differential
IHCMR
Table 9. 100EP DC CHARACTERISTICS, PECL V
= 5.0 V, VEE = 0 V (Note 14)
CC
−40°C25°C85°C
SymbolCharacteristic
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Power Supply Current405265405265405265mA
Output HIGH Voltage (Note 15)385539804105385539804105385539804105mV
Output LOW Voltage (Note 15)305531803305305531803305305531803305mV
Input HIGH Voltage (Single−Ended)377541203775412037754120mV
Input LOW Voltage (Single−Ended)305533753055337530553375mV
Output Voltage Reference347535753675347535753675347535753675mV
Input HIGH Voltage Common Mode
Range (Differential Configuration)
MinTypMaxMinTypMaxMinTypMax
2.05.02.05.02.05.0V
Unit
(Note 16)
I
IH
I
IL
Input HIGH Current150150150A
Input LOW Current0.50.50.5A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14.Input and output parameters vary 1:1 with V
15.All loading with 50 to V
16.V
min varies 1:1 with VEE, V
IHCMR
input signal.
− 2.0 V.
CC
IHCMR
. VEE can vary +2.0 V to −0.5 V.
CC
max varies 1:1 with VCC. The V
range is referenced to the most positive side of the differential
Power Supply Current405265405265405265mA
Output HIGH Voltage (Note 18)−1145 −1020−895−1145 −1020−895−1145 −1020−895mV
Output LOW Voltage (Note 18)−1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695mV
Input HIGH Voltage (Single−Ended)−1225−880−1225−880−1225−880mV
Input LOW Voltage (Single−Ended)−1945−1625 −1945−1625 −1945−1625mV
Output Voltage Reference−1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325mV
Input HIGH Voltage Common Mode
VEE+2.00.0VEE+2.00.0VEE+2.00.0V
Range (Differential Configuration)
(Note 19)
I
IH
I
IL
Input HIGH Current150150150A
Input LOW Current0.50.50.5A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17.Input and output parameters vary 1:1 with V
18.All loading with 50 to V
19.V
min varies 1:1 with VEE, V
IHCMR
input signal.
− 2.0 V.
CC
IHCMR
.
CC
max varies 1:1 with VCC. The V
range is referenced to the most positive side of the differential
IHCMR
Table 11. AC CHARACTERISTICS V
= 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to V
21.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
− 2.0 V.
CC
are measured from the cross point of the inputs to the cross point of the outputs.
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6
MC10EP57, MC100EP57
1000
900
800
700
(mV)
600
OUTpp
500
V
400
300
200
100
0
0100020003000400050006000
Figure 2. F
(JITTER)
FREQUENCY (MHz)
/Jitter
max
10
9
8
7
6
5
4
3
2
1
ps (RMS)
OUT
JITTER
Zo = 50
Zo = 50
50 50
V
VTT = VCC − 2.0 V
TT
Receiver
Device
Driver
Device
QD
QD
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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7
MC10EP57, MC100EP57
ORDERING INFORMATION
DevicePackageShipping
MC10EP57DTTSSOP−20
(Pb−Free)
MC10EP57DTR2TSSOP−20
(Pb−Free)
MC10EP57DTR2GTSSOP−20
(Pb−Free)
MC100EP57DTTSSOP−20
(Pb−Free)
MC100EP57DTR2TSSOP−20
(Pb−Free)
MC100EP57DTR2GTSSOP−20
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
75 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
75 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
†
Resource Reference of Application Notes
AN1405/D− ECL Clock Distribution Techniques
AN1406/D− Designing with PECL (ECL at +5.0 V)
AN1503/D− ECLinPS I/O SPiCE Modeling Kit
AN1504/D− Metastability and the ECLinPS Family
AN1568/D− Interfacing Between LVDS and ECL
AN1642/D− The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
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MC10EP57, MC100EP57
PACKAGE DIMENSIONS
TSSOP−20
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E−02
ISSUE B
20X REFK
S
U0.15 (0.006) T
2X
L/2
L
PIN 1
IDENT
110
S
U0.15 (0.006) T
0.10 (0.004)V
M
A
−V−
C
D
G
H
0.100 (0.004)
SEATING
−T−
PLANE
S
U
T
1120
S
B
−U−
DETAIL E
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER
SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
ECLinPS is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Japan: ON Semiconductor, Japan Customer Focus Center
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For additional information, please contact your
local Sales Representative.
MC10EP57/D
10
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