ON Semiconductor BAW56LT3, BAW56LT1 Datasheet

1

Motorola Small–Signal Transistors, FETs and Diodes Device Data

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 

MAXIMUM RATINGS (EACH DIODE)

Rating

Symbol Value Unit

Reverse Voltage V

R

70 Vdc

Forward Current I

F

200 mAdc

Peak Forward Surge Current I

FM(surge)

500 mAdc

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Total Device Dissipation FR–5 Board

(1)

TA = 25°C
Derate above 25°C

P

D

225

1.8

mW

mW/°C

Thermal Resistance, Junction to Ambient

R

q

JA

556 °C/W

Total Device Dissipation

Alumina Substrate,

(2)

TA = 25°C

Derate above 25°C

P

D

300

2.4

mW

mW/°C

Thermal Resistance, Junction to Ambient

R

q

JA

417 °C/W

Junction and Storage Temperature TJ, T

stg

–55 to +150 °C

DEVICE MARKING

BAW56LT1 = A1

ELECTRICAL CHARACTERISTICS (T

A

= 25°C unless otherwise noted) (EACH DIODE)

Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS

Reverse Breakdown Voltage

(I

(BR)

= 100 µAdc)

V

(BR)

70 — Vdc

Reverse Voltage Leakage Current

(VR = 25 Vdc, TJ = 150°C)
(VR = 70 Vdc)
(VR = 70 Vdc, TJ = 150°C)

I

R

—
—
—

30

2.5
50

µAdc

Diode Capacitance

(VR = 0, f = 1.0 MHz)

C

D

— 2.0 pF

Forward Voltage

(IF = 1.0 mAdc)
(IF = 10 mAdc)
(IF = 50 mAdc)
(IF = 150 mAdc)

V

F

—
—
—
—

715

855
1000
1250

mVdc

Reverse Recovery Time

(IF = IR = 10 mAdc, I

R(REC)

= 1.0 mAdc) (Figure 1) RL = 100 Ω

t

rr

— 6.0 ns

1. FR–5 = 1.0  0.75  0.062 in.

2. Alumina = 0.4  0.3  0.024 in. 99.5% alumina.

Thermal Clad is a trademark of the Bergquist Company

Preferred devices are Motorola recommended choices for future use and best overall value.

Order this document

by BAW56LT1/D

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SEMICONDUCTOR TECHNICAL DATA



Motorola Preferred Device

1

2

3

CASE 318–08, STYLE 12

SOT–23 (TO–236AB)

 Motorola, Inc. 1996

ANODE

3

CATHODE

1

2

CATHODE

BAW56LT1

2

Motorola Small–Signal Transistors, FETs and Diodes Device Data

Notes: 1. A 2.0 kΩ variable resistor adjusted for a Forward Current (IF) of 10 mA.

Notes: 2. Input pulse is adjusted so I

R(peak)

is equal to 10 mA.

Notes: 3. tp » t

rr

+10 V

2.0 k

820

Ω

0.1 µF

D.U.T.

V

R

100

µ

H

0.1

µ

F

50 Ω OUTPUT

PULSE

GENERATOR

50

Ω

INPUT

SAMPLING

OSCILLOSCOPE

t

r

t

p

t

10%

90%

I

F

I

R

t

rr

t

i

R(REC)

= 1.0 mA

OUTPUT PULSE

(IF = IR = 10 mA; MEASURED

at i

R(REC)

= 1.0 mA)

I

F

INPUT SIGNAL

Figure 1. Recovery Time Equivalent Test Circuit

100

0.2 0.4
VF, FORWARD VOLTAGE (VOLTS)

0.6 0.8 1.0

1.2

10

1.0

0.1

TA = 85°C

10

0

VR, REVERSE VOLTAGE (VOLTS)

1.0

0.1

0.01

0.001
10 20 30 40

50

1.75

0

VR, REVERSE VOLTAGE (VOLTS)

1.5

1.25

1.0

0.75

C

D

, DIODE CAPACITANCE (pF)

2468

I

F

, FORWARD CURRENT (mA)

Figure 2. Forward Voltage Figure 3. Leakage Current

Figure 4. Capacitance

TA = –40°C

TA = 25°C

TA = 150°C
TA = 125°C

TA = 85°C

TA = 55°C

TA = 25°C

I

R

, REVERSE CURRENT (

µ

A)

Curves Applicable to Each Cathode

BAW56LT1

3

Motorola Small–Signal Transistors, FETs and Diodes Device Data

INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection

interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.

SOT–23

mm

inches

0.037

0.95

0.037

0.95

0.079

2.0

0.035

0.9

0.031

0.8

SOT–23 POWER DISSIP ATION

The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by T

J(max)

, the maximum rated junction temperature of the

die, R

θJA

, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:

PD =

T

J(max)

– T

A

R

θJA

The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.

PD =

150°C – 25°C

556°C/W

= 225 milliwatts

The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.

• Always preheat the device.

• The delta temperature between the preheat and

soldering should be 100°C or less.*

• When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.

• The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

• When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

• After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.

• Mechanical stress or shock should not be applied during

cooling.

* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.

BAW56LT1

4

Motorola Small–Signal Transistors, FETs and Diodes Device Data

P ACKAGE DIMENSIONS

D

J

K

L

A

C

B

S

H

GV

3

1

2

CASE 318–08

ISSUE AE

SOT–23 (TO–236AB)

DIMAMIN MAX MIN MAX

MILLIMETERS

0.1102 0.1197 2.80 3.04

INCHES

B 0.0472 0.0551 1.20 1.40
C 0.0350 0.0440 0.89 1.11
D 0.0150 0.0200 0.37 0.50
G 0.0701 0.0807 1.78 2.04
H 0.0005 0.0040 0.013 0.100
J 0.0034 0.0070 0.085 0.177
K 0.0180 0.0236 0.45 0.60
L 0.0350 0.0401 0.89 1.02
S 0.0830 0.0984 2.10 2.50
V 0.0177 0.0236 0.45 0.60

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.

STYLE 12:

PIN 1. CATHODE

2. CATHODE

3. ANODE

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BAW56LT1/D

*BAW56LT1/D*

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