Annular PNPN devices designed for high volume consumer
applications such as relay and lamp drivers, small motor controls, gate
drivers for larger thyristors, and sensing and detection circuits.
Supplied in an inexpensive plastic TO−92/TO-226AA package which
is readily adaptable for use in automatic insertion equipment.
Features
• Sensitive Gate Trigger Current − 200 A Maximum
• Low Reverse and Forward Blocking Current − 50 A Maximum,
TC = 110°C
• Low Holding Current − 5 mA Maximum
• Passivated Surface for Reliability and Uniformity
• Device Marking: Device Type, e.g., 2N5060, Date Code
• Pb−Free Packages are Available*
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SILICON CONTROLLED
RECTIFIERS
0.8 A RMS, 30 − 200 V
G
A
1
2
3
TO−92
CASE 29
STYLE 10
K
MARKING
DIAGRAM
2N
50xx
YWW
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 7
1Publication Order Number:
50xxSpecific Device Code
Y= Year
WW= Work Week
PIN ASSIGNMENT
1
2
3
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Cathode
Gate
Anode
2N5060/D
2N5060 Series
MAXIMUM RATINGS (T
Peak Repetitive Off−State Voltage (Note 1)
(T
= 40 to 110°C, Sine Wave,
J
50 to 60 Hz, Gate Open)2N5060
On-State Current RMS (180° Conduction Angles; TC = 80°C)I
*Average On-State Current
= 25°C unless otherwise noted)
J
Rating
2N5061
2N5062
2N5064
SymbolValueUnit
V
V
DRM,
RRM
V
30
60
100
200
T(RMS)
I
T(AV)
0.8A
A
(180° Conduction Angles)
= 67°C)
(T
C
(T
= 102°C)
C
*Peak Non-repetitive Surge Current,
T
= 25°C
A
I
TSM
0.51
0.255
10A
(1/2 cycle, Sine Wave, 60 Hz)
Circuit Fusing Considerations (t = 8.3 ms)I2t0.4A2s
*Average On-State Current
I
T(AV)
A
(180° Conduction Angles)
= 67°C)
(T
C
(T
= 102°C)
C
*Forward Peak Gate Power (Pulse Width 1.0 sec; TA = 25°C)P
*Forward Average Gate Power (TA = 25°C, t = 8.3 ms)P
*Forward Peak Gate Current (Pulse Width 1.0 sec; TA = 25°C)I
*Reverse Peak Gate Voltage (Pulse Width 1.0 sec; TA = 25°C)V
*Operating Junction Temperature RangeT
*Storage Temperature RangeT
GM
G(AV)
GM
RGM
J
stg
0.51
0.255
0.1W
0.01W
1.0A
5.0V
−40 to +110°C
−40 to +150°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. V
and V
DRM
voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current
for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate
RRM
source such that the voltage ratings of the devices are exceeded.
*Lead Solder Temperature (Lead Length 1/16″ from case, 10 s Max)−+230*°C
2. This measurement is made with the case mounted “flat side down” on a heatsink and held in position by means of a metal clamp over the
curved surface.
*Indicates JEDEC Registered Data.
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2
2N5060 Series
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
*Peak Repetitive Forward or Reverse Blocking Current (Note 3)
(V
AK
= Rated V
DRM
or V
)T
RRM
C
T
C
= 25°C
= 110°C
ON CHARACTERISTICS
*Peak Forward On−State Voltage (Note 4)
(I
= 1.2 A peak @ TA = 25°C)
TM
Gate Trigger Current (Continuous DC) (Note 5)
*(V
= 7.0 Vdc, RL = 100 )T
AK
C
T
C
= 25°C
= −40°C
Gate Trigger Voltage (Continuous DC) (Note 5)TC = 25°C
*(V
= 7.0 Vdc, RL = 100 )T
AK
= −40°C
C
*Gate Non−Trigger Voltage
(V
= Rated V
AK
, RL = 100 )TC = 110°C
DRM
Holding Current (Note 5)TC = 25°C
*(V
= 7.0 Vdc, initiating current = 20 mA)TC = −40°C
AK
Turn-On Time
Delay Time
Rise Time
(I
= 1.0 mA, VD = Rated V
GT
DRM
,
Forward Current = 1.0 A, di/dt = 6.0 A/s
Turn-Off Time
(Forward Current = 1.0 A pulse,
Pulse Width = 50 s,
4. Forward current applied for 1 ms maximum duration, duty cycle 1%.
current is not included in measurement.
5. R
GK
*Indicates JEDEC Registered Data.
Voltage Current Characteristic of SCR
SymbolParameter
V
I
DRM
V
I
RRM
V
I
H
DRM
RRM
TM
Peak Repetitive Off State Forward Voltage
Peak Forward Blocking Current
Peak Repetitive Off State Reverse Voltage
Peak Reverse Blocking Current
Peak on State Voltage
Holding Current
I
RRM
Reverse Avalanche Region
Anode −
dv/dt−30−V/s
on state
at V
RRM
Reverse Blocking Region
(off state)
+ Current
V
TM
I
H
Forward Blocking Region
(off state)
I
DRM
Anode +
at V
DRM
+ Voltage
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3
°
130
120
110
100
90
80
70
60
50
, MAXIMUM ALLOWABLE CASE TEMPERATURE ( C)
C
00.10.20.30.4
T
α = 30°
I
, AVERAGE ON-STATE CURRENT (AMP)
T(AV)
α = CONDUCTION ANGLE
60°
Figure 1. Maximum Case T emperatureFigure 2. Maximum Ambient T emperature
CURRENT DERATING
CASE MEASUREMENT
POINT − CENTER OF
FLAT PORTION
120°
90°
CURRENT DERATING
2N5060 Series
a
dc
180°
0.5
130
110
°
90
70
TEMPERATURE ( C)
, MAXIMUM ALLOWABLE AMBIENT
50
A
T
30
00.10.20.30.4
α = CONDUCTION ANGLE
α = 30°60°
I
, AVERAGE ON-STATE CURRENT (AMP)
T(AV)
90°
TYPICAL PRINTED
CIRCUIT BOARD
MOUNTING
dc
120°
180°
α
, INSTANTANEOUS ON-STATE CURRENT (AMP)
0.07
T
i
0.05
0.03
5.0
3.0
2.0
1.0
0.7
0.5
0.3
0.2
0.1
T
= 110°C
J
25°C
10
7.0
5.0
3.0
2.0
, PEAK SURGE CURRENT (AMP)
TSM
I
1.0
1.02.0 3.05.0 7.0 102050 70 100
NUMBER OF CYCLES
30
Figure 4. Maximum Non−Repetitive Surge Current
0.8
α = CONDUCTION ANGLE
0.6
0.4
a
α = 30°
60°
90°
120°
180°
dc
0.02
0.01
00.51.01.52.0
v
, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
T
Figure 3. Typical Forward Voltage
DISSIPATION (WATTS)
, MAXIMUM AVERAGE POWER
0.2
(AV)
P
2.5
0
00.20.5
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4
0.10.4
, AVERAGE ON-STATE CURRENT (AMP)
I
T(AV)
0.3
Figure 5. Power Dissipation
1.0
0.5
0.2
0.1
0.05
0.02
2N5060 Series
0.01
r(t), TRANSIENT THERMAL RESISTANCE NORMALIZED
0.8
0.7
0.6
0.5
0.4
, GATE TRIGGER VOLTAGE (VOLTS)
G
V
0.3
Figure 7. Typical Gate Trigger Voltage
0.020.220105.02.01.00.050.010.0020.0050.5
, JUNCTION TEMPERATURE (°C)
T
J
0.1
t, TIME (SECONDS)
Figure 6. Thermal Response
TYPICAL CHARACTERISTICS
VAK = 7.0 V
R
= 100
L
= 1.0 k
R
GK
500−75−50−252510075110
200
100
50
20
10
5.0
2N5060-61
2.0
1.0
0.5
, GATE TRIGGER CURRENT (NORMALIZED)
GT
I
0.2
VAK = 7.0 V
R
= 100
L
2N5062-64
500−75−50−252510075
T
, JUNCTION TEMPERATURE (°C)
J
Figure 8. Typical Gate Trigger Current
110
4.0
3.0
2.0
1.0
0.8
0.6
, HOLDING CURRENT (NORMALIZED)
H
I
0.4
VAK = 7.0 V
R
= 100
L
= 1.0 k
R
GK
2N5060,61
2N5062-64
500−75−50−25
2510075110
, JUNCTION TEMPERATURE (°C)
T
J
Figure 9. Typical Holding Current
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5
2N5060 Series
ORDERING INFORMATION
DevicePackageShipping
2N5060TO−925,000 Units / Box
2N5060RLRATO−922,000 / Tape & Reel
2N5060RLRAGTO−92
(Pb−Free)
2N5060RLRMTO−922,000 / Ammo Pack
2N5061TO−925,000 Units / Box
2N5061GTO−92
(Pb−Free)
2N5064TO−925,000 Units / Box
2N5064RLRATO−922,000 / Tape & Reel
2N5064RLRMTO−922,000 / Ammo Pack
2N5064RLRMGTO−92
(Pb−Free)
2N5060RL1TO−922,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
2,000 / Tape & Reel
5,000 Units / Box
2,000 / Tape & Reel
5,000 Units / Box
2,000 / Tape & Reel
2,000 / Ammo Pack
†
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6
2N5060 Series
PACKAGE DIMENSIONS
TO−92
TO−226AA
CASE 29−11
ISSUE AL
SEATING
PLANE
A
B
R
P
L
K
XX
V
1
G
H
C
N
D
J
SECTION X−X
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
DIM MINMAXMIN MAX
A 0.175 0.2054.455.20
B 0.170 0.2104.325.33
C 0.125 0.1653.184.19
D 0.016 0.021 0.407 0.533
G 0.045 0.0551.151.39
H 0.095 0.1052.422.66
J 0.015 0.0200.390.50
K 0.500−−− 12.70−−−
L 0.250−−−6.35−−−
N 0.080 0.1052.042.66
P−−− 0.100−−−2.54
R 0.115−−−2.93−−−
V 0.135−−−3.43−−−
STYLE 10:
PIN 1. CATHODE
2. GATE
3. ANODE
MILLIMETERSINCHES
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7
2N5060 Series
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
2N5060/D
8
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