OKI MSM66P54-01, MSM66P54-02, MSM66P54-03, MSM66P54-04 Datasheet

4-1OKI SEMICONDUCTOR
MSM66P54
One-Time Programmable (OTP) Speech Synthesizer
DESCRIPTION
The MSM66P54 is a one-time-programmable (OTP) version of the MSM6654 speech synthesizer, suitable for evaluation of the MSM6650 family and code development. This part is also suitable for applications requiring small quantities and/or short-term delivery after code completion. The PC-based AR76-202 Speech Development System is used for speech encoding, editing, and programming of the MSM66P54.
When compared to the mask-programmed MSM6654 version, the SOP-packaged version of the MSM66P54 is backwards compatible, while the DIP-packaged version has two extra pins for program­ming. On the DIP version, programming pins can either be cut off or left open after programming. DIP pin spacing and location allows insertion of the MSM66P54 into an IC socket intended for the MSM6654.
To provide high-quality speech synthesis, all members of the MSM6650 family members implement adaptive differential pulse-code modulation (ADPCM) playback, pulse-code modulation (PCM) play­back, 12-bit D/A conversion, and an on-chip -40dB/octave low-pass filter (LPF). In addition, easy-to-use “beep” tones, a two-channel mixing function, a melody function, a fade-out function, and a random play­back function are included. Also, an on-chip edit ROM can form sentences by catenating phrases, making external control simpler than before.
Four code versions of the MSM66P54 are available. Stand-alone or microcomputer (MCU) interface modes can be selected by using one of the four available codes. The table below shows the code versions available.
FEATURES
MSM66P54 Code Versions
Part No. OTP ROM Mode Interface/Standby Features
MSM66P54-01 1 Mbit MCU Interface Mode Serial Interface MSM66P54-02 1 Mbit MCU Interface Mode Parallel Interface MSM66P54-03 1 Mbit Standalone Mode Standby Function MSM66P54-04 1 Mbit Standalone Mode No Standby Function
• Single-chip synthesizer
• 4-bit ADPCM or 8-bit PCM sound playback
• Melody function
• Edit ROM function
• Built-in two-channel mixing function
• Internal random playback function
• Fade-out function
• Built-in “beep” tones at 0.5, 1.0, 1.6, and 2.0 kHz
• Sampling frequency of 4.0, 5.3, 6.4, 8.0, 10.6, 12.8, 16, or 32 kHz
[1]
• Up to 127 phrases
• Internal 12-bit D/A converter
• Internal -40 dB/octave low-pass filter (LPF)
• Built-in standby function
• Selectable RC oscillation or ceramic/crystal oscillation
• Package options include 20-pin DIP (DIP20-P-300), 24-pin SOP (SOP24-P-430-2K), or die
1. 32 kHz is not available when RC oscillation is selected
MSM66P54 OTP Speech Synthesizer ■––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
4-2 OKI SEMICONDUCTOR
The table below shows the additional functions available in the MSM6650 family when compared to the family’s predecessor, the MSM637x family.
SPEECH DURATION
[1] Actual ROM area in MSM6652, MSM6653, MSM6654, MSM6655, and MSM6656 is smaller by 22 Kbits. [2] Via external ROM only (no on-chip ROM available). [3] OTP version.
Comparison of MSM6376 and MSM6650 Families
MSM6650 Family MSM637x Family
Control Method
Standalone mode
Microcomputer mode - parallel input
Microcomputer mode - serial input
CPU input - software control
Speech synthesis method
4-bit ADPCM or
8-bit PCM/Melody PCM
4-bit ADPCM
“Beep” tone frequency (length)
0.5, 1.0, 1.6, or 2.0 kHz
(User-specified length of variable duration)
1.0 or 2.0 kHz, (User-specified length,
fixed at either 64, 128, 250, or 500 ms)
Sampling frequency (fS)
Eight frequencies
(4.0, 5.3, 6.4, 8.0, 10.6, 12.8, 16.0, or 32.0 kHz)
Three frequencies at two oscillator frequencies
(4.0, 6.4, or 8.0 kHz with f
OSC
= 64 kHz;
16.0, 25.6, or 32.0 kHz with f
OSC
= 256 kHz) Master clock frequency 256 kHz (RC) / 4.096 MHz (crystal) 40 kHz ~ 256 kHz LPF attenuation factor –40 dB/octave –24 dB/octave
LPF cut-off Frequency (f
CUT
), kHz
Maximum phrase number 127 (in MCU Interface Mode) 111 Pull-up/pull-down resistors Built in — Standby conversion time 200 ms 3 Sec Maximum external ROM 64 Mbit 16 Mbit
Added functions in edit ROM
Fade-out
Random playback
Melody playback
PCM playback
Serial input control
No Edit ROM
Type
Data ROM
Capacity
[1]
Maximum Speech Duration
f
SAM
= 4.0 kHz f
SAM
= 6.4 kHz f
SAM
= 8.0 kHz f
SAM
= 16.0 kHz f
SAM
= 32.0 kHz
MSM6650 64 Mbits
[2]
> 1 hour > 40 minutes > 30 minutes > 15 minutes > 8 minutes MSM6652 288 Kbit 16.9 sec 10.5 sec 8.4 sec 4.2 sec 2.1 sec MSM6653 544 Kbit 31.2 sec 19.5 sec 15.6 sec 7.8 sec 3.9 sec MSM6654 1 Mbit 63.8 sec 39.9 sec 31.9 sec 15.9 sec 7.9 sec
MSM66P54
[3]
1 Mbit 63.8 sec 39.9 sec 31.9 sec 15.9 sec 7.9 sec
MSM6655 1.5 Mbit 96.5 sec 60.3 sec 48.2 sec 24.1 sec 12.0 sec MSM6656 2 Mbit 129.1 sec 80.7 sec 64.5 sec 32.2 sec 16.1 sec
f
CUT
1.8 2.6 2.6 3.2 4.2 5.1 6.4 12.8
f
SAM
4.0 5.3 6.4 8.0 10.6 12.8 16.0 32.0
f
CUT
1.5 3.0 3.0
f
SAM
4.0 6.4 8.0
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– ■ Package Drawings
4-3OKI SEMICONDUCTOR
PACKAGE DRAWINGS
Figure 1. MSM66P54 Mechanical Drawing (DIP20-P-300-W1 Package)
Figure 2. MSM66P54 Mechanical Drawing (SOP24-P-430-2K Package)
7.62
0~15°
0.25 +0.11/-0.05
5.08 MAX.3.3 ±0.3
6.4 ±0.2
22.6 ±0.2
18 10
19
0.6 TYP.
4.57 MAX.
SEATING PLANE
2.54 1.5241.14 TYP. 0.46 +0.13/-0.08 ø0.25
M
Dimensions in mm.
2.2 ±0.2
2.7 MAX.
1.2 ±0.2
24 13
112
0.99 TYP.
Dimensions in mm.
Index Mark
1.27 0.35 ±0.1 0.25
M
15.95 ±0.1
7.9 ±0.1
12.0 ±0.5
Seating Plane
7.9 ±0.1
0.2 +0.1/-0.05
0~10°
2.05 ±0.3
0 ~ 0.3
MSM66P54 OTP Speech Synthesizer ■––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
4-4 OKI SEMICONDUCTOR
BLOCK DIAGRAMS
Figure 3. MSM66P54-03/-04 Block Diagram (Standalone Mode)
Address &
Switching Controller
8
12
17-Stage Address Counter
7
Random
Circuit
I/O
Interface
OSC
(X’tal/RC)
Timing Controller
AOUTRESETXT/RC GNDVDD
A2 A1
A0 SW3 SW2 SW1 SW0
TEST
OSC1 OSC2 OSC3
BUSY
DATA
Controller
Melody
Generator
ADPCM
Synthesizer
PCM
Synthesizer
12-bit
DAC
LPF
BEEP Tone
Generator
RND
17-Stage Multiplexer
1-Mbit OTP ROM
(Containing 22-Kbit Edit
ROM & Address ROM)
Programming Circuitry
PGM
VPP
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– ■ Block Diagrams
4-5OKI SEMICONDUCTOR
Figure 4. MSM66P54-01/-02 Block Diagram (MCU Interface Mode)
Address & Command
Controller
8
12
17-Stage Address Counter
7
I/O
Interface
OSC
X’tal
Timing Controller
AOUTRESET GNDVDD
I6/SD
I5/SI
14 I3/PORT1 I4/PORT0
I1 I0
XT
BUSY
DATA
Controller
Melody
Generator
ADPCM
Synthesizer
PCM
Synthesizer
12-bit
DAC
LPF
BEEP Tone
Generator
17-Stage Multiplexer
NAR
ST
CMD
CH
XT
1-Mbit OTP ROM
(Containing 22-Kbit Edit
ROM & Address ROM)
Programming Circuitry
PGM
VPP
MSM66P54 OTP Speech Synthesizer ■––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
4-6 OKI SEMICONDUCTOR
PIN CONFIGURATION
Figure 5. MSM66P54-03/-04 Configuration (Standalone Mode)
Figure 6. MSM66P54-01/-02 Pin Configuration (MCU Interface Mode)
A0
201
A1
2
A2
3
TEST
4
RESET
5
BUSY
6
XT/RC
7
AOUT
8
GND
9
SW319 SW218 SW117 SW016 RND15 OSC314 OSC213 OSC112 VDD
18 Lead Plastic DIP
VDD OSC1 OSC2
NC
OSC3
NC
PGM
RND
SW0
SW1
SW2
SW3
24 Lead Plastic SOP
GND AOUT XT/RC NC BUSY NC VPP RESET TEST A2 A1 A0
24 23 22 21 20 19 18 17 16 15 14 13
1 2 3 4 5 6 7 8 9 10 11 12
10 11
VPP PGM
I4 192
I5/SI 3
I6/SD 4
CH 5
RESET 6
BUSY 7
NAR 8
AOUT 9
GND 10
I3/PORT1 18 I2/PORT0 17 I1 16 I0 15 ST 14 CMD 13 XT 12 XT 11 VDD
20-Lead Plastic DIP
VDD
XT XT
NC
CMD
NC
PGM
ST
I0 I1
I2/PORT0
13/PORT1
24 Lead Plastic SOP
GND AOUT NAR NC BUSY NC VPP RESET CH I6/SD I5/SI I4
24 23 22 21 20 19 18 17 16 15 14 13
1 2 3 4 5 6 7 8 9 10 11 12
VPP 201 PGM
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– ■ Pin Descriptions
4-7OKI SEMICONDUCTOR
PIN DESCRIPTIONS
MSM66P54-03/-04 Pin Descriptions (Standalone Mode)
Pin Name I/O Function
RESET
I
Reset
. Setting this pin to “L” puts the device in standby status. At this time, oscillation stops, A
OUT
is pulled to GND, and the device is initialized. The MSM6650 Family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET
pulse when power is turned
on. This pin has an internal pull-up resistor.
BUSY
O
Busy
. This pin outputs a “L” level during playback. At power-on, this pin is at “H” level.
XT/RC
I
X’tal/RC selectable pin
. Set to “H” level when using ceramic/crystal oscillation. Set to “L” level when using RC
oscillation.
A
OUT
O
Sound output
. This is the synthesized output pin of the internal low-pass filter.
GND
Ground
.
V
DD
Power supply
.
OSC1 I
Oscillator 1.
This pin is a ceramic/crystal oscillator connection pin when using ceramic or crystal oscillation. This pin
is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input.
OSC2 O
Oscillator 2
. This pin is a ceramic/crystal oscillator connection pin when using a ceramic or crystal oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a “L” level in standby status.
OSC3 O
Oscillator 3.
Leave open if using a ceramic/crystal oscillator. This pin is the RC connection pin when using RC
oscillation. When RC oscillation is selected, OSC3 outputs a “H” level in standby status.
RND
I
Random Playback.
Random playback starts when the RND pin is set to a “L” level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a “H” level if random playback is not used. This pin has an internal pull-up resistor.
TEST
I
Test Mode
. Set to “H” level. This pin has an internal pull-up resistor.
SW0 ~ SW3 I
Phrase Inputs.
These pins are phrase input pins corresponding to playback. If the input changes, SW0 ~ SW3 pins
capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors.
A0 ~ A2 I
Phrase Inputs.
Phrase input pins corresponding to playback. The A0 input becomes invalid when the random playback
function is used.
VPP Power-supply voltage for programming the on-chip OTP ROM. Set to a “H” level or open during normal operation. PGM I Interface pin for AR76-202 Speech Development System. Set to a “L” level or open during normal operation. This pin
has an internal pull-down resistor.
MSM66P54-01/-02 Pin Descriptions (Microcomputer Interface Mode)
Pin Name I/O Function
RESET
I
Reset
. Setting this pin to “L” puts the device in standby status. At this time, oscillation stops, A
OUT
is pulled to GND, and the device is initialized. The MSM6650 Family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET
pulse when power is turned
on. This pin has an internal pull-up resistor.
BUSY
O
Busy
. This pin outputs a “L” level during playback. At power-on, this pin is at “H” level.
NAR O
Next Address Request.
The CMD
and ST input is valid when NAR is at a “H” level. When the CH pin is at “H” level,
NAR becomes a Channel 1 status signal. When the CH
pin is at “L”, NAR becomes a Channel 2 status signal. This pin indicates whether the register that latches the addresses of I0~I6 in the Address & Command Controller (refer to the block diagram) is empty or not. At “H” level, it is empty and new address data may be applied. At power-on, NAR is “H” level.
AOUT O
Analog Sound Output
. Either the D/A converter or the low-pass filter output can be selected by a command input.
GND
Ground.
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