4-Bit Microcontroller with Built-in 640-Dot Matrix LCD Drivers, Operating at 0.9 V (Min.)
GENERAL DESCRIPTION
The MSM63184A is an enhanced version of the MSM63184B in which supply currents have been
improved.
The MSM63184A is a CMOS 4-bit microcontroller with built-in 640-dot matrix LCD drivers and
operates at 0.9 V (min.). The MSM63184A is suitable for applications such as games, toys,
watches, etc. which are provided with an LCD display.
The MSM63184A is an M6318x series mask ROM-version product of OLMS-63K family, which
employs Oki's original CPU core nX-4/250.
The MSM63P180 is the one-time-programmable ROM version of MSM63188A, having one-time
PROM (OTP) as internal program memory.
The MSM63P180 is used to evaluate the software development.
FEATURES
• Rich instruction set
439 instructions
Transfer, rotate, increment/decrement, arithmetic operations, comparison, logic operations,
mask operations, bit operations, ROM table reference, external memory transfer, stack
operations, flag operations, branch, conditional branch, call/return, control.
• Rich selection of addressing modes
Indirect addressing of four data memory types, with current bank register, extra bank
register, HL register and XY register.
Data memory bank internal direct addressing mode.
• Processing speed
Two clocks per machine cycle, with most instructions executed in one machine cycle.
Minimum instruction execution time: 61 ms (@ 32.768 kHz system clock)
• I/O ports
Input ports: Selectable as input with pull-up resistance/input with pull-down resistance/
high-impedance input
Output ports: Selectable as P-channel open drain output/N-channel open drain output/
CMOS output/high-impedance output
Input-output ports: Selectable as input with pull-up resistance/input with pull-down
resistance/high-impedance input
Selectable as P-channel open drain output/N-channel open drain
output/CMOS output/high-impedance output
Can be interfaced with external peripherals that use a different power supply than this device
uses.
Number of ports:
• Buzzer function
Buzzer output: 0.946 to 5.461 kHz (adjustable in 15 steps)
Buzzer output modes: Intermittent sound 1, 2; simple sound; continu-
ous sound
• LCD driver
Number of segments: 640 Max. (40 SEG ¥ 16 COM)
1/1 to 1/16 duty
1/4 or 1/5 bias (regulator built-in)
Selectable as all-on mode/all-off mode/power down mode/normal display mode
Adjustable contrast
• Reset function
Reset through RESET pin
Power-on reset
Reset by low-speed oscillation halt
• Battery check
Low-voltage supply check
Criterion voltage: Can be selected as 1.05 ±0.10 V, 1.30 ±0.15 V,
2.20 ±0.20 V or 2.80 ±0.30 V
• Power supply backup
Backup circuit (voltage multiplier) enables operation at 0.9 V minimum
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¡ SemiconductorMSM63184A
• Timers and counter
Watchdog timer ¥ 1
Overflows in 2 sec.
100 Hz timer ¥ 1
Measurable in steps of 1/100 sec.
15-bit time base counter ¥ 1
1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read
• Shift register
Shift clock: 1x or 1/2x system clock; external clock
Data length: 8 bits
• Interrupt sources
External interrupt: 3
Internal interrupt: 7 (watchdog timer interrupt is a nonmask-
able interrupt)
• Operating voltage
When backup used: 0.9 to 2.7 V
(Low-speed clock operating)
1.2 to 2.7 V
(Operating frequency: 300 to 500 kHz)
1.5 to 2.7 V
(Operating frequency: 200 kHz to 1 MHz)
When backup not used: 1.8 to 5.5 V
(Operating frequency: 300 to 500 kHz)
2.2 to 5.5 V
(Operating frequency: 300 kHz to 1 MHz)
2.7 to 5.5 V
(Operating frequency: 200 kHz to 2 MHz)
Differences Between the MSM63184B and the MSM63184A
The MSM63184A has the following improved characteristics.
• Supply currents (I
• The V
voltage during a halt of high-speed clock oscillation
DDL
DD1
, I
DD2
, I
) in DC characteristics
DD3
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¡ SemiconductorMSM63184A
BLOCK DIAGRAM
An asterisk (*) indicates the port secondary function. indicates that the power is supplied
to the circuits corresponding to the signal names inside from V
interface).
60 P5.1
59 P5.2
58 P5.3
57 TST1
56 TST2
55 XT0
54 XT1
53 RESET
52 OSC0
51 OSC1
50 V
49 V
48 CB2
47 CB1
46 V
45 C2
44 C1
43 V
42 V
41 V
40 V
39 V
38 V
SEG0 37
DDL
DD
DDH
DD5
DD4
DD3
DD2
DD1
SS
Y
X
Chip Size: 5.35 mm ¥ 4.66 mm
Chip Thickness: 350 mm (typ.)
Coordinate Origin: Chip center
Pad Hole Size: 100 mm ¥ 100 mm
Pad Size: 110 mm ¥ 110 mm
Minimum Pad Pitch: 140 mm
The basic functions of each pin of the MSM63184A are described in Table 1.
A symbol with a slash (/) denotes a pin that has a secondary function.
Refer to Table 2 for secondary functions.
For type, "—" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an inputoutput pin.
Table 1 Pin Descriptions (Basic Functions)
Function SymbolPinType
52—
40—
41
42
43—
44
45
V
V
V
V
V
V
V
DD
SS
DD1
DD2
DD3
DD4
DD5
C146—
Power
Supply
C247—
V
V
V
DDI
DDL
DDH
110—
53—
48—
CB149—
CB250—
XT058I
XT157O
Oscillation
OSC055I
OSC154O
TST160I
Test
TST259I
ResetRESET56I
Description
Positive power supply
Negative power supply
Power supply pins for LCD bias (internally generated).
Capacitors (0.1 mF) should be connected between these pins and
.
V
SS
Capacitor connection pins for LCD bias generation.
A capacitor (0.1 mF) should be connected between C1 and C2.
Positive power supply pin for external interface
(power supply for input, output, and input-output ports)
Positive power supply pin for internal logic (internally generated).
A capacitor (0.1 mF) should be connected between this pin and V
SS
Voltage multiplier pin for power supply backup (internally generated)
A capacitor (1.0 mF) should be connected between this pin and VSS.
Pins to connect a capacitor for voltage multiplier.
A capacitor (1.0 mF) should be connected between CB1 and CB2.
Low-speed clock oscillation pins.
A 32.768 kHz crystal should be connected between XT0 and XT1,
(5 to 25 pF) should be connected between XT0 and VSS.
and C
G
High-speed clock oscillation pins.
A ceramic resonator and capacitors (C
oscillation resistor (R
) should be connected to these pins.
OS
, CL1) or external
L0
Input pins for testing.
A pull-down resistor is internally connected to these pins.
The user cannot use these pins.
Reset input pin.
Setting this pin to "H" level puts this device into a reset state.
Then, setting this pin to "L" level starts executing an instruction
from address 0000H.
A pull-down resistor is internally connected to this pin.