OKI MR27C1602B Technical data
OKI Semiconductor
FEDR27C1602B-01-03
Issue Date: Jun. 17, 2003
MR27C1602B
1,048,576–Word × 16–Bit or 2,097,152–Word × 8–Bit One Time PROM
GENERAL DESCRIPTION
The MR27C1602B is a 16 Mbit electrically One Time Programmable Read-Only Memory that can be electrically
switched between 1,048,576-word × 16-bit and 2,097,152-word × 8-bit by the state of the BYTE# pin. The
MR27C1602B supports high speed asynchronous read operation using a single 5.0V power supply.
FEATURES
· 1,048,576-word × 16-bit/2,097,152-word × 8-bit electrically switch able configuration
· +5.0 V power supply
· Access time 90 nS MAX
· Operating current 70 mA MAX
· Standby current 50 µA MAX
· Input/Output TTL compatible
· Tri-state output
· Packages:
42-pin plastic DIP (DIP42-P-600-2.54) (MR27C1602BRA)
44-pin plastic SOP (SOP44-P-600-1.27-K (MR27C1602BMA)
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FEDR27C1602B-01-03
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OKI Semiconductor
PIN CONFIGURATION (TOP VIEW)
Pin name Functions
D15/A–1 Data output/Address input
A0 to A19 Address input
D0 to D14 Data output
CE# Chip enable
OE# Output enable
BYTE#/VPP Mode switch/Program power supply voltage
VCC Power supply voltage
VSS GND
NC Non connection
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
V
SS
OE#
D0
D8
D1
D9
D2
D10
D3
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44-pin SOP
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
19
8
9
10
11
12
13
14
15
16
BYTE#/V
V
SS
D15/A–1
D7
D14
D6
D13
D5
D12
D4
V
CC
MR27C1602B (OTP)
A18
1
A17
2
3
A7
4
A6
5
A5
6
A4
7
A3
8
A2
9
A1
10
A0
11
CE#
PP
12
V
SS
13
OE#
14
D0
15
D8
16
D1
17
D9
18
D2
19
D10
20
D3
21
D11
42-pin DIP
42
41
40
39
38
37
36
35
34
33
BYTE#/V
32
VSS
31
D15/A–1
30
D7
29
D14
28
D6
27
D13
26
D5
25
D12
24
D4
23
V
22
19
8
9
10
11
12
13
14
15
16
CC
PP
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FEDR27C1602B-01-03
A0
–
OKI Semiconductor
MR27C1602B (OTP)
BLOCK DIAGRAM
A
1
× 8/× 16 Switch
CE# BYTE#/V
OE#
PP
CE PGM OE
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
Memory Cell Matrix
Row Decoder
Address Buffer
Column Decoder
1,048,576 × 16-Bit or 2,097,152 × 8-Bit
Multiplexer
Output Buffer
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
FUNCTION TABLE
Mode CE# OE# BYTE#/VPP VCC D0 to D7 D8 to D14 D15/A–1
Read (16-Bit) L L H D
Read (8-Bit) L L L D
Output disable L H
Standby H ∗
Program L H DIN
Program inhibit H H Hi–Z
Program verify H L
H
L
H
L
9.75 V 4.0 V
5.0 V
∗: Don’t Care (H or L)
Hi–Z L/H
OUT
Hi–Z
Hi–Z
D
OUT
OUT
∗
∗
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FEDR27C1602B-01-03
OKI Semiconductor
MR27C1602B (OTP)
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Condition Value Unit
Operating temperature under bias Ta 0 to 70 °C
Storage temperature Tstg
Input voltage VI –0.5 to VCC+0.5 V
Output voltage VO –0.5 to VCC+0.5 V
Power supply voltage VCC –0.5 to 7 V
Program power supply voltage VPP
Power dissipation per package PD — 1.0 W
—
relative to V
SS
–55 to 125 °C
–0.5 to 11.5 V
RECOMMENDED OPERATING CONDITIONS
(Ta = 0 to 70°C)
Parameter Symbol Condition Min. Typ. Max. Unit
VCC power supply voltage VCC 4.5 — 5.5 V
VPP power supply voltage VPP –0.5 — VCC+0.5 V
Input “H” level VIH 2.2 — VCC+0.5∗ V
Input “L” level VIL
Voltage is relative to V
SS
.
∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns.
V
= 4.5 to 5.5 V
CC
–0.5∗∗ — 0.8 V
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FEDR27C1602B-01-03
OKI Semiconductor
MR27C1602B (OTP)
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VCC = 5.0 V ± 0.5 V, Ta = 0 to 70°C)
parameter Symbol Condition Min. Typ. Max. Unit
Input leakage current ILI V
Output leakage current ILO V
I
CE# = VCC — — 50 µA VCC power supply current
CCSC
(Standby)
V
power supply current
CC
(Read)
I
CE# = VIH — — 1 mΑ
CCST
I
CCA
VPP power supply current IPP V
Input “H” level VIH — 2.2 — VCC+0.5∗ V
Input “L” level VIL — –0.5∗∗ — 0.8 V
Output “H” level VOH I
Output “L” level VOL I
Voltage is relative to V
SS
.
∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns.
AC Characteristics
Parameter Symbol Condition Min. Max. Unit
Address cycle time tC — 90 — ns
Address access time t
CE# = OE# = VIL — 90 ns
ACC
CE access time tCE OE# = VIL — 90 ns
OE access time tOE CE# = VIL — 45 ns
t
OE# = VIL 0 30 ns
Output disable time
CHZ
CE# = VIL 0 25 ns
t
OHZ
Output hold time tOH CE# = OE# = VIL 0 — ns
Measurement conditions
Input signal level--------------------------------0 V/3 V
Input timing reference level ------------------0.8 V/2.0 V
Output load---------------------------------------1TTL gate + 100 pF
Output timing reference level----------------0.8 V/2.0 V
= 0 to VCC — — 10 µA
I
= 0 to VCC — — 10 µA
O
CE# = V
, OE# = V
IL
tc = 90 ns
= VCC — — 10 µA
PP
= –400 µA 2.4 — — V
OH
= 2.1 mA — — 0.4 V
OL
IH
— — 70 mA
(VCC = 5.0 V ± 0.5 V, Ta = 0 to 70°C)
2.08 V
Output
800 Ω
100 pF
(Including scope and jig)
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