The Symphony SoundBite is a ver satile audio application development bo ard built upon the DSPB56371
Digital Signal Processor. The Symphony SoundBite costs very little and is ideal for cost-sensitive
organizations, like university digital signal processing labs, small engineering companies, and even the
frugal hobbyist.
Capable of simultaneously processing 8
independent or 4 stereo pairs of audio
input and output, the Symphony
SoundBite has 4 stereo input and output
jacks to connect to line-level analog
audio. One pair of input and output jacks
is shared with an optical S/PDIF receiver
and transmitter, enabling direct digital
audio input and output (mini TOS-link).
Four 24-bit stereo codecs handle analog
conversion at sampling rates up to 192
kHz. You can also interact with
application code running on the DSP,
using DIP switches and multi-colored
LEDs (connected to GPIO pins).
The board includes an integral,
multi-mode communication and
debugging interface that enables low
level JTAG debugging, in addition to
high-level serial communications with the DSP via SPI or I2C.
Features:
•Main Processor: 24-bit DSPB56371 Digital Signal Processor
— up to 180 million instructions per second (MIPS) at 180 MHz core clock
— 1.25 V core supply with 3.3 V peripheral I/O supply
— Dual-Harvard architecture core (two data memory spaces in addition to program space)
— On-chip memories:
– 4–44K x 24-bit words of PRAM
– 28–36K x 24-bit words of XRAM
– 16–48K x 24-bit words of YRAM
– User-configurable memory partitions
— T wo Enhanced Serial Audio Interfaces (ESAIs) provide up to 8 channels of digi tal audio input
and output
— Serial Host Interface (SHI) provides interface for high level serial communication
— Triple timer module
2
— Serial I
2Freescale Semiconductor
C boot EEPROM allows for fully stand-alone operation of Symphony SoundBite
Symphony SoundBi te Reference Manual, Rev. 2. 0
Page 3
Functional Blocks
Debug/Com
Interface
Power Supply
Audio
Conversion
Figure 2. Symphony SoundBite
Major Functional Blocks
DSP
•Audio Subsystem:
— Three AK4556 24-bit 192 kHz stereo codecs connected to 3 sets of line-level 3.5 mm stereo
– Provides master clock for all codecs, synchronizing all digital audio signals
– One set of line-level 3.5mm s tereo jacks shared with opt ical S/PDIF receiver a nd transmitter
— On-board microphone and pre-amplifier
•General Purpose I/O
— 8-position DIP switch provided for user inputs to DSP application software
— 9 LEDs in red, yellow and green provide visual indication
— Student Learning Kit (SLK) header provides compatibility with the University Relations
Project Board
•Debugging and Communication Interface
— On-board FT2232 dual USB UART provides for low-level JTAG/OnCE and high-level
Symphony Debugger Interface debuggers
— Operational mode of integrated debugger hardware is controlled by host PC application
software
— LEDs indicate the operational mode of the debugging interface
— Push-button system reset switch
— DSP boot mode configuration DIP switch
•Power Supply
— 2.1 mm barrel jack allows for the use of an external 6–9 V AC/DC power supply
(recommended configuration)
— Capable of being powered exclusively from the USB of the host computer (Powering by USB
power alone limits the analog performance capabilities of AK4584 codec)
— Capable of being powered via SLK header
— Power supply selected by a single jumper and indicated by an LED
2Functional Bloc ks
The Symphony SoundBite development board consists of 4
functional blocks:
•Analog Audio Conversion
•Digital Signal Processor (DSP )
•Debug/Communication Interface
•Power Supply
See Figure 2.
Frees c ale Semi co n du c tor3
Symphony SoundBi te Reference Manual, Rev. 2. 0
Page 4
Functional Blocks
Digital Signal Processor:
A DSPB56371 device (U1) comprises the bulk of the DSP functional block and sits at the heart of the
Symphony SoundBite development board. Positions 1 through 4 of SW2 are connected to the MOD pins
of the DSP and set the boot mode. An I2C serial EEPROM (U6), connected to the DSP through positions
5 and 6 of SW2, provides non-volatile data storage and allows the Symphony SoundBite to boot up and
run application software in a stand-alone configuration (without a PC connected to download code). Audio
data in I2S format is transmitted through the DSP's ESAI port and received via the DSP's ESAI_1 port.
The balance of the DSP pins are connected to an expansion header (CON1), as well as to an 8-position DIP
switch and to 9 LEDs for general purpose use.
The sytem clock is provided by two gates of U12 and a 24.576 MHz crystal. Power-on reset and manual
reset of the DSP and codecs is controlled by the reset manager (U11, U13) and the reset switch (SW3).
Audio Conversion:
The Audio Conversion functional block consists of three AK4556 devices (U2, U3, and U4) and one
AK4584 (U5) 24-bit codec. Digital audio data is transmitted and received in I2S format. The AK4584
generates the master left/right and bi t clocks for all the codecs and the DSP's ESAI ports. Four stereo pairs
(or 8 mono channels) of analog audio input and output are provided at jacks J1–J8.
Digital audio input/output in optical S/PDIF format is supported by combination analog/digital jacks (J1,
J2) and an integrated digital audio receiver/transmitter in the AK4584 device. A built-in microphone is
connected to a fixed gain preamplifier (U14) which in turn is connected through jumper JP1 to the analog
inputs at jack J1. The microphone gain can be adjusted further through the internal amplifier within the
AK4584. The AK4584 is configured by the DSP over serial control lines connected to dedicated GPIO
pins on the DSP.
Debug/Communication Interface:
Debugging and communication between a host computer's USB port and the DSP is implemented using
the FT2232 multi-mode USB device (U7). Three modes of communication are permitted between the host
computer and the DSP: I2C, SPI and JTAG/OnCE. The communication mode is selected by software on
the host PC via the GPIO pins on the FT2232 device, which route the signal lines to the appropriate
peripheral on the DSP via buff er U9 (SPI and JTAG/OnCE) and analog switch U10 (I2C).
JTAG/OnCE is used for low-level debugging of the DSP. The SHI port on the DSP can be used for
2
high-level communication between the DSP and host PC using I
C or SPI protocol. The USB identity of
the FT2232 is provided by the serial EEPROM (U8). LED10, LED1 1, and LED12 indicate which protocol
is in use by the PC host application software.
Power Supply:
The Power Supply allows the Symphony SoundBite board to operate from an external power supply or
directly from a host computer's USB port. Note that when the Symphony SoundBite is powered only from
the USB port, AK4584 performance may not meet its data sheet specifications. For that reason, powering
the Symphony SoundBite board with an external supply is recommended and preferred.
Jumper JP3 selects the source for the board's power supply: external power via jack PWR_JACK (short
pins 1-2), power from the host computer's USB port (short pins 2-3). Alternately, if no pins of JP3 are
shorted, the Symphony SoundBite can be supplied with regulated 5V via pin 1 of the expansion connector
CON1.
4Freescale Semiconductor
Symphony SoundBi te Reference Manual, Rev. 2. 0
Page 5
Confi guration and Connec tions
DSP56371
AK4556
J3
J4
Stereo Input 1
Stereo Output 1
J5
J6
Stereo Input 2
Stereo Output 2
J7
J8
Stereo Input 3
Stereo Output 3
AK4584
J1
J2
Stereo Input 0
Stereo Output 0
J1
J2
SPDIF In put
SPDIF Output
Serial link
SW1
SW2
Boot Mode
U3
U4
U5
U1
U5
MK1
Microphone
FT2232
U9
USB UART
EEPROM
U19
256 Kbit
USB
U11
JTAG/OnCE
SDI/SPI
SDI/I2C
U9A
U9B
Power In
PWR-JACK
U12U14U17
5V3.3V1.25V
Audio
CODEC
Digital Signa l Pr ocessor
Audio CODEC
Component placement on this
diagram do es not refl ect the acutal
component locations.
OR
JP1
CAUTION
If you power the board using the CON1 connector, JP3 must have no
jumpers in place, or the Symphony SoundBite board will get damaged.
The external supply can be 6–9 V AC or 9–12 VDC with a current capacity of at least 400 mA. When USB
powering is selected, the Symphony SoundBite board remains unpowered until the FT2232 is enumerated
with the PC host. When this occurs, the FT2232 (U7) PWREN# signal is asserted low, applying 5V from
the USB port through the the current limiting switch TPS2021 (U15) to the 3.3V and 1.25V regulators.
LED13 is lighted when the Symphony SoundBite development board has powered up successfully.
Figure 3 shows a more detailed diagram of the off-board and interconnections between the various
functional blocks on the board.
Figure 3. Symphony SoundBite Board-Block Diagram
3Configuration and Connec tion s
Configuring a Symphony SoundBite board is easy, because most configuration is done via software.
Frees c ale Semi co n du c tor5
Symphony SoundBi te Reference Manual, Rev. 2. 0
Page 6
Confi guration and Conne c tions
3.1Select Power Source
NOTE
Powering the Symphony SoundBite from a USB port alone may degrade
audio performance because:
(1) The supply voltage at the AK4584 may be under the specified minimum
limit of 4.75V due to voltage drops in the USB cabling and in the power
supply section of the Symphony SoundBite board.
(2) Noise from the USB port may be transmitted through the AK4584
device because there is no regulator in the power supply line to isolate and
filter the noise.
The power source for the Symphony SoundBite board is selected using the JP3 jumper. See Table 1.
Table 1. JP 3 J u m p er Se le ct s Po w e r S ou rce
Jumper
1-2Selects external power, supplied through PWR_JACK. The polarity at PWR_JACK
is unimpo rtant due to the presence of the bridge rectifier G1. The external power
supply shou ld be in the range of 6–8 VAC or 8–10 VDC.
2-3Selects USB pow er. When USB power is selected, the power indi cator LED13 will
not illuminate u nt il th e board enu m er a te s w ith the host PC.
3.2System Reset
The Symphony SoundBite board can also be reset manually using the pushbutton switch SW3, which
resets the DSP and all of the codecs.
3.3Select Boot Mode
Select the boot mode of the DSP (and enable the I2C EEPROM) using the six-position DIP switch SW2.
SW2 positions 4:1 correspond to pins MOD[D:A]. For the MOD pin switches (positions 4 through 1 only),
the switch state is the inverse of the logic state presented to the pin, so that in the ON position, a logic low
is presented to the corresponding pin. Table 2 shows the allowed boot modes for the DSP56371 device. In
the table, for any SW2 position, “0” means OFF and “1” means ON.
Table 2. SW2 Selects Boot Mode
Boot
Mode
MOD[D:A]
200101101Jum p to PROM starti ng address (Slave SPI mode)
5 0101
60110
7 0111
SW2
[4:1]
1010Bootstrap from SHI (Slave SPI mode)
1001Bootstrap from SHI (Slave I2C mode) (HCKFR=1, 100 ns filter enabled)
1000Bootstrap from SHI (slave I2C mode) (HCKFR=0)
9 1001
B 1011
6Freescale Semiconductor
0110Bootstrap from SHI (Serial I2C EEPROM mode) (HCKFR=1, 100 ns filter enabled)
0100Bootstrap from SHI (Serial SPI EEPROM mode)
Symphony SoundBi te Reference Manual, Rev. 2. 0
Page 7
Table 2. SW2 Selects Boot Mode (continued)
Confi guration and Connec tions
Boot
Mode
MOD[D:A]
C 1100 00 11B oo ts tr ap from GPIO (S er ial SPI EEPR O M mod e )
D 1101
E 1110
F 1111
SW2
[4:1]
0010Jump to PR O M at default HLX (Slave SPI)
0001Jump to PR O M st arting addr ess (Slave I2C) (HCKFR=0)
0000Jump to PR O M st arting addr ess (Slave I2C) (HCKFR=1, 100 ns filter enabled)
SW2 positions 6:5 enable the I2C serial EEPROM, allowing the Symphony SoundBite board to operate
without a host PC (If the EEPROM has been appropriately programmed with valid DSP application data
and SW2 switches 4:1 are set for boot mode 9). SW2 switches 6:5 connect or disconnect the SDA and SCL
lines of the U6 device to the DSP. Switches 6:5 should always be in the same state, either both ON
(enabling U6) or OFF (disabling U6).
NOTE
When the on-board communication interface is used in SPI mode, switches
6:5 of SW2 must be OFF. Also, when running applications that use SPI or
2
I
C protocols on a host PC and the DSP, give careful consideration to all of
the SW2 switches to avoid contention.
The default state for SW2 is 110110 (SW2 positions 6:1), which sets Boot Mode 9 and enables the I2C
EEPROM (allowing stand-alone operations). As shipped from Freescale, the I2C EEPROM contains the
Symphony SoundBite demonstration application program, which is documented separately in the
Symphony SoundBite documentation.
3.4Audio Input/Output Jacks: J1–J8
Jacks J1, J3, J5, and J7 accept line-level analog inputs and jacks J2, J4, J6, and J8 provide line-level
outputs.
The analog and optical inputs and outputs of J1 and J2 are always enabled in hardware. Jack J1 can also
accept optical digital audio input using an optical cable with mini-TOS-LINK termination. Optical digital
audio output can be obtained through jack J2 using an optical cable with mini-TOS-LINK termination.
There is no automatic hardware detection of the input source type; all detection and source selection is
done using application software in the DSP to program the appropriate registers of the AK4584 codec
(U5). For more information about the setup and programming of the AK4584 codec (U5), see the
associated materials in the Symphony SoundBite documentation.
The output of the onboard microphone preamplifier is connected to the input of U5 via jumper block JP1.
See Table 3. The default state of JP1 is 1-2 and 3-4 both jumpered, enabling microphone audio input.
1-2Connects the microphone output to the left input channel of U5.
3-4Connects the microphone output to the right input channel of U5.
NOTE
If you use the J1 jack for analog audio input, no jumpers should be present
on JP1, or the input source and the microphone preamplifier output will
contend with each other.
3.5General Purpose Switches: SW1
DIP switches (SW1) are provided for general purpose use by the application code running in the DSP. The
GPIO pins connected to SW1 should normally be configured to be GPIO inputs.
•In the ON state, the corresponding DSP GPIO line is pulled high and a logic high is presented to
the input.
•In the OFF state, the internal pulldown resistor presents a logic low to the input.
3.6General Purpose LEDs: LED1–9
Nine LEDs are provided for general purpose use by DSP application code. The GPIO pins connected to
the LEDs should normally be configured as GPIO outputs.
•A logic high output on one of these GPIO pins turns ON the corresponding LED
•A logic low output on one of these GPIO pins turns OFF the corresponding LED.
Table 4 shows the schematic signal name and DSP GPIO pin that corresponds to each LED identifier.
Four LEDs display the status of the board: D10–D12, D13.
Table 5. Status LEDs
LEDColorDescription
D10Amber JT A G /OnCED10–D12 display the commun ication
D11Amber SDI/SPI
D12Amber SDI/I2C
D13GreenPower Ind icatorD13 indicates when power is applied to the
protocol in use by the host PC.
DSP and Analog Conversion functional
blocks of the Symphony SoundBi te.
3.8Expansion Header: CON1
An expansion header (CON1) is provided to enable off-board expansion. The 5V and 3.3V power supplies
and several grounds are present on the CON1 header, as well as all GPSWx and GPLEDx lines.
Although the GPSWx lines are normally GPIO inputs, the GPSWx lines can be used as either inputs or
outputs at the CON1 header.
NOTE
When the GPSWx lines are used as an output, if the corresponding switch
position of SW1 is ON, the pull-up resistor is enabled, presenting an
additional load to the DSP GPIO pin when in the logic low state, which must
be accounted for.
Although the GPLEDx lines are normally GPIO outputs, the GPLEDx lines can be used as either inputs
or outputs at the CON1 header.
NOTE
When the GPLEDx lines are used as inputs, the external signal must be able
to handle the load that the pr esence of the L ED and curren t limiting res istor
present to it. There are no provisions for disconnecting the LEDs from the
GPLEDx lines.
Additionally, you can modify the Symph ony SoundB ite board by s oldering jum pers between the 4 s older
2
pads at CON1 to any of the 4 IRQ lines, IRQD:A, the I
C lines SDA and SCL, and GPIO pin PC7, as
desired.
Frees c ale Semi co n du c tor9
Symphony SoundBi te Reference Manual, Rev. 2. 0
Page 10
Confi guration and Conne c tions
J3
PWR-JACK
J5J7J1
Expansion Header
CON1
General Purpose
SW1
General Purpose
LED1–9
Boot
Mode
SW2
J4J6J8J2
USB
Reset
SW3
Select Power
Source JP3
LED10–13
Route Microphone to
Left/Right Channel
JP1
Microphone
Stereo Inputs
1230
Stereo Outputs
S/PDIF
S/PDIF
LED10 JTAG
LED11 SPI
LED12 I2C
LED13 PWR
1230
3.9Connectors and Switches
Figure 4. Connectors, Switches, Headers
Table 6. Connectors, Switches, Jumpers
The microp hone preamplifier output is connected to bot h channels of J1 through
jumper JP1.
For additional information, please refer to the Symphony SoundBite Documentation Overview document,
which provides an overview of all the documentation relevant to the programming and usage of the
Symphony SoundBite audio development board.
12Freescale Sem iconductor
Symphony SoundBi te Reference Manual, Rev. 2. 0
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