NXP PDTC143TE, PDTC143TEF, PDTC143TK, PDTC143TM, PDTC143TS Schematic [ru]

...
DATA SH EET
DISCRETE SEMICONDUCTORS
PDTC143T series
NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open
Product data sheet Supersedes data of 2004 Apr 06
2004 Aug 06
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open

FEATURES

Built-in bias resistors
Simplified circuit design
Reduction of component count
Reduced pick and place costs.

APPLICATIONS

General purpose switching and amplification
Inverter and interface circuits
Circuit applications.

PRODUCT OVERVIEW

PACKAGE
T YPE NUMBER
PHILIPS EIAJ
PDTC143TE SOT416 SC-75 40 PDTA143TE PDTC143TEF SOT490 SC-89 11 PDTA143TEF PDTC143TK SOT346 SC-59 52 PDTA143TK PDTC143TM SOT883 SC-101 DM PDTA143TM PDTC143TS SOT54 (TO-92) SC-43 TC143T PDTA143TS PDTC143TT SOT23 *33 PDTC143TU SOT323 SC-70 *52

QUICK REFERENCE DATA

SYMBOL PARAMETER TYP. MAX. UNIT
V
CEO
I
O
R1 bias resistor 4.7 R2 open

DESCRIPTION

NPN resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details).
collector-emitter voltage
output current (DC) 100 mA
MARKING CODE PNP COMPLEMENT
(1) (1)
50 V
PDTA143TT PDTA143TU
Note
1. * = p: Made in Hong Kong. * = t: Made in Malaysia. * = W: Made in China.
2004 Aug 06 2
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open

SIMPLIFIED OUTLINE, SYMBOL AND PINNING

T YPE NUMBER SIMPLIFIED OUTLINE AND SYMBOL
PDTC143TS 1 base
handbook, halfpage
1 2 3
MAM361
R1
1
2
3
PDTC143TE 1 base PDTC143TEF 2 emitter PDTC143TK 3 collector
handbook, halfpage
PDTC143TT
3
R1
1
3
PDTC143TU
1
Top view
2
MDB270
2
PINNING
PIN DESCRIPTION
2 collector 3 emitter
PDTC143TM 1 base
2 emitter
handbook, halfpage
2
1
Bottom view
3
MHC507
R1
1
3
2
3 collector
2004 Aug 06 3
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open

ORDERING INFORMATION

TYPE NUMBER
NAME DESCRIPTION VERSION
PDTC143TE plastic surface mounted package; 3 leads SOT416 PDTC143TEF plastic surface mounted package; 3 leads SOT490 PDTC143TK plastic surface mounted package; 3 leads SOT346 PDTC143TM leadless ultra small plastic package; 3 solder lands; body
× 0.6 × 0.5 mm
1.0 PDTC143TS plastic single-ended leaded (through hole) package; 3 leads SOT54 PDTC143TT plastic surface mounted package; 3 leads SOT23 PDTC143TU plastic surface mounted package; 3 leads SOT323

LIMITING VALUES

In accordance with the Absolu te Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V V V I I P
CBO CEO
EBO O CM
tot
collector-base voltage open emitter 50 V collector-emitter voltage open base 50 V emitter-base voltage open collector 5 V output current (DC) 100 mA collector current 100 mA total power dissipation T
amb
25 °C SOT54 note 1 500 mW SOT23 note 1 250 mW SOT346 note 1 250 mW SOT323 note 1 200 mW SOT490 notes 1 and 2 250 mW SOT883 notes 2 and 3 250 mW SOT416 note 1 150 mW
T
stg
T
j
T
amb
storage temperature −65 +150 °C junction temperature 150 °C operating ambient
temperature
PACKAGE
SOT883
65 +150 °C
Notes
1. Refer to standard mounting conditions.
2. Reflow soldering is the only recommended soldering method.
3. Refer to SOT883 standard mounting conditions; FR4 with 60 μm copper strip line.
2004 Aug 06 4
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
Notes
1. Refer to standard mounting conditions.
2. Reflow soldering is the only recommended soldering method.
3. Refer to SOT883 standard mounting conditions; FR4 with 60 μm copper strip line.

CHARACTERISTICS

T
= 25 °C unless otherwise specified.
amb
thermal resistance from junction to ambient in free air
SOT54 note 1 250 K/W SOT23 note 1 500 K/W SOT346 note 1 500 K/W SOT323 note 1 625 K/W SOT490 notes 1 and 2 500 K/W SOT883 notes 2 and 3 500 K/W SOT416 note 1 833 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
CBO
I
CEO
collector-base cut-off curren t VCB = 50 V; IE = 0 A 100 nA collector-emitter cut-off current VCE = 30 V; IB = 0 A 1 μA
VCE = 30 V; IB = 0 A; Tj = 150 °C 50 μA
I
EBO
h V
FE
CEsat
emitter-base cut-off current VEB = 5 V; IC = 0 A 100 nA DC current gain VCE = 5 V; IC = 1 mA 200
collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA 100 mV R1 input resistor 3.3 4.7 6.1 kΩ C
c
collector capacitance IE = ie = 0 A; VCB = 10 V;
= 1 MHz
f
2.5 pF
2004 Aug 06 5
NXP Semiconductors Product data sheet
0
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open

PACKAGE OUTLINES

Plastic surface-mounted package; 3 leads SOT49
D
3
E
H
E
AB
X
v M
A
12
e
b
1
p
e
0 1 2 mm
DIMENSIONS (mm are the original dimensions)
UNIT b
A
0.8
0.6
0.33
0.23
mm
OUTLINE VERSION
SOT490 SC-89
cD
p
0.2
1.7
1.5
0.95
0.75
0.1
IEC JEDEC JEITA
e
E
e
0.5
1.0
REFERENCES
1
w M
B
H
1.7
1.5
scale
E
L
0.5
0.3
A
c
L
p
detail X
0.1
wv
0.1
EUROPEAN
PROJECTION
ISSUE DATE
05-07-28 06-03-16
p
2004 Aug 06 6
NXP Semiconductors Product data sheet
6
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open
Plastic surface-mounted package; 3 leads SOT34
D
B
E
H
E
3
A
X
v
M
A
12
e
1
DIMENSIONS (mm are the original dimensions)
1.3
1.0
A
1
0.1
0.013
b
p
0.50
0.26
0.35
0.10
IEC JEDEC JEITA
A
UNIT
mm
OUTLINE VERSION
SOT346 TO-236 SC-59A
b
p
e
cD
3.1
2.7
0 1 2 mm
e
E
1.7
1.9
1.3
REFERENCES
Q
A
A
1
c
L
w
M
B
detail X
scale
e
H
L
Qwv
p
E
0.33
0.6
0.2
0.23
0.2
0.95
1
3.0
2.5
p
0.2
EUROPEAN
PROJECTION
ISSUE DATE
04-11-11 06-03-16
2004 Aug 06 7
NXP Semiconductors Product data sheet
L
3
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open
eadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.5 mm SOT88
L
2
b
e
1
e
1
L
1
3
b
1
E
DIMENSIONS (mm are the original dimensions)
A
(1)
UNIT
A
0.50
mm
0.46
Note
1. Including plating thickness
OUTLINE VERSION
SOT883 SC-101
max.
0.03
1
bb
0.20
0.12
IEC JEDEC JEITA
1
0.55
0.47
DE
0.62
0.55
eLL
1.02
0.35 0.65
0.95
REFERENCES
A
A
1
D
0 0.5 1 mm
scale
e
1
0.30
0.22
0.30
0.22
1
EUROPEAN
PROJECTION
ISSUE DATE
03-02-05 03-04-03
2004 Aug 06 8
NXP Semiconductors Product data sheet
4
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open
Plastic single-ended leaded (through hole) package; 3 leads SOT5
c
E
d
1
D
2
A L
b
e
1
e
3
b
1
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
A
5.2
mm
5.0
OUTLINE
VERSION
SOT54 TO-92 SC-43A
b
0.48
0.40
b
c
D
d
1.7
4.2
1.4
3.6
REFERENCES
E
2.54
1
0.66
0.45
0.38
4.8
4.4
0.55
IEC JEDEC JEITA
e
e
1
1.27
L
14.5
12.7
L
1
(1)
L
1
max.
2.5
EUROPEAN
PROJECTION
ISSUE DATE
04-06-28 04-11-16
2004 Aug 06 9
NXP Semiconductors Product data sheet
3
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open
Plastic surface-mounted package; 3 leads SOT2
D
3
E
H
E
AB
X
v
M
A
12
e
1
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
A
1.1
mm
0.9
OUTLINE VERSION
SOT23 TO-236AB
max.
0.1
b
p
0.48
0.15
0.38
0.09
IEC JEDEC JEITA
b
p
e
cD
3.0
2.8
w
M
B
0 1 2 mm
scale
e
0.95
H
1
2.5
2.1
e
E
1.4
1.9
1.2
REFERENCES
Q
A
A
1
c
L
p
detail X
L
Qwv
p
E
0.55
0.45
0.15
0.45
0.2
0.1
EUROPEAN
PROJECTION
ISSUE DATE
04-11-04 06-03-16
2004 Aug 06 10
NXP Semiconductors Product data sheet
3
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open
Plastic surface-mounted package; 3 leads SOT32
D
y
3
E
AB
X
H
E
v
M
A
12
e
b
1
p
e
DIMENSIONS (mm are the original dimensions)
A
1
mm
1.1
0.8
A
max
0.1
b
0.4
0.3
p
cD
0.25
2.2
0.10
1.8
UNIT
A
A
1
B
w
M
0 1 2 mm
scale
e
1.3
e1HEL
2.2
0.65
2.0
p
0.45
0.15
E
1.35
1.15
Qwv
0.23
0.13
detail X
Q
c
L
p
0.20.2
OUTLINE VERSION
SOT323 SC-70
IEC JEDEC JEITA
REFERENCES
EUROPEAN
PROJECTION
ISSUE DATE
04-11-04 06-03-16
2004 Aug 06 11
NXP Semiconductors Product data sheet
6
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open
Plastic surface-mounted package; 3 leads SOT41
D
v
M
A
3
E
AB
X
H
E
12
e
b
1
p
e
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
A
0.95
mm
0.60
OUTLINE VERSION
SOT416 SC-75
max
0.1
b
cD
p
0.30
0.25
0.10
1.8
1.4
0.15
IEC JEDEC JEITA
e
E
0.9 1
0.7
REFERENCES
w
A
M
B
0 0.5 1 mm
scale
e
H
L
p
E
0.45
0.15
0.5
1
1.75
1.45
A
1
L
p
detail X
v
Qw
0.23
0.13
0.2
0.2
EUROPEAN
PROJECTION
Q
c
ISSUE DATE
04-11-04 06-03-16
2004 Aug 06 12
NXP Semiconductors Product data sheet
NPN resistor-equipped transistors;
PDTC143T series
R1 = 4.7 kΩ, R2 = open

DATA SHEET STATUS

DOCUMENT
STATUS
Objective data sheet Development This document contains data from the objective specification for product
Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification.
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) described in this document may have changed since this do cument was published and may differ in case of multiple devices. The latest product status information is available on the Internet at
http://www.nxp.com.
URL
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accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
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Applications ⎯ Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modificati on .
(1)
PRODUCT STATUS
(2)
DEFINITION
development.
above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveya nce or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
Quick reference data The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC the device. Limiting values are stress ratings only an d operation of the device at these or any other conditions
2004 Aug 06 13
60134) may cause permanent damage to
NXP Semiconductors
Customer notification
This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version.
Contact information
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The information presented in this documen t d oes not form part of any quotation or contract, is believed to b e a ccurate a nd reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industri al or intellectual property rights.
Printed in The Netherlands R75/06/pp14 Date of release: 2004 Aug 06 Document or der number: 9397 750 13675
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